From b086eed85c80516bef6ce4178862f2b8c2d59d1b Mon Sep 17 00:00:00 2001 From: Ard Biesheuvel Date: Wed, 6 Sep 2017 19:47:29 +0100 Subject: ARM: omap2plus_defconfig: enable NEON based crypto Enable kernel mode NEON and the various NEON based crypto algorithms, which are between 1.4x (AES-XTS) and 2.4x (AES-GCM) faster than scalar code (measured on Cortex-A8). Signed-off-by: Ard Biesheuvel Signed-off-by: Tony Lindgren --- arch/arm/configs/omap2plus_defconfig | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'arch') diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig index 7b97200c1d64..32f5c84ad4a8 100644 --- a/arch/arm/configs/omap2plus_defconfig +++ b/arch/arm/configs/omap2plus_defconfig @@ -516,3 +516,13 @@ CONFIG_LIBCRC32C=y CONFIG_FONTS=y CONFIG_FONT_8x8=y CONFIG_FONT_8x16=y +CONFIG_KERNEL_MODE_NEON=y +CONFIG_ARM_CRYPTO=y +CONFIG_CRYPTO_SHA1_ARM=m +CONFIG_CRYPTO_SHA1_ARM_NEON=m +CONFIG_CRYPTO_SHA256_ARM=m +CONFIG_CRYPTO_SHA512_ARM=m +CONFIG_CRYPTO_AES_ARM=m +CONFIG_CRYPTO_AES_ARM_BS=m +CONFIG_CRYPTO_CHACHA20_NEON=m +CONFIG_CRYPTO_GHASH_ARM_CE=m -- cgit v1.2.3-59-g8ed1b From 2b1f0fa116595cab831deffc2ba3f0fe9a9840a3 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Fri, 20 Oct 2017 10:55:46 -0700 Subject: ARM: omap2plus_defconfig: Enable droid 4 USB PHY Let's enable this as loadable module for droid 4. Cc: Marcel Partap Cc: Michael Scott Cc: Sebastian Reichel Signed-off-by: Tony Lindgren --- arch/arm/configs/omap2plus_defconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig index 32f5c84ad4a8..20f3a6963fc7 100644 --- a/arch/arm/configs/omap2plus_defconfig +++ b/arch/arm/configs/omap2plus_defconfig @@ -468,6 +468,7 @@ CONFIG_PWM_TIECAP=m CONFIG_PWM_TIEHRPWM=m CONFIG_PWM_TWL=m CONFIG_PWM_TWL_LED=m +CONFIG_PHY_CPCAP_USB=m CONFIG_PHY_DM816X_USB=m CONFIG_OMAP_USB2=m CONFIG_TI_PIPE3=y -- cgit v1.2.3-59-g8ed1b From af0ab55ffe2467fab82bc0909e469cba7701fac7 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Thu, 19 Oct 2017 13:16:19 +0200 Subject: x86/platform/intel/iosf_mbi: Add unlocked PMIC bus access notifier unregister For race free unregistration drivers may need to acquire PMIC bus access through iosf_mbi_punit_acquire() and then (un)register the notifier without dropping the lock. This commit adds an unlocked variant of iosf_mbi_unregister_pmic_bus_access_notifier for this use case. Acked-by: Ingo Molnar Signed-off-by: Hans de Goede Link: https://patchwork.freedesktop.org/patch/msgid/20171019111620.26761-2-hdegoede@redhat.com --- arch/x86/include/asm/iosf_mbi.h | 25 +++++++++++++++++++++++++ arch/x86/platform/intel/iosf_mbi.c | 19 +++++++++++++++++-- 2 files changed, 42 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/x86/include/asm/iosf_mbi.h b/arch/x86/include/asm/iosf_mbi.h index c313cac36f56..eb959cd77994 100644 --- a/arch/x86/include/asm/iosf_mbi.h +++ b/arch/x86/include/asm/iosf_mbi.h @@ -145,6 +145,18 @@ int iosf_mbi_register_pmic_bus_access_notifier(struct notifier_block *nb); */ int iosf_mbi_unregister_pmic_bus_access_notifier(struct notifier_block *nb); +/** + * iosf_mbi_unregister_pmic_bus_access_notifier_unlocked - Unregister PMIC bus + * notifier, unlocked + * + * Like iosf_mbi_unregister_pmic_bus_access_notifier(), but for use when the + * caller has already called iosf_mbi_punit_acquire() itself. + * + * @nb: notifier_block to unregister + */ +int iosf_mbi_unregister_pmic_bus_access_notifier_unlocked( + struct notifier_block *nb); + /** * iosf_mbi_call_pmic_bus_access_notifier_chain - Call PMIC bus notifier chain * @@ -153,6 +165,11 @@ int iosf_mbi_unregister_pmic_bus_access_notifier(struct notifier_block *nb); */ int iosf_mbi_call_pmic_bus_access_notifier_chain(unsigned long val, void *v); +/** + * iosf_mbi_assert_punit_acquired - Assert that the P-Unit has been acquired. + */ +void iosf_mbi_assert_punit_acquired(void); + #else /* CONFIG_IOSF_MBI is not enabled */ static inline bool iosf_mbi_available(void) @@ -196,12 +213,20 @@ int iosf_mbi_unregister_pmic_bus_access_notifier(struct notifier_block *nb) return 0; } +static inline int +iosf_mbi_unregister_pmic_bus_access_notifier_unlocked(struct notifier_block *nb) +{ + return 0; +} + static inline int iosf_mbi_call_pmic_bus_access_notifier_chain(unsigned long val, void *v) { return 0; } +static inline void iosf_mbi_assert_punit_acquired(void) {} + #endif /* CONFIG_IOSF_MBI */ #endif /* IOSF_MBI_SYMS_H */ diff --git a/arch/x86/platform/intel/iosf_mbi.c b/arch/x86/platform/intel/iosf_mbi.c index a952ac199741..6f37a2137a79 100644 --- a/arch/x86/platform/intel/iosf_mbi.c +++ b/arch/x86/platform/intel/iosf_mbi.c @@ -218,14 +218,23 @@ int iosf_mbi_register_pmic_bus_access_notifier(struct notifier_block *nb) } EXPORT_SYMBOL(iosf_mbi_register_pmic_bus_access_notifier); +int iosf_mbi_unregister_pmic_bus_access_notifier_unlocked( + struct notifier_block *nb) +{ + iosf_mbi_assert_punit_acquired(); + + return blocking_notifier_chain_unregister( + &iosf_mbi_pmic_bus_access_notifier, nb); +} +EXPORT_SYMBOL(iosf_mbi_unregister_pmic_bus_access_notifier_unlocked); + int iosf_mbi_unregister_pmic_bus_access_notifier(struct notifier_block *nb) { int ret; /* Wait for the bus to go inactive before unregistering */ mutex_lock(&iosf_mbi_punit_mutex); - ret = blocking_notifier_chain_unregister( - &iosf_mbi_pmic_bus_access_notifier, nb); + ret = iosf_mbi_unregister_pmic_bus_access_notifier_unlocked(nb); mutex_unlock(&iosf_mbi_punit_mutex); return ret; @@ -239,6 +248,12 @@ int iosf_mbi_call_pmic_bus_access_notifier_chain(unsigned long val, void *v) } EXPORT_SYMBOL(iosf_mbi_call_pmic_bus_access_notifier_chain); +void iosf_mbi_assert_punit_acquired(void) +{ + WARN_ON(!mutex_is_locked(&iosf_mbi_punit_mutex)); +} +EXPORT_SYMBOL(iosf_mbi_assert_punit_acquired); + #ifdef CONFIG_IOSF_MBI_DEBUG static u32 dbg_mdr; static u32 dbg_mcr; -- cgit v1.2.3-59-g8ed1b From 90c18d39c3b9d28a2a134e5c42a208ef1e86f525 Mon Sep 17 00:00:00 2001 From: Emmanuel Vadot Date: Mon, 6 Nov 2017 21:51:39 +0100 Subject: ARM: dts: sunxi: Add codec for A13 Olinuxino The A13 Olinuxino have an headphone jack and audio is supported so enable it. Signed-off-by: Emmanuel Vadot Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun5i-a13-olinuxino.dts | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/sun5i-a13-olinuxino.dts b/arch/arm/boot/dts/sun5i-a13-olinuxino.dts index 38072c7e10e2..4b9af423c6d5 100644 --- a/arch/arm/boot/dts/sun5i-a13-olinuxino.dts +++ b/arch/arm/boot/dts/sun5i-a13-olinuxino.dts @@ -114,6 +114,10 @@ status = "okay"; }; +&codec { + status = "okay"; +}; + &ehci0 { status = "okay"; }; -- cgit v1.2.3-59-g8ed1b From 74942cd5dfe4ac4fd982fe58118bc69346a2bd18 Mon Sep 17 00:00:00 2001 From: Icenowy Zheng Date: Sun, 12 Nov 2017 20:41:29 +0800 Subject: ARM: dts: sun8i: add support for Orange Pi R1 Orange Pi R1 is a board design based on Orange Pi Zero, with XR819 Wi-Fi chip replaced by RTL8189ETV Wi-Fi module and the USB Type-A jack replaced by an onboard USB RTL8152B USB-Ethernet adapter. Add support for it. Signed-off-by: Icenowy Zheng Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/sun8i-h2-plus-orangepi-r1.dts | 73 +++++++++++++++++++++++++ 2 files changed, 74 insertions(+) create mode 100644 arch/arm/boot/dts/sun8i-h2-plus-orangepi-r1.dts (limited to 'arch') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index d0381e9caf21..3c139c63098f 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -949,6 +949,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \ sun8i-a83t-bananapi-m3.dtb \ sun8i-a83t-cubietruck-plus.dtb \ sun8i-a83t-tbs-a711.dtb \ + sun8i-h2-plus-orangepi-r1.dtb \ sun8i-h2-plus-orangepi-zero.dtb \ sun8i-h3-bananapi-m2-plus.dtb \ sun8i-h3-beelink-x2.dtb \ diff --git a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-r1.dts b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-r1.dts new file mode 100644 index 000000000000..32a6d312422e --- /dev/null +++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-r1.dts @@ -0,0 +1,73 @@ +/* + * Copyright (C) 2017 Icenowy Zheng + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/* Orange Pi R1 is based on Orange Pi Zero design */ +#include "sun8i-h2-plus-orangepi-zero.dts" + +/ { + model = "Xunlong Orange Pi R1"; + compatible = "xunlong,orangepi-r1", "allwinner,sun8i-h2-plus"; + + /delete-node/ reg_vcc_wifi; + + aliases { + ethernet1 = &rtl8189etv; + }; +}; + +&ohci1 { + /* + * RTL8152B USB-Ethernet adapter is connected to USB1, + * and it's a USB 2.0 device. So the OHCI1 controller + * can be left disabled. + */ + status = "disabled"; +}; + +&mmc1 { + vmmc-supply = <®_vcc3v3>; + vqmmc-supply = <®_vcc3v3>; + + rtl8189etv: sdio_wifi@1 { + reg = <1>; + }; +}; -- cgit v1.2.3-59-g8ed1b From cf8e19e1ec15e8a86ecc7a7cfd7bae7af1bca5ae Mon Sep 17 00:00:00 2001 From: Sergey Matyukevich Date: Fri, 3 Nov 2017 22:58:55 +0300 Subject: arm64: dts: orange-pi-zero-plus2: enable AP6212a WiFi/BT combo Enable AP6212a WiFi/BT combo chip on orange-pi-zero-plus2 board: - WiFi SDIO interface is connected to MMC1 - WiFi REG_ON pin connected to gpio PA9: attach to mmc-pwrseq - WiFi HOST_WAKE pin connected to gpio PL7 - BT is connected to UART1 Signed-off-by: Sergey Matyukevich Signed-off-by: Maxime Ripard --- .../allwinner/sun50i-h5-orangepi-zero-plus2.dts | 32 ++++++++++++++++++++++ 1 file changed, 32 insertions(+) (limited to 'arch') diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts index b6b7a561df8c..ddc4d7071a01 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts @@ -64,6 +64,13 @@ regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; }; + + wifi_pwrseq: wifi_pwrseq { + compatible = "mmc-pwrseq-simple"; + pinctrl-names = "default"; + reset-gpios = <&pio 0 9 GPIO_ACTIVE_LOW>; /* PA9 */ + post-power-on-delay-ms = <200>; + }; }; &mmc0 { @@ -75,6 +82,25 @@ status = "okay"; }; +&mmc1 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins_a>; + vmmc-supply = <®_vcc3v3>; + vqmmc-supply = <®_vcc3v3>; + mmc-pwrseq = <&wifi_pwrseq>; + bus-width = <4>; + non-removable; + status = "okay"; + + brcmf: wifi@1 { + reg = <1>; + compatible = "brcm,bcm4329-fmac"; + interrupt-parent = <&r_pio>; + interrupts = <0 7 IRQ_TYPE_LEVEL_LOW>; /* PL7 */ + interrupt-names = "host-wake"; + }; +}; + &mmc2 { pinctrl-names = "default"; pinctrl-0 = <&mmc2_8bit_pins>; @@ -90,3 +116,9 @@ pinctrl-0 = <&uart0_pins_a>; status = "okay"; }; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>; + status = "okay"; +}; -- cgit v1.2.3-59-g8ed1b From e570101031837151dc92acf45a707bc3c3d92cc7 Mon Sep 17 00:00:00 2001 From: Jagan Teki Date: Thu, 23 Nov 2017 23:05:36 +0530 Subject: arm64: allwinner: a64: Enable AXP803 for Orangepi Win Enable AXP803 PMIC and regulators for Orangepi Win. Signed-off-by: Jagan Teki Signed-off-by: Maxime Ripard --- .../boot/dts/allwinner/sun50i-a64-orangepi-win.dts | 125 +++++++++++++++++++-- 1 file changed, 117 insertions(+), 8 deletions(-) (limited to 'arch') diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts index 5f8ff4017d45..240d35731d10 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts @@ -57,13 +57,6 @@ chosen { stdout-path = "serial0:115200n8"; }; - - reg_vcc3v3: vcc3v3 { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; }; &ehci1 { @@ -73,7 +66,7 @@ &mmc0 { pinctrl-names = "default"; pinctrl-0 = <&mmc0_pins>; - vmmc-supply = <®_vcc3v3>; + vmmc-supply = <®_dcdc1>; cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; cd-inverted; status = "okay"; @@ -83,6 +76,122 @@ status = "okay"; }; +&r_rsb { + status = "okay"; + + axp803: pmic@3a3 { + compatible = "x-powers,axp803"; + reg = <0x3a3>; + interrupt-parent = <&r_intc>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + }; +}; + +#include "axp803.dtsi" + +®_aldo1 { + regulator-always-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-name = "afvcc-csi"; +}; + +®_aldo2 { + regulator-always-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-pl"; +}; + +®_aldo3 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "vcc-pll-avcc"; +}; + +®_dcdc1 { + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-3v3"; +}; + +®_dcdc2 { + regulator-always-on; + regulator-min-microvolt = <1040000>; + regulator-max-microvolt = <1300000>; + regulator-name = "vdd-cpux"; +}; + +/* DCDC3 is polyphased with DCDC2 */ + +®_dcdc5 { + regulator-always-on; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-name = "vcc-dram"; +}; + +®_dcdc6 { + regulator-always-on; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-name = "vdd-sys"; +}; + +®_dldo1 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-hdmi-dsi"; +}; + +®_dldo2 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-wifi"; +}; + +®_dldo3 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "avdd-csi"; +}; + +®_dldo4 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-wifi-io"; +}; + +®_eldo1 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "cpvdd"; +}; + +®_fldo1 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-name = "vcc-1v2-hsic"; +}; + +/* + * The A64 chip cannot work without this regulator off, although + * it seems to be only driving the AR100 core. + * Maybe we don't still know well about CPUs domain. + */ +®_fldo2 { + regulator-always-on; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-name = "vdd-cpus"; +}; + +®_rtc_ldo { + regulator-name = "vcc-rtc"; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pins_a>; -- cgit v1.2.3-59-g8ed1b From 6d84b6c9c624db16920091f9e1558948e1446bb7 Mon Sep 17 00:00:00 2001 From: Andre Przywara Date: Sat, 25 Nov 2017 12:01:59 +0000 Subject: arm64: dts: allwinner: H5: remove redundant MMC0 card detect pin PF6 is mostly used as the CD pin for the microSD slot on H5 based boards. So far we were referencing this pin twice: once using the mmc0_cd_pin phandle, and then again directly as a GPIO via the pinctrl phandle. This will cause problems if the pinctrl driver enables strict mode, as the second request will fail now, leading to a driver init failure. Remove the redundant pin reference via the mmc0_cd_pin phandle. Signed-off-by: Andre Przywara Reported-by: Chris Obbard Signed-off-by: Maxime Ripard --- arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts | 2 +- arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts | 2 +- arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts | 2 +- arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts | 2 +- arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) (limited to 'arch') diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts index 7c028af58f47..ea1101293892 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts @@ -135,7 +135,7 @@ &mmc0 { pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; + pinctrl-0 = <&mmc0_pins_a>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts index 6eb8092d8e57..f1447003ea3c 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts @@ -127,7 +127,7 @@ &mmc0 { pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; + pinctrl-0 = <&mmc0_pins_a>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts index a0ca925175aa..9e51d3a5f4e6 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts @@ -161,7 +161,7 @@ &mmc0 { pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; + pinctrl-0 = <&mmc0_pins_a>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts index b47790650144..0f25c4a6f15d 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts @@ -168,7 +168,7 @@ &mmc0 { pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; + pinctrl-0 = <&mmc0_pins_a>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts index ddc4d7071a01..d34939909b9f 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts @@ -75,7 +75,7 @@ &mmc0 { pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; + pinctrl-0 = <&mmc0_pins_a>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; -- cgit v1.2.3-59-g8ed1b From 81270ea7371cc77e47d121883aa54ade04222e41 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Wed, 18 Oct 2017 09:27:22 +0200 Subject: ARM: dts: r8a7743: Use R-Car Gen2 Ether fallback compat string Use newly added R-Car Gen2 Ether fallback compat string in the DT of the r8a7743 SoC. This should have no run-time effect as the driver matches against the per-SoC compat string before considering the fallback compat string. Signed-off-by: Simon Horman Reviewed-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a7743.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi index 7bbba4a36f31..f647b86c0205 100644 --- a/arch/arm/boot/dts/r8a7743.dtsi +++ b/arch/arm/boot/dts/r8a7743.dtsi @@ -827,7 +827,8 @@ }; ether: ethernet@ee700000 { - compatible = "renesas,ether-r8a7743"; + compatible = "renesas,ether-r8a7743", + "renesas,rcar-gen2-ether"; reg = <0 0xee700000 0 0x400>; interrupts = ; clocks = <&cpg CPG_MOD 813>; -- cgit v1.2.3-59-g8ed1b From d5960269113e286d14e56cd9c2956135309953c8 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Wed, 18 Oct 2017 09:27:23 +0200 Subject: ARM: dts: r8a7745: Use R-Car Gen2 Ether fallback compat string Use newly added R-Car Gen2 Ether fallback compat string in the DT of the r8a7745 SoC. This should have no run-time effect as the driver matches against the per-SoC compat string before considering the fallback compat string. Signed-off-by: Simon Horman Reviewed-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a7745.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi index 3a50f703601c..6ad93f0deb8f 100644 --- a/arch/arm/boot/dts/r8a7745.dtsi +++ b/arch/arm/boot/dts/r8a7745.dtsi @@ -615,7 +615,8 @@ }; ether: ethernet@ee700000 { - compatible = "renesas,ether-r8a7745"; + compatible = "renesas,ether-r8a7745", + "renesas,rcar-gen2-ether"; reg = <0 0xee700000 0 0x400>; interrupts = ; clocks = <&cpg CPG_MOD 813>; -- cgit v1.2.3-59-g8ed1b From 1bfd944483b209c577fa50cc981b4f959a287f83 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Wed, 18 Oct 2017 09:27:24 +0200 Subject: ARM: dts: r8a7778: Use R-Car Gen1 Ether fallback compat string Use newly added R-Car Gen1 Ether fallback compat string in the DT of the r8a7778 SoC. This should have no run-time effect as the driver matches against the per-SoC compat string before considering the fallback compat string. Signed-off-by: Simon Horman Reviewed-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a7778.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi index a39472aab867..d6e3c0400ec3 100644 --- a/arch/arm/boot/dts/r8a7778.dtsi +++ b/arch/arm/boot/dts/r8a7778.dtsi @@ -51,7 +51,8 @@ }; ether: ethernet@fde00000 { - compatible = "renesas,ether-r8a7778"; + compatible = "renesas,ether-r8a7778", + "renesas,rcar-gen1-ether"; reg = <0xfde00000 0x400>; interrupts = ; clocks = <&mstp1_clks R8A7778_CLK_ETHER>; -- cgit v1.2.3-59-g8ed1b From adf65f3f575a06b4180b4b9ab8485603303e7596 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Wed, 18 Oct 2017 09:27:25 +0200 Subject: ARM: dts: r8a7790: Use R-Car Gen2 Ether fallback compat string Use newly added R-Car Gen2 Ether fallback compat string in the DT of the r8a7790 SoC. This should have no run-time effect as the driver matches against the per-SoC compat string before considering the fallback compat string. Signed-off-by: Simon Horman Reviewed-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a7790.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index 2f017fee4009..4fc607e8e40c 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi @@ -906,7 +906,8 @@ }; ether: ethernet@ee700000 { - compatible = "renesas,ether-r8a7790"; + compatible = "renesas,ether-r8a7790", + "renesas,rcar-gen2-ether"; reg = <0 0xee700000 0 0x400>; interrupts = ; clocks = <&cpg CPG_MOD 813>; -- cgit v1.2.3-59-g8ed1b From fc2d62f04dfd03eefc0061f3db9c00ded83db19e Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Wed, 18 Oct 2017 09:27:26 +0200 Subject: ARM: dts: r8a7791: Use R-Car Gen2 Ether fallback compat string Use newly added R-Car Gen2 Ether fallback compat string in the DT of the r8a7791 SoC. This should have no run-time effect as the driver matches against the per-SoC compat string before considering the fallback compat string. Signed-off-by: Simon Horman Reviewed-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a7791.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index 67831d0405f3..9815a933e4cc 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi @@ -961,7 +961,8 @@ }; ether: ethernet@ee700000 { - compatible = "renesas,ether-r8a7791"; + compatible = "renesas,ether-r8a7791", + "renesas,rcar-gen2-ether"; reg = <0 0xee700000 0 0x400>; interrupts = ; clocks = <&cpg CPG_MOD 813>; -- cgit v1.2.3-59-g8ed1b From ce900af9befa4fdb3a6abbbc212e7b8e75fcc9a0 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Wed, 18 Oct 2017 09:27:27 +0200 Subject: ARM: dts: r8a7793: Use R-Car Gen2 Ether fallback compat string Use newly added R-Car Gen2 Ether fallback compat string in the DT of the r8a7793 SoC. This should have no run-time effect as the driver matches against the per-SoC compat string before considering the fallback compat string. Signed-off-by: Simon Horman Reviewed-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a7793.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi index 58eae569b4e0..196afec766c6 100644 --- a/arch/arm/boot/dts/r8a7793.dtsi +++ b/arch/arm/boot/dts/r8a7793.dtsi @@ -916,7 +916,8 @@ }; ether: ethernet@ee700000 { - compatible = "renesas,ether-r8a7793"; + compatible = "renesas,ether-r8a7793", + "renesas,rcar-gen2-ether"; reg = <0 0xee700000 0 0x400>; interrupts = ; clocks = <&cpg CPG_MOD 813>; -- cgit v1.2.3-59-g8ed1b From 2ccbeaa92276aa3216f3db9ccf856e32f3822034 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Wed, 18 Oct 2017 09:27:28 +0200 Subject: ARM: dts: r8a7794: Use R-Car Gen2 Ether fallback compat string Use newly added R-Car Gen2 Ether fallback compat string in the DT of the r8a7794 SoC. This should have no run-time effect as the driver matches against the per-SoC compat string before considering the fallback compat string. Signed-off-by: Simon Horman Reviewed-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a7794.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi index 905e50c9b524..148c2567a6ce 100644 --- a/arch/arm/boot/dts/r8a7794.dtsi +++ b/arch/arm/boot/dts/r8a7794.dtsi @@ -640,7 +640,8 @@ }; ether: ethernet@ee700000 { - compatible = "renesas,ether-r8a7794"; + compatible = "renesas,ether-r8a7794", + "renesas,rcar-gen2-ether"; reg = <0 0xee700000 0 0x400>; interrupts = ; clocks = <&cpg CPG_MOD 813>; -- cgit v1.2.3-59-g8ed1b From 0d975e29a51011c244d41e16a59a26fddf6ea281 Mon Sep 17 00:00:00 2001 From: Fabrizio Castro Date: Mon, 23 Oct 2017 19:09:21 +0100 Subject: ARM: dts: r8a7743: Add DU support Add du node to r8a7743 SoC DT. Boards that want to enable the DU need to specify the output topology. Signed-off-by: Fabrizio Castro Reviewed-by: Biju Das Reviewed-by: Laurent Pinchart Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7743.dtsi | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi index f647b86c0205..112a72baa7a4 100644 --- a/arch/arm/boot/dts/r8a7743.dtsi +++ b/arch/arm/boot/dts/r8a7743.dtsi @@ -1034,6 +1034,36 @@ }; }; + du: display@feb00000 { + compatible = "renesas,du-r8a7743"; + reg = <0 0xfeb00000 0 0x40000>, + <0 0xfeb90000 0 0x1c>; + reg-names = "du", "lvds.0"; + interrupts = , + ; + clocks = <&cpg CPG_MOD 724>, + <&cpg CPG_MOD 723>, + <&cpg CPG_MOD 726>; + clock-names = "du.0", "du.1", "lvds.0"; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + du_out_rgb: endpoint { + }; + }; + port@1 { + reg = <1>; + du_out_lvds0: endpoint { + }; + }; + }; + }; + pci0: pci@ee090000 { compatible = "renesas,pci-r8a7743", "renesas,pci-rcar-gen2"; -- cgit v1.2.3-59-g8ed1b From 55cce0a07678e5fe21c7f81cc437653b485a712c Mon Sep 17 00:00:00 2001 From: Fabrizio Castro Date: Mon, 23 Oct 2017 19:09:22 +0100 Subject: ARM: dts: iwg20d-q7-dbcm-ca: Add HDMI video output Although there is a HDMI connector on the q7 carrier board it is not connected to the RZ/G1M SoC. One must use the HDMI connector on the camera daughter board. This patch adds support for this connector. Signed-off-by: Fabrizio Castro Reviewed-by: Biju Das Reviewed-by: Laurent Pinchart Signed-off-by: Simon Horman --- arch/arm/boot/dts/iwg20d-q7-dbcm-ca.dtsi | 75 ++++++++++++++++++++++++++++++++ 1 file changed, 75 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/iwg20d-q7-dbcm-ca.dtsi b/arch/arm/boot/dts/iwg20d-q7-dbcm-ca.dtsi index 31fab5f183a9..4db18f2ef303 100644 --- a/arch/arm/boot/dts/iwg20d-q7-dbcm-ca.dtsi +++ b/arch/arm/boot/dts/iwg20d-q7-dbcm-ca.dtsi @@ -13,6 +13,37 @@ serial1 = &scif1; serial4 = &hscif1; }; + + cec_clock: cec-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <12000000>; + }; + + hdmi-out { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_con_out: endpoint { + remote-endpoint = <&adv7511_out>; + }; + }; + }; +}; + +&du { + pinctrl-0 = <&du_pins>; + pinctrl-names = "default"; + status = "okay"; + + ports { + port@0 { + endpoint { + remote-endpoint = <&adv7511_in>; + }; + }; + }; }; &hscif1 { @@ -23,7 +54,51 @@ status = "okay"; }; +&i2c5 { + status = "okay"; + clock-frequency = <400000>; + + hdmi@39 { + compatible = "adi,adv7511w"; + reg = <0x39>; + interrupt-parent = <&gpio0>; + interrupts = <13 IRQ_TYPE_LEVEL_LOW>; + clocks = <&cec_clock>; + clock-names = "cec"; + + adi,input-depth = <8>; + adi,input-colorspace = "rgb"; + adi,input-clock = "1x"; + adi,input-style = <1>; + adi,input-justification = "evenly"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + adv7511_in: endpoint { + remote-endpoint = <&du_out_rgb>; + }; + }; + + port@1 { + reg = <1>; + adv7511_out: endpoint { + remote-endpoint = <&hdmi_con_out>; + }; + }; + }; + }; +}; + &pfc { + du_pins: du { + groups = "du_rgb888", "du_sync", "du_oddf", "du_clk_out_0"; + function = "du"; + }; + hscif1_pins: hscif1 { groups = "hscif1_data_c", "hscif1_ctrl_c"; function = "hscif1"; -- cgit v1.2.3-59-g8ed1b From 4c1d14ce4a03af24c2bac21c4a19f17d20b4a763 Mon Sep 17 00:00:00 2001 From: Fabrizio Castro Date: Mon, 23 Oct 2017 18:09:22 +0100 Subject: ARM: dts: iwg22d: Use /dev/ttySC3 as debug console The BSP release from iWave uses /dev/ttySC3 as debug console, this patch renames the alias accordingly for compatibility. Signed-off-by: Fabrizio Castro Signed-off-by: Chris Paterson Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts index 52153ec3638c..edadeee8f1ec 100644 --- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts +++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts @@ -16,13 +16,13 @@ compatible = "iwave,g22d", "iwave,g22m", "renesas,r8a7745"; aliases { - serial0 = &scif4; + serial3 = &scif4; ethernet0 = &avb; }; chosen { bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; - stdout-path = "serial0:115200n8"; + stdout-path = "serial3:115200n8"; }; vccq_sdhi0: regulator-vccq-sdhi0 { -- cgit v1.2.3-59-g8ed1b From c7a5ddfbf171c222772087ba8697b163e8785caa Mon Sep 17 00:00:00 2001 From: Fabrizio Castro Date: Mon, 23 Oct 2017 18:09:23 +0100 Subject: ARM: dts: iwg22d: Add /dev/ttySC5 support Add support for HSCIF1 as /dev/ttySC5, keeping the same naming scheme adopted by iWave in their BSP release. This interface uses RTS/CTS. Signed-off-by: Fabrizio Castro Signed-off-by: Chris Paterson Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts index edadeee8f1ec..82587d7b2056 100644 --- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts +++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts @@ -17,6 +17,7 @@ aliases { serial3 = &scif4; + serial5 = &hscif1; ethernet0 = &avb; }; @@ -39,7 +40,20 @@ }; }; +&hscif1 { + pinctrl-0 = <&hscif1_pins>; + pinctrl-names = "default"; + + uart-has-rtscts; + status = "okay"; +}; + &pfc { + hscif1_pins: hscif1 { + groups = "hscif1_data", "hscif1_ctrl"; + function = "hscif1"; + }; + scif4_pins: scif4 { groups = "scif4_data_b"; function = "scif4"; -- cgit v1.2.3-59-g8ed1b From ea03afbeb80edfb460570082855b4b1dd19fc7e7 Mon Sep 17 00:00:00 2001 From: Fabrizio Castro Date: Mon, 23 Oct 2017 18:09:24 +0100 Subject: ARM: dts: iwg22d-sodimm-dbhd-ca: Add device tree for HDMI DB Add file r8a7745-iwg22d-sodimm-dbhd-ca.dts to provide support for iW-RainboW-G22D with HDMI daughter board plugged in. The interfaces defined in the new .dts file are: scif1, scif5, and hscif2. Signed-off-by: Fabrizio Castro Signed-off-by: Chris Paterson Signed-off-by: Simon Horman --- arch/arm/boot/dts/Makefile | 1 + .../arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts | 61 ++++++++++++++++++++++ 2 files changed, 62 insertions(+) create mode 100644 arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts (limited to 'arch') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index d0381e9caf21..21396726b437 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -756,6 +756,7 @@ dtb-$(CONFIG_ARCH_RENESAS) += \ r8a7743-iwg20d-q7-dbcm-ca.dtb \ r8a7743-sk-rzg1m.dtb \ r8a7745-iwg22d-sodimm.dtb \ + r8a7745-iwg22d-sodimm-dbhd-ca.dtb \ r8a7745-sk-rzg1e.dtb \ r8a7778-bockw.dtb \ r8a7779-marzen.dtb \ diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts new file mode 100644 index 000000000000..f925388454da --- /dev/null +++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts @@ -0,0 +1,61 @@ +/* + * Device Tree Source for the iWave-RZG1E SODIMM carrier board + HDMI daughter + * board + * + * Copyright (C) 2017 Renesas Electronics Corp. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include "r8a7745-iwg22d-sodimm.dts" + +/ { + model = "iWave RainboW-G22D-SODIMM RZ/G1E based board with HDMI add-on"; + compatible = "iwave,g22d", "iwave,g22m", "renesas,r8a7745"; + + aliases { + serial0 = &scif1; + serial4 = &scif5; + serial6 = &hscif2; + }; +}; + +&hscif2 { + pinctrl-0 = <&hscif2_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&pfc { + hscif2_pins: hscif2 { + groups = "hscif2_data"; + function = "hscif2"; + }; + + scif1_pins: scif1 { + groups = "scif1_data"; + function = "scif1"; + }; + + scif5_pins: scif5 { + groups = "scif5_data_d"; + function = "scif5"; + }; +}; + +&scif1 { + pinctrl-0 = <&scif1_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&scif5 { + pinctrl-0 = <&scif5_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; -- cgit v1.2.3-59-g8ed1b From 738a368d558f24d2c34ef420fc0d8ab8499b0ebe Mon Sep 17 00:00:00 2001 From: Fabrizio Castro Date: Mon, 23 Oct 2017 18:09:25 +0100 Subject: ARM: dts: iwg22d-sodimm: sort dt nodes Improve the layout of r8a7745-iwg22d-sodimm.dts by sorting the nodes alphabetically. Signed-off-by: Fabrizio Castro Signed-off-by: Chris Paterson Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts | 62 ++++++++++++++--------------- 1 file changed, 31 insertions(+), 31 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts index 82587d7b2056..3eb4f83297d4 100644 --- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts +++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts @@ -16,9 +16,9 @@ compatible = "iwave,g22d", "iwave,g22m", "renesas,r8a7745"; aliases { + ethernet0 = &avb; serial3 = &scif4; serial5 = &hscif1; - ethernet0 = &avb; }; chosen { @@ -40,6 +40,25 @@ }; }; +&avb { + pinctrl-0 = <&avb_pins>; + pinctrl-names = "default"; + + phy-handle = <&phy3>; + phy-mode = "gmii"; + renesas,no-ether-link; + status = "okay"; + + phy3: ethernet-phy@3 { + /* + * On some older versions of the platform (before R4.0) the phy address + * may be 1 or 3. The address is fixed to 3 for R4.0 onwards. + */ + reg = <3>; + micrel,led-mode = <1>; + }; +}; + &hscif1 { pinctrl-0 = <&hscif1_pins>; pinctrl-names = "default"; @@ -48,7 +67,18 @@ status = "okay"; }; +&pci1 { + status = "okay"; + pinctrl-0 = <&usb1_pins>; + pinctrl-names = "default"; +}; + &pfc { + avb_pins: avb { + groups = "avb_mdio", "avb_gmii"; + function = "avb"; + }; + hscif1_pins: hscif1 { groups = "hscif1_data", "hscif1_ctrl"; function = "hscif1"; @@ -59,11 +89,6 @@ function = "scif4"; }; - avb_pins: avb { - groups = "avb_mdio", "avb_gmii"; - function = "avb"; - }; - sdhi0_pins: sd0 { groups = "sdhi0_data4", "sdhi0_ctrl"; function = "sdhi0"; @@ -83,25 +108,6 @@ status = "okay"; }; -&avb { - pinctrl-0 = <&avb_pins>; - pinctrl-names = "default"; - - phy-handle = <&phy3>; - phy-mode = "gmii"; - renesas,no-ether-link; - status = "okay"; - - phy3: ethernet-phy@3 { - /* - * On some older versions of the platform (before R4.0) the phy address - * may be 1 or 3. The address is fixed to 3 for R4.0 onwards. - */ - reg = <3>; - micrel,led-mode = <1>; - }; -}; - &sdhi0 { pinctrl-0 = <&sdhi0_pins>; pinctrl-names = "default"; @@ -112,12 +118,6 @@ status = "okay"; }; -&pci1 { - status = "okay"; - pinctrl-0 = <&usb1_pins>; - pinctrl-names = "default"; -}; - &usbphy { status = "okay"; }; -- cgit v1.2.3-59-g8ed1b From c5a541b81bc02d0746bf78ca7bfa9080d91c3aff Mon Sep 17 00:00:00 2001 From: Biju Das Date: Mon, 23 Oct 2017 18:09:26 +0100 Subject: ARM: dts: r8a7745: Add HS-USB device node From: Biju Das Define the R8A7745 generic part of the HS-USB device node. It is up to the board file to enable the device. Signed-off-by: Biju Das Reviewed-by: Fabrizio Castro Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7745.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi index 6ad93f0deb8f..432aa48ea395 100644 --- a/arch/arm/boot/dts/r8a7745.dtsi +++ b/arch/arm/boot/dts/r8a7745.dtsi @@ -917,6 +917,20 @@ }; }; + hsusb: usb@e6590000 { + compatible = "renesas,usbhs-r8a7745", + "renesas,rcar-gen2-usbhs"; + reg = <0 0xe6590000 0 0x100>; + interrupts = ; + clocks = <&cpg CPG_MOD 704>; + power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; + resets = <&cpg 704>; + renesas,buswait = <4>; + phys = <&usb0 1>; + phy-names = "usb"; + status = "disabled"; + }; + usbphy: usb-phy@e6590100 { compatible = "renesas,usb-phy-r8a7745", "renesas,rcar-gen2-usb-phy"; -- cgit v1.2.3-59-g8ed1b From fbdf17b307dae407b2e673806386f84660d01b63 Mon Sep 17 00:00:00 2001 From: Biju Das Date: Mon, 23 Oct 2017 18:09:27 +0100 Subject: ARM: dts: r8a7745: Add USB-DMAC device nodes From: Biju Das Signed-off-by: Biju Das Reviewed-by: Fabrizio Castro Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7745.dtsi | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi index 432aa48ea395..6e0c69bb375d 100644 --- a/arch/arm/boot/dts/r8a7745.dtsi +++ b/arch/arm/boot/dts/r8a7745.dtsi @@ -312,6 +312,34 @@ dma-channels = <15>; }; + usb_dmac0: dma-controller@e65a0000 { + compatible = "renesas,r8a7745-usb-dmac", + "renesas,usb-dmac"; + reg = <0 0xe65a0000 0 0x100>; + interrupts = ; + interrupt-names = "ch0", "ch1"; + clocks = <&cpg CPG_MOD 330>; + power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; + resets = <&cpg 330>; + #dma-cells = <1>; + dma-channels = <2>; + }; + + usb_dmac1: dma-controller@e65b0000 { + compatible = "renesas,r8a7745-usb-dmac", + "renesas,usb-dmac"; + reg = <0 0xe65b0000 0 0x100>; + interrupts = ; + interrupt-names = "ch0", "ch1"; + clocks = <&cpg CPG_MOD 331>; + power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; + resets = <&cpg 331>; + #dma-cells = <1>; + dma-channels = <2>; + }; + scifa0: serial@e6c40000 { compatible = "renesas,scifa-r8a7745", "renesas,rcar-gen2-scifa", "renesas,scifa"; -- cgit v1.2.3-59-g8ed1b From d4595f040881976d5a232922d8592a0d576ce3a5 Mon Sep 17 00:00:00 2001 From: Biju Das Date: Mon, 23 Oct 2017 18:09:28 +0100 Subject: ARM: dts: r8a7745: Enable DMA for HSUSB From: Biju Das This patch adds DMA properties to the HSUSB node. Signed-off-by: Biju Das Reviewed-by: Fabrizio Castro Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7745.dtsi | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi index 6e0c69bb375d..948dd1fc2d9c 100644 --- a/arch/arm/boot/dts/r8a7745.dtsi +++ b/arch/arm/boot/dts/r8a7745.dtsi @@ -951,6 +951,9 @@ reg = <0 0xe6590000 0 0x100>; interrupts = ; clocks = <&cpg CPG_MOD 704>; + dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, + <&usb_dmac1 0>, <&usb_dmac1 1>; + dma-names = "ch0", "ch1", "ch2", "ch3"; power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; resets = <&cpg 704>; renesas,buswait = <4>; -- cgit v1.2.3-59-g8ed1b From b73ae2bdd83af78e5057d20ab2884cfd004c8543 Mon Sep 17 00:00:00 2001 From: Biju Das Date: Mon, 23 Oct 2017 18:09:29 +0100 Subject: ARM: dts: iwg22d-sodimm: Enable HS-USB From: Biju Das Enable HS-USB on iWave RZ/G1E carrier board. Signed-off-by: Biju Das Reviewed-by: Fabrizio Castro Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts index 3eb4f83297d4..80c82aa94c06 100644 --- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts +++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts @@ -67,6 +67,12 @@ status = "okay"; }; +&hsusb { + status = "okay"; + pinctrl-0 = <&usb0_pins>; + pinctrl-names = "default"; +}; + &pci1 { status = "okay"; pinctrl-0 = <&usb1_pins>; @@ -95,6 +101,11 @@ power-source = <3300>; }; + usb0_pins: usb0 { + groups = "usb0"; + function = "usb0"; + }; + usb1_pins: usb1 { groups = "usb1"; function = "usb1"; -- cgit v1.2.3-59-g8ed1b From 0ee0aff583ddb6e92a5d05a1f2147a772413ab40 Mon Sep 17 00:00:00 2001 From: Fabrizio Castro Date: Mon, 23 Oct 2017 18:09:30 +0100 Subject: ARM: dts: r8a7745: Add IIC cores to dtsi Add iic0 and iic1 nodes to SoC dtsi. Also, define aliases i2c6 and i2c7. Board specific DT files will enable the interfaces if needed. Signed-off-by: Fabrizio Castro Reviewed-by: Chris Paterson Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7745.dtsi | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi index 948dd1fc2d9c..16dc4895b455 100644 --- a/arch/arm/boot/dts/r8a7745.dtsi +++ b/arch/arm/boot/dts/r8a7745.dtsi @@ -25,6 +25,8 @@ i2c3 = &i2c3; i2c4 = &i2c4; i2c5 = &i2c5; + i2c6 = &iic0; + i2c7 = &iic1; spi0 = &qspi; spi1 = &msiof0; spi2 = &msiof1; @@ -753,6 +755,40 @@ status = "disabled"; }; + iic0: i2c@e6500000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,iic-r8a7745", + "renesas,rcar-gen2-iic", + "renesas,rmobile-iic"; + reg = <0 0xe6500000 0 0x425>; + interrupts = ; + clocks = <&cpg CPG_MOD 318>; + dmas = <&dmac0 0x61>, <&dmac0 0x62>, + <&dmac1 0x61>, <&dmac1 0x62>; + dma-names = "tx", "rx", "tx", "rx"; + power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; + resets = <&cpg 318>; + status = "disabled"; + }; + + iic1: i2c@e6510000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,iic-r8a7745", + "renesas,rcar-gen2-iic", + "renesas,rmobile-iic"; + reg = <0 0xe6510000 0 0x425>; + interrupts = ; + clocks = <&cpg CPG_MOD 323>; + dmas = <&dmac0 0x65>, <&dmac0 0x66>, + <&dmac1 0x65>, <&dmac1 0x66>; + dma-names = "tx", "rx", "tx", "rx"; + power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; + resets = <&cpg 323>; + status = "disabled"; + }; + mmcif0: mmc@ee200000 { compatible = "renesas,mmcif-r8a7745", "renesas,sh-mmcif"; -- cgit v1.2.3-59-g8ed1b From 67eee4eeb3cd4df684a18f3824ea8030ea37d442 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Tue, 17 Oct 2017 08:09:51 +0200 Subject: ARM: dts: r8a7743: Use R-Car SDHI Gen2 fallback compat string Use newly added R-Car SDHI Gen2 fallback compat string in the DT of the r8a7743 SoC. This should have no run-time effect as the driver matches against the per-SoC compat string before considering the fallback compat string. Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7743.dtsi | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi index 112a72baa7a4..6aa86b75b80c 100644 --- a/arch/arm/boot/dts/r8a7743.dtsi +++ b/arch/arm/boot/dts/r8a7743.dtsi @@ -954,7 +954,8 @@ }; sdhi0: sd@ee100000 { - compatible = "renesas,sdhi-r8a7743"; + compatible = "renesas,sdhi-r8a7743", + "renesas,rcar-gen2-sdhi"; reg = <0 0xee100000 0 0x328>; interrupts = ; clocks = <&cpg CPG_MOD 314>; @@ -968,7 +969,8 @@ }; sdhi1: sd@ee140000 { - compatible = "renesas,sdhi-r8a7743"; + compatible = "renesas,sdhi-r8a7743", + "renesas,rcar-gen2-sdhi"; reg = <0 0xee140000 0 0x100>; interrupts = ; clocks = <&cpg CPG_MOD 312>; @@ -982,7 +984,8 @@ }; sdhi2: sd@ee160000 { - compatible = "renesas,sdhi-r8a7743"; + compatible = "renesas,sdhi-r8a7743", + "renesas,rcar-gen2-sdhi"; reg = <0 0xee160000 0 0x100>; interrupts = ; clocks = <&cpg CPG_MOD 311>; -- cgit v1.2.3-59-g8ed1b From 35098dd2e37d51cdab26637479fb892c254c2555 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Tue, 17 Oct 2017 08:09:52 +0200 Subject: ARM: dts: r8a7745: Use R-Car SDHI Gen2 fallback compat string Use newly added R-Car SDHI Gen2 fallback compat string in the DT of the r8a7745 SoC. This should have no run-time effect as the driver matches against the per-SoC compat string before considering the fallback compat string. Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7745.dtsi | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi index 16dc4895b455..846c27a00c54 100644 --- a/arch/arm/boot/dts/r8a7745.dtsi +++ b/arch/arm/boot/dts/r8a7745.dtsi @@ -870,7 +870,8 @@ }; sdhi0: sd@ee100000 { - compatible = "renesas,sdhi-r8a7745"; + compatible = "renesas,sdhi-r8a7745", + "renesas,rcar-gen2-sdhi"; reg = <0 0xee100000 0 0x328>; interrupts = ; clocks = <&cpg CPG_MOD 314>; @@ -884,7 +885,8 @@ }; sdhi1: sd@ee140000 { - compatible = "renesas,sdhi-r8a7745"; + compatible = "renesas,sdhi-r8a7745", + "renesas,rcar-gen2-sdhi"; reg = <0 0xee140000 0 0x100>; interrupts = ; clocks = <&cpg CPG_MOD 312>; @@ -898,7 +900,8 @@ }; sdhi2: sd@ee160000 { - compatible = "renesas,sdhi-r8a7745"; + compatible = "renesas,sdhi-r8a7745", + "renesas,rcar-gen2-sdhi"; reg = <0 0xee160000 0 0x100>; interrupts = ; clocks = <&cpg CPG_MOD 311>; -- cgit v1.2.3-59-g8ed1b From bce90b30fc0b65fb4a7c89135a563f5cffdf64cd Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Tue, 17 Oct 2017 08:09:53 +0200 Subject: ARM: dts: r8a7778: Use R-Car SDHI Gen1 fallback compat string Use newly added R-Car SDHI Gen1 fallback compat string in the DT of the r8a7778 SoC. This should have no run-time effect as the driver matches against the per-SoC compat string before considering the fallback compat string. Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7778.dtsi | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi index d6e3c0400ec3..3b49f9ed2e2b 100644 --- a/arch/arm/boot/dts/r8a7778.dtsi +++ b/arch/arm/boot/dts/r8a7778.dtsi @@ -380,7 +380,8 @@ }; sdhi0: sd@ffe4c000 { - compatible = "renesas,sdhi-r8a7778"; + compatible = "renesas,sdhi-r8a7778", + "renesas,rcar-gen1-sdhi"; reg = <0xffe4c000 0x100>; interrupts = ; clocks = <&mstp3_clks R8A7778_CLK_SDHI0>; @@ -389,7 +390,8 @@ }; sdhi1: sd@ffe4d000 { - compatible = "renesas,sdhi-r8a7778"; + compatible = "renesas,sdhi-r8a7778", + "renesas,rcar-gen1-sdhi"; reg = <0xffe4d000 0x100>; interrupts = ; clocks = <&mstp3_clks R8A7778_CLK_SDHI1>; @@ -398,7 +400,8 @@ }; sdhi2: sd@ffe4f000 { - compatible = "renesas,sdhi-r8a7778"; + compatible = "renesas,sdhi-r8a7778", + "renesas,rcar-gen1-sdhi"; reg = <0xffe4f000 0x100>; interrupts = ; clocks = <&mstp3_clks R8A7778_CLK_SDHI2>; -- cgit v1.2.3-59-g8ed1b From 0863a6ef429790f4a44031b52f313480e25fb9f0 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Tue, 17 Oct 2017 08:09:54 +0200 Subject: ARM: dts: r8a7779: Use R-Car SDHI Gen1 fallback compat string Use newly added R-Car SDHI Gen1 fallback compat string in the DT of the r8a7779 SoC. This should have no run-time effect as the driver matches against the per-SoC compat string before considering the fallback compat string. Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7779.dtsi | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi index e8eb94748b27..e79ae306eedd 100644 --- a/arch/arm/boot/dts/r8a7779.dtsi +++ b/arch/arm/boot/dts/r8a7779.dtsi @@ -355,7 +355,8 @@ }; sdhi0: sd@ffe4c000 { - compatible = "renesas,sdhi-r8a7779"; + compatible = "renesas,sdhi-r8a7779", + "renesas,rcar-gen1-sdhi"; reg = <0xffe4c000 0x100>; interrupts = ; clocks = <&mstp3_clks R8A7779_CLK_SDHI0>; @@ -364,7 +365,8 @@ }; sdhi1: sd@ffe4d000 { - compatible = "renesas,sdhi-r8a7779"; + compatible = "renesas,sdhi-r8a7779", + "renesas,rcar-gen1-sdhi"; reg = <0xffe4d000 0x100>; interrupts = ; clocks = <&mstp3_clks R8A7779_CLK_SDHI1>; @@ -373,7 +375,8 @@ }; sdhi2: sd@ffe4e000 { - compatible = "renesas,sdhi-r8a7779"; + compatible = "renesas,sdhi-r8a7779", + "renesas,rcar-gen1-sdhi"; reg = <0xffe4e000 0x100>; interrupts = ; clocks = <&mstp3_clks R8A7779_CLK_SDHI2>; @@ -382,7 +385,8 @@ }; sdhi3: sd@ffe4f000 { - compatible = "renesas,sdhi-r8a7779"; + compatible = "renesas,sdhi-r8a7779", + "renesas,rcar-gen1-sdhi"; reg = <0xffe4f000 0x100>; interrupts = ; clocks = <&mstp3_clks R8A7779_CLK_SDHI3>; -- cgit v1.2.3-59-g8ed1b From e0ac55614d1013efcd46e018612a7a11ea79f1c1 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Tue, 17 Oct 2017 08:09:55 +0200 Subject: ARM: dts: r8a7790: Use R-Car SDHI Gen2 fallback compat string Use newly added R-Car SDHI Gen2 fallback compat string in the DT of the r8a7790 SoC. This should have no run-time effect as the driver matches against the per-SoC compat string before considering the fallback compat string. Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7790.dtsi | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index 4fc607e8e40c..6ea06455c0d1 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi @@ -662,7 +662,8 @@ }; sdhi0: sd@ee100000 { - compatible = "renesas,sdhi-r8a7790"; + compatible = "renesas,sdhi-r8a7790", + "renesas,rcar-gen2-sdhi"; reg = <0 0xee100000 0 0x328>; interrupts = ; clocks = <&cpg CPG_MOD 314>; @@ -676,7 +677,8 @@ }; sdhi1: sd@ee120000 { - compatible = "renesas,sdhi-r8a7790"; + compatible = "renesas,sdhi-r8a7790", + "renesas,rcar-gen2-sdhi"; reg = <0 0xee120000 0 0x328>; interrupts = ; clocks = <&cpg CPG_MOD 313>; @@ -690,7 +692,8 @@ }; sdhi2: sd@ee140000 { - compatible = "renesas,sdhi-r8a7790"; + compatible = "renesas,sdhi-r8a7790", + "renesas,rcar-gen2-sdhi"; reg = <0 0xee140000 0 0x100>; interrupts = ; clocks = <&cpg CPG_MOD 312>; @@ -704,7 +707,8 @@ }; sdhi3: sd@ee160000 { - compatible = "renesas,sdhi-r8a7790"; + compatible = "renesas,sdhi-r8a7790", + "renesas,rcar-gen2-sdhi"; reg = <0 0xee160000 0 0x100>; interrupts = ; clocks = <&cpg CPG_MOD 311>; -- cgit v1.2.3-59-g8ed1b From 8423f640cfff6a32f95983e4e60795f77369dca2 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Tue, 17 Oct 2017 08:09:56 +0200 Subject: ARM: dts: r8a7791: Use R-Car SDHI Gen2 fallback compat string Use newly added R-Car SDHI Gen2 fallback compat string in the DT of the r8a7791 SoC. This should have no run-time effect as the driver matches against the per-SoC compat string before considering the fallback compat string. Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7791.dtsi | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index 9815a933e4cc..e888b5b0e135 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi @@ -612,7 +612,8 @@ }; sdhi0: sd@ee100000 { - compatible = "renesas,sdhi-r8a7791"; + compatible = "renesas,sdhi-r8a7791", + "renesas,rcar-gen2-sdhi"; reg = <0 0xee100000 0 0x328>; interrupts = ; clocks = <&cpg CPG_MOD 314>; @@ -626,7 +627,8 @@ }; sdhi1: sd@ee140000 { - compatible = "renesas,sdhi-r8a7791"; + compatible = "renesas,sdhi-r8a7791", + "renesas,rcar-gen2-sdhi"; reg = <0 0xee140000 0 0x100>; interrupts = ; clocks = <&cpg CPG_MOD 312>; @@ -640,7 +642,8 @@ }; sdhi2: sd@ee160000 { - compatible = "renesas,sdhi-r8a7791"; + compatible = "renesas,sdhi-r8a7791", + "renesas,rcar-gen2-sdhi"; reg = <0 0xee160000 0 0x100>; interrupts = ; clocks = <&cpg CPG_MOD 311>; -- cgit v1.2.3-59-g8ed1b From 40fcacbe2f6c7a7efea9be683e62bde34afe7c13 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Tue, 17 Oct 2017 08:09:57 +0200 Subject: ARM: dts: r8a7792: Use R-Car SDHI Gen2 fallback compat string Use newly added R-Car SDHI Gen2 fallback compat string in the DT of the r8a7792 SoC. This should have no run-time effect as the driver matches against the per-SoC compat string before considering the fallback compat string. Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7792.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi index 131f65b0426e..7b394273031e 100644 --- a/arch/arm/boot/dts/r8a7792.dtsi +++ b/arch/arm/boot/dts/r8a7792.dtsi @@ -507,7 +507,8 @@ }; sdhi0: sd@ee100000 { - compatible = "renesas,sdhi-r8a7792"; + compatible = "renesas,sdhi-r8a7792", + "renesas,rcar-gen2-sdhi"; reg = <0 0xee100000 0 0x328>; interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>; dmas = <&dmac0 0xcd>, <&dmac0 0xce>, -- cgit v1.2.3-59-g8ed1b From 21b997ea9dcabe7af05eb0c7272955f95b473452 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Tue, 17 Oct 2017 08:09:58 +0200 Subject: ARM: dts: r8a7793: Use R-Car SDHI Gen2 fallback compat string Use newly added R-Car SDHI Gen2 fallback compat string in the DT of the r8a7793 SoC. This should have no run-time effect as the driver matches against the per-SoC compat string before considering the fallback compat string. Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7793.dtsi | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi index 196afec766c6..6e74d0855931 100644 --- a/arch/arm/boot/dts/r8a7793.dtsi +++ b/arch/arm/boot/dts/r8a7793.dtsi @@ -562,7 +562,8 @@ }; sdhi0: sd@ee100000 { - compatible = "renesas,sdhi-r8a7793"; + compatible = "renesas,sdhi-r8a7793", + "renesas,rcar-gen2-sdhi"; reg = <0 0xee100000 0 0x328>; interrupts = ; clocks = <&cpg CPG_MOD 314>; @@ -576,7 +577,8 @@ }; sdhi1: sd@ee140000 { - compatible = "renesas,sdhi-r8a7793"; + compatible = "renesas,sdhi-r8a7793", + "renesas,rcar-gen2-sdhi"; reg = <0 0xee140000 0 0x100>; interrupts = ; clocks = <&cpg CPG_MOD 312>; @@ -590,7 +592,8 @@ }; sdhi2: sd@ee160000 { - compatible = "renesas,sdhi-r8a7793"; + compatible = "renesas,sdhi-r8a7793", + "renesas,rcar-gen2-sdhi"; reg = <0 0xee160000 0 0x100>; interrupts = ; clocks = <&cpg CPG_MOD 311>; -- cgit v1.2.3-59-g8ed1b From 53b2d8f7e8a18232f513c7bafa90d7fda9b36062 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Tue, 17 Oct 2017 08:09:59 +0200 Subject: ARM: dts: r8a7794: Use R-Car SDHI Gen2 fallback compat string Use newly added R-Car SDHI Gen2 fallback compat string in the DT of the r8a7794 SoC. This should have no run-time effect as the driver matches against the per-SoC compat string before considering the fallback compat string. Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7794.dtsi | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi index 148c2567a6ce..95206c25e6a1 100644 --- a/arch/arm/boot/dts/r8a7794.dtsi +++ b/arch/arm/boot/dts/r8a7794.dtsi @@ -792,7 +792,8 @@ }; sdhi0: sd@ee100000 { - compatible = "renesas,sdhi-r8a7794"; + compatible = "renesas,sdhi-r8a7794", + "renesas,rcar-gen2-sdhi"; reg = <0 0xee100000 0 0x328>; interrupts = ; clocks = <&cpg CPG_MOD 314>; @@ -806,7 +807,8 @@ }; sdhi1: sd@ee140000 { - compatible = "renesas,sdhi-r8a7794"; + compatible = "renesas,sdhi-r8a7794", + "renesas,rcar-gen2-sdhi"; reg = <0 0xee140000 0 0x100>; interrupts = ; clocks = <&cpg CPG_MOD 312>; @@ -820,7 +822,8 @@ }; sdhi2: sd@ee160000 { - compatible = "renesas,sdhi-r8a7794"; + compatible = "renesas,sdhi-r8a7794", + "renesas,rcar-gen2-sdhi"; reg = <0 0xee160000 0 0x100>; interrupts = ; clocks = <&cpg CPG_MOD 311>; -- cgit v1.2.3-59-g8ed1b From 77014a7c654c76e1c0cf82563cc48e07c546461c Mon Sep 17 00:00:00 2001 From: Fabrizio Castro Date: Mon, 9 Oct 2017 10:06:21 +0100 Subject: ARM: dts: iwg20d-q7: Add support for ttySC3 Signed-off-by: Fabrizio Castro Signed-off-by: Chris Paterson Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/iwg20d-q7-common.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/iwg20d-q7-common.dtsi b/arch/arm/boot/dts/iwg20d-q7-common.dtsi index efd8af9242d1..c865499ad2a1 100644 --- a/arch/arm/boot/dts/iwg20d-q7-common.dtsi +++ b/arch/arm/boot/dts/iwg20d-q7-common.dtsi @@ -11,6 +11,7 @@ / { aliases { serial0 = &scif0; + serial3 = &scifb1; ethernet0 = &avb; }; @@ -104,6 +105,11 @@ function = "scif0"; }; + scifb1_pins: scifb1 { + groups = "scifb1_data_d", "scifb1_ctrl"; + function = "scifb1"; + }; + sdhi1_pins: sd1 { groups = "sdhi1_data4", "sdhi1_ctrl"; function = "sdhi1"; @@ -134,6 +140,14 @@ status = "okay"; }; +&scifb1 { + pinctrl-0 = <&scifb1_pins>; + pinctrl-names = "default"; + + uart-has-rtscts; + status = "okay"; +}; + &sdhi1 { pinctrl-0 = <&sdhi1_pins>; pinctrl-1 = <&sdhi1_pins_uhs>; -- cgit v1.2.3-59-g8ed1b From d72f4f03854d1225c72d682bf0e01377e7016419 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Thu, 2 Nov 2017 10:18:05 +0100 Subject: ARM: dts: koelsch: Move cec_clock to root node cec-clock is a fixed clock generator that is not controlled by i2c5 and thus should not be a child of the i2c5 bus node. Rather, it should be a child of the root node of the DT. Fixes: 02a5ab18d366 ("ARM: dts: koelsch: Add CEC clock for HDMI transmitter") Reported-by: Laurent Pinchart Signed-off-by: Simon Horman Reviewed-by: Laurent Pinchart --- arch/arm/boot/dts/r8a7791-koelsch.dts | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts index e164eda69baf..4126de417922 100644 --- a/arch/arm/boot/dts/r8a7791-koelsch.dts +++ b/arch/arm/boot/dts/r8a7791-koelsch.dts @@ -278,6 +278,12 @@ }; }; + cec_clock: cec-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <12000000>; + }; + hdmi-out { compatible = "hdmi-connector"; type = "a"; @@ -640,12 +646,6 @@ }; }; - cec_clock: cec-clock { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <12000000>; - }; - hdmi@39 { compatible = "adi,adv7511w"; reg = <0x39>; -- cgit v1.2.3-59-g8ed1b From 5841b8b32b56f8c9a289032614936ce334227c67 Mon Sep 17 00:00:00 2001 From: Fabrizio Castro Date: Mon, 6 Nov 2017 18:26:53 +0000 Subject: ARM: dts: r8a7745: Add DU support Add du node to r8a7745 SoC DT. Boards that want to enable the DU need to specify the output topology. Signed-off-by: Fabrizio Castro Reviewed-by: Biju Das Reviewed-by: Laurent Pinchart Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7745.dtsi | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi index 846c27a00c54..53eb1ce446a4 100644 --- a/arch/arm/boot/dts/r8a7745.dtsi +++ b/arch/arm/boot/dts/r8a7745.dtsi @@ -821,6 +821,33 @@ status = "disabled"; }; + du: display@feb00000 { + compatible = "renesas,du-r8a7745"; + reg = <0 0xfeb00000 0 0x40000>; + reg-names = "du"; + interrupts = , + ; + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>; + clock-names = "du.0", "du.1"; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + du_out_rgb0: endpoint { + }; + }; + port@1 { + reg = <1>; + du_out_rgb1: endpoint { + }; + }; + }; + }; + msiof0: spi@e6e20000 { compatible = "renesas,msiof-r8a7745", "renesas,rcar-gen2-msiof"; -- cgit v1.2.3-59-g8ed1b From 97b94d256d432ba9e1b37f9b21c3b285caf11de6 Mon Sep 17 00:00:00 2001 From: Fabrizio Castro Date: Mon, 6 Nov 2017 18:26:54 +0000 Subject: ARM: dts: iwg22d-sodimm-dbhd-ca: Add HDMI video output This patch enables the HDMI interface found on the expansion board. Signed-off-by: Fabrizio Castro Reviewed-by: Biju Das Acked-by: Laurent Pinchart Signed-off-by: Simon Horman --- .../arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts | 85 ++++++++++++++++++++++ 1 file changed, 85 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts index f925388454da..a8a4ec87378d 100644 --- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts +++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts @@ -20,6 +20,38 @@ serial4 = &scif5; serial6 = &hscif2; }; + + cec_clock: cec-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <12000000>; + }; + + hdmi-out { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_con: endpoint { + remote-endpoint = <&adv7511_out>; + }; + }; + }; +}; + +&du { + pinctrl-0 = <&du0_pins>; + pinctrl-names = "default"; + + status = "okay"; + + ports { + port@0 { + endpoint { + remote-endpoint = <&adv7511_in>; + }; + }; + }; }; &hscif2 { @@ -29,12 +61,65 @@ status = "okay"; }; +&i2c1 { + pinctrl-0 = <&i2c1_pins>; + pinctrl-names = "default"; + + status = "okay"; + clock-frequency = <400000>; + + hdmi@39 { + compatible = "adi,adv7511w"; + reg = <0x39>; + interrupt-parent = <&gpio1>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + clocks = <&cec_clock>; + clock-names = "cec"; + pd-gpios = <&gpio2 24 GPIO_ACTIVE_HIGH>; + + adi,input-depth = <8>; + adi,input-colorspace = "rgb"; + adi,input-clock = "1x"; + adi,input-style = <1>; + adi,input-justification = "evenly"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + adv7511_in: endpoint { + remote-endpoint = <&du_out_rgb0>; + }; + }; + + port@1 { + reg = <1>; + adv7511_out: endpoint { + remote-endpoint = <&hdmi_con>; + }; + }; + }; + }; +}; + &pfc { + du0_pins: du0 { + groups = "du0_rgb888", "du0_sync", "du0_disp", "du0_clk0_out"; + function = "du0"; + }; + hscif2_pins: hscif2 { groups = "hscif2_data"; function = "hscif2"; }; + i2c1_pins: i2c1 { + groups = "i2c1_d"; + function = "i2c1"; + }; + scif1_pins: scif1 { groups = "scif1_data"; function = "scif1"; -- cgit v1.2.3-59-g8ed1b From 85d3122659be310c632ef1908532157ce82900ee Mon Sep 17 00:00:00 2001 From: Fabrizio Castro Date: Tue, 7 Nov 2017 15:10:44 +0000 Subject: ARM: dts: r8a7745: Add CAN[01] SoC support Add the definitions for can0 and can1 to the SoC .dtsi. Signed-off-by: Fabrizio Castro Reviewed-by: Biju Das Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7745.dtsi | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi index 53eb1ce446a4..52f13246fc8a 100644 --- a/arch/arm/boot/dts/r8a7745.dtsi +++ b/arch/arm/boot/dts/r8a7745.dtsi @@ -1049,6 +1049,34 @@ #phy-cells = <1>; }; }; + + can0: can@e6e80000 { + compatible = "renesas,can-r8a7745", + "renesas,rcar-gen2-can"; + reg = <0 0xe6e80000 0 0x1000>; + interrupts = ; + clocks = <&cpg CPG_MOD 916>, + <&cpg CPG_CORE R8A7745_CLK_RCAN>, + <&can_clk>; + clock-names = "clkp1", "clkp2", "can_clk"; + power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; + resets = <&cpg 916>; + status = "disabled"; + }; + + can1: can@e6e88000 { + compatible = "renesas,can-r8a7745", + "renesas,rcar-gen2-can"; + reg = <0 0xe6e88000 0 0x1000>; + interrupts = ; + clocks = <&cpg CPG_MOD 915>, + <&cpg CPG_CORE R8A7745_CLK_RCAN>, + <&can_clk>; + clock-names = "clkp1", "clkp2", "can_clk"; + power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; + resets = <&cpg 915>; + status = "disabled"; + }; }; /* External root clock */ @@ -1066,6 +1094,14 @@ clock-frequency = <48000000>; }; + /* External CAN clock */ + can_clk: can { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overridden by the board. */ + clock-frequency = <0>; + }; + /* External SCIF clock */ scif_clk: scif { compatible = "fixed-clock"; -- cgit v1.2.3-59-g8ed1b From 805a5263f4212e431a44c4a04738022a2498f652 Mon Sep 17 00:00:00 2001 From: Fabrizio Castro Date: Tue, 7 Nov 2017 15:10:45 +0000 Subject: ARM: dts: iwg22d-sodimm: Add can0 support to carrier board This patch enables CAN0 interface exposed through connector J15 on the carrier board. Signed-off-by: Fabrizio Castro Reviewed-by: Biju Das Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts index 80c82aa94c06..39ce7e7101c7 100644 --- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts +++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts @@ -59,6 +59,13 @@ }; }; +&can0 { + pinctrl-0 = <&can0_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + &hscif1 { pinctrl-0 = <&hscif1_pins>; pinctrl-names = "default"; @@ -85,6 +92,11 @@ function = "avb"; }; + can0_pins: can0 { + groups = "can0_data"; + function = "can0"; + }; + hscif1_pins: hscif1 { groups = "hscif1_data", "hscif1_ctrl"; function = "hscif1"; -- cgit v1.2.3-59-g8ed1b From d6033e7c6589c74299635eb3d84c56ccac8db5e4 Mon Sep 17 00:00:00 2001 From: Fabrizio Castro Date: Tue, 7 Nov 2017 15:10:46 +0000 Subject: ARM: dts: iwg22d-sodimm-dbhd-ca: Add can1 support to HDMI DB CAN1 interface is exposed via connector J1 found on the HDMI daughter board. This patch enables can1 DT node from within the daughter board specific device tree. Signed-off-by: Fabrizio Castro Reviewed-by: Biju Das Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts index a8a4ec87378d..d34de8266ccd 100644 --- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts +++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts @@ -54,6 +54,13 @@ }; }; +&can1 { + pinctrl-0 = <&can1_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + &hscif2 { pinctrl-0 = <&hscif2_pins>; pinctrl-names = "default"; @@ -105,6 +112,11 @@ }; &pfc { + can1_pins: can1 { + groups = "can1_data_b"; + function = "can1"; + }; + du0_pins: du0 { groups = "du0_rgb888", "du0_sync", "du0_disp", "du0_clk0_out"; function = "du0"; -- cgit v1.2.3-59-g8ed1b From 6ee6959fb85c3e03ec0674d329dc96c733f51dce Mon Sep 17 00:00:00 2001 From: Fabrizio Castro Date: Tue, 7 Nov 2017 15:10:47 +0000 Subject: ARM: dts: r8a7743: Add CAN[01] SoC support Add the definitions for can0 and can1 to the SoC .dtsi. Signed-off-by: Fabrizio Castro Reviewed-by: Biju Das Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7743.dtsi | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi index 6aa86b75b80c..12c7b9267fd7 100644 --- a/arch/arm/boot/dts/r8a7743.dtsi +++ b/arch/arm/boot/dts/r8a7743.dtsi @@ -1067,6 +1067,34 @@ }; }; + can0: can@e6e80000 { + compatible = "renesas,can-r8a7743", + "renesas,rcar-gen2-can"; + reg = <0 0xe6e80000 0 0x1000>; + interrupts = ; + clocks = <&cpg CPG_MOD 916>, + <&cpg CPG_CORE R8A7743_CLK_RCAN>, + <&can_clk>; + clock-names = "clkp1", "clkp2", "can_clk"; + power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; + resets = <&cpg 916>; + status = "disabled"; + }; + + can1: can@e6e88000 { + compatible = "renesas,can-r8a7743", + "renesas,rcar-gen2-can"; + reg = <0 0xe6e88000 0 0x1000>; + interrupts = ; + clocks = <&cpg CPG_MOD 915>, + <&cpg CPG_CORE R8A7743_CLK_RCAN>, + <&can_clk>; + clock-names = "clkp1", "clkp2", "can_clk"; + power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; + resets = <&cpg 915>; + status = "disabled"; + }; + pci0: pci@ee090000 { compatible = "renesas,pci-r8a7743", "renesas,pci-rcar-gen2"; @@ -1153,6 +1181,14 @@ clock-frequency = <48000000>; }; + /* External CAN clock */ + can_clk: can { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overridden by the board. */ + clock-frequency = <0>; + }; + /* External SCIF clock */ scif_clk: scif { compatible = "fixed-clock"; -- cgit v1.2.3-59-g8ed1b From 47f3c7b66b6d316f86b0ce957c99958da0268e36 Mon Sep 17 00:00:00 2001 From: Fabrizio Castro Date: Tue, 7 Nov 2017 15:10:48 +0000 Subject: ARM: dts: iwg20d-q7-common: Add can0 support to carrier board This patch enables CAN0 interface exposed through connector J20 on the carrier board. Signed-off-by: Fabrizio Castro Reviewed-by: Biju Das Signed-off-by: Simon Horman --- arch/arm/boot/dts/iwg20d-q7-common.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/iwg20d-q7-common.dtsi b/arch/arm/boot/dts/iwg20d-q7-common.dtsi index c865499ad2a1..3e4bc4d6b9d3 100644 --- a/arch/arm/boot/dts/iwg20d-q7-common.dtsi +++ b/arch/arm/boot/dts/iwg20d-q7-common.dtsi @@ -59,6 +59,13 @@ }; }; +&can0 { + pinctrl-0 = <&can0_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + &hsusb { status = "okay"; pinctrl-0 = <&usb0_pins>; @@ -90,6 +97,11 @@ }; &pfc { + can0_pins: can0 { + groups = "can0_data_d"; + function = "can0"; + }; + avb_pins: avb { groups = "avb_mdio", "avb_gmii"; function = "avb"; -- cgit v1.2.3-59-g8ed1b From 04e31b155f628e572d4ee2eeda5d6ee20ba86038 Mon Sep 17 00:00:00 2001 From: Fabrizio Castro Date: Tue, 7 Nov 2017 15:10:49 +0000 Subject: ARM: dts: iwg20d-q7-dbcm-ca: Add can1 support to camera DB CAN1 interface is exposed via connector J3 found on the camera daughter board. This patch enables can1 DT node from within the daughter board specific dtsi. Signed-off-by: Fabrizio Castro Reviewed-by: Biju Das Signed-off-by: Simon Horman --- arch/arm/boot/dts/iwg20d-q7-dbcm-ca.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/iwg20d-q7-dbcm-ca.dtsi b/arch/arm/boot/dts/iwg20d-q7-dbcm-ca.dtsi index 4db18f2ef303..476273b3f994 100644 --- a/arch/arm/boot/dts/iwg20d-q7-dbcm-ca.dtsi +++ b/arch/arm/boot/dts/iwg20d-q7-dbcm-ca.dtsi @@ -32,6 +32,13 @@ }; }; +&can1 { + pinctrl-0 = <&can1_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + &du { pinctrl-0 = <&du_pins>; pinctrl-names = "default"; @@ -94,6 +101,11 @@ }; &pfc { + can1_pins: can1 { + groups = "can1_data_d"; + function = "can1"; + }; + du_pins: du { groups = "du_rgb888", "du_sync", "du_oddf", "du_clk_out_0"; function = "du"; -- cgit v1.2.3-59-g8ed1b From a827886558d4b975903824d9786c331e08c60e9b Mon Sep 17 00:00:00 2001 From: Biju Das Date: Mon, 13 Nov 2017 17:43:10 +0000 Subject: ARM: dts: r8a7743: Add default PCIe bus clock This patch adds a default PCIe bus clock node. Signed-off-by: Biju Das Reviewed-by: Fabrizio Castro Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7743.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi index 12c7b9267fd7..de4b8c64d56b 100644 --- a/arch/arm/boot/dts/r8a7743.dtsi +++ b/arch/arm/boot/dts/r8a7743.dtsi @@ -1189,6 +1189,13 @@ clock-frequency = <0>; }; + /* External PCIe clock - can be overridden by the board */ + pcie_bus_clk: pcie_bus { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + /* External SCIF clock */ scif_clk: scif { compatible = "fixed-clock"; -- cgit v1.2.3-59-g8ed1b From 4c5c952e61190e5a0e06128156eef84d290a0045 Mon Sep 17 00:00:00 2001 From: Biju Das Date: Mon, 13 Nov 2017 17:43:11 +0000 Subject: ARM: dts: r8a7743: Add PCIe Controller device node Signed-off-by: Biju Das Reviewed-by: Fabrizio Castro Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7743.dtsi | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi index de4b8c64d56b..9e26c40976ff 100644 --- a/arch/arm/boot/dts/r8a7743.dtsi +++ b/arch/arm/boot/dts/r8a7743.dtsi @@ -1164,6 +1164,34 @@ phy-names = "usb"; }; }; + + pciec: pcie@fe000000 { + compatible = "renesas,pcie-r8a7743", + "renesas,pcie-rcar-gen2"; + reg = <0 0xfe000000 0 0x80000>; + #address-cells = <3>; + #size-cells = <2>; + bus-range = <0x00 0xff>; + device_type = "pci"; + ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000 + 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000 + 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000 + 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; + /* Map all possible DDR as inbound ranges */ + dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000 + 0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>; + interrupts = , + , + ; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; + clock-names = "pcie", "pcie_bus"; + power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; + resets = <&cpg 319>; + status = "disabled"; + }; }; /* External root clock */ -- cgit v1.2.3-59-g8ed1b From b3a0317e312cc6d6359c7a0854d763cde528391d Mon Sep 17 00:00:00 2001 From: Biju Das Date: Mon, 13 Nov 2017 17:43:12 +0000 Subject: ARM: dts: iwg20d-q7: Enable PCIe Controller Enable PCIe Controller & set PCIe bus clock frequency. Signed-off-by: Biju Das Reviewed-by: Fabrizio Castro Signed-off-by: Simon Horman --- arch/arm/boot/dts/iwg20d-q7-common.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/iwg20d-q7-common.dtsi b/arch/arm/boot/dts/iwg20d-q7-common.dtsi index 3e4bc4d6b9d3..54470c6de891 100644 --- a/arch/arm/boot/dts/iwg20d-q7-common.dtsi +++ b/arch/arm/boot/dts/iwg20d-q7-common.dtsi @@ -96,6 +96,14 @@ pinctrl-names = "default"; }; +&pcie_bus_clk { + clock-frequency = <100000000>; +}; + +&pciec { + status = "okay"; +}; + &pfc { can0_pins: can0 { groups = "can0_data_d"; -- cgit v1.2.3-59-g8ed1b From 001b32ae64dbf780d89fbc258c3f1007ee7b34e8 Mon Sep 17 00:00:00 2001 From: Fabrizio Castro Date: Thu, 16 Nov 2017 18:22:50 +0000 Subject: ARM: dts: r8a7743: add VIN dt support Add VIN[012] support to SoC dt. Also, add aliases. Signed-off-by: Fabrizio Castro Reviewed-by: Biju Das Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7743.dtsi | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi index 9e26c40976ff..c09c6672ca37 100644 --- a/arch/arm/boot/dts/r8a7743.dtsi +++ b/arch/arm/boot/dts/r8a7743.dtsi @@ -32,6 +32,9 @@ spi1 = &msiof0; spi2 = &msiof1; spi3 = &msiof2; + vin0 = &vin0; + vin1 = &vin1; + vin2 = &vin2; }; cpus { @@ -1037,6 +1040,39 @@ }; }; + vin0: video@e6ef0000 { + compatible = "renesas,vin-r8a7743", + "renesas,rcar-gen2-vin"; + reg = <0 0xe6ef0000 0 0x1000>; + interrupts = ; + clocks = <&cpg CPG_MOD 811>; + power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; + resets = <&cpg 811>; + status = "disabled"; + }; + + vin1: video@e6ef1000 { + compatible = "renesas,vin-r8a7743", + "renesas,rcar-gen2-vin"; + reg = <0 0xe6ef1000 0 0x1000>; + interrupts = ; + clocks = <&cpg CPG_MOD 810>; + power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; + resets = <&cpg 810>; + status = "disabled"; + }; + + vin2: video@e6ef2000 { + compatible = "renesas,vin-r8a7743", + "renesas,rcar-gen2-vin"; + reg = <0 0xe6ef2000 0 0x1000>; + interrupts = ; + clocks = <&cpg CPG_MOD 809>; + power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; + resets = <&cpg 809>; + status = "disabled"; + }; + du: display@feb00000 { compatible = "renesas,du-r8a7743"; reg = <0 0xfeb00000 0 0x40000>, -- cgit v1.2.3-59-g8ed1b From 1a20f21899e7ae886675874b5b5fb03eb43ea69b Mon Sep 17 00:00:00 2001 From: Fabrizio Castro Date: Thu, 16 Nov 2017 18:22:51 +0000 Subject: ARM: dts: r8a7745: add VIN dt support Add VIN[01] support to SoC dt. Also, add aliases. Signed-off-by: Fabrizio Castro Reviewed-by: Biju Das Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7745.dtsi | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi index 52f13246fc8a..de13e156f071 100644 --- a/arch/arm/boot/dts/r8a7745.dtsi +++ b/arch/arm/boot/dts/r8a7745.dtsi @@ -31,6 +31,8 @@ spi1 = &msiof0; spi2 = &msiof1; spi3 = &msiof2; + vin0 = &vin0; + vin1 = &vin1; }; cpus { @@ -821,6 +823,28 @@ status = "disabled"; }; + vin0: video@e6ef0000 { + compatible = "renesas,vin-r8a7745", + "renesas,rcar-gen2-vin"; + reg = <0 0xe6ef0000 0 0x1000>; + interrupts = ; + clocks = <&cpg CPG_MOD 811>; + power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; + resets = <&cpg 811>; + status = "disabled"; + }; + + vin1: video@e6ef1000 { + compatible = "renesas,vin-r8a7745", + "renesas,rcar-gen2-vin"; + reg = <0 0xe6ef1000 0 0x1000>; + interrupts = ; + clocks = <&cpg CPG_MOD 810>; + power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; + resets = <&cpg 810>; + status = "disabled"; + }; + du: display@feb00000 { compatible = "renesas,du-r8a7745"; reg = <0 0xfeb00000 0 0x40000>; -- cgit v1.2.3-59-g8ed1b From 8834d8667b8509e5968e5689790c4ac5410b47db Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 16 Nov 2017 14:51:35 +0100 Subject: ARM: dts: koelsch: Correct primary compatible value for eeprom The Renesas part number of the two-wire serial interface EEPROM is not 24C02, but R1EX24002ATAS0G. Hence change its primary compatible value to "renesas,r1ex24002", like on Gose. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7791-koelsch.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts index 4126de417922..fac9cdea4965 100644 --- a/arch/arm/boot/dts/r8a7791-koelsch.dts +++ b/arch/arm/boot/dts/r8a7791-koelsch.dts @@ -708,7 +708,7 @@ }; eeprom@50 { - compatible = "renesas,24c02", "atmel,24c02"; + compatible = "renesas,r1ex24002", "atmel,24c02"; reg = <0x50>; pagesize = <16>; }; -- cgit v1.2.3-59-g8ed1b From 8edeee392f5971054bfbad43715d0c0d077e13bf Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 16 Nov 2017 14:51:36 +0100 Subject: ARM: dts: genmai: Correct primary compatible value for eeprom The Renesas part number of the two-wire serial interface EEPROM is not 24C128, but R1EX24128ASA00A. Hence change its primary compatible value to "renesas,r1ex24128". Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r7s72100-genmai.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r7s72100-genmai.dts b/arch/arm/boot/dts/r7s72100-genmai.dts index cd4d5ff7749e..5af2a0116ff2 100644 --- a/arch/arm/boot/dts/r7s72100-genmai.dts +++ b/arch/arm/boot/dts/r7s72100-genmai.dts @@ -123,7 +123,7 @@ pinctrl-0 = <&i2c2_pins>; eeprom@50 { - compatible = "renesas,24c128", "atmel,24c128"; + compatible = "renesas,r1ex24128", "atmel,24c128"; reg = <0x50>; pagesize = <64>; }; -- cgit v1.2.3-59-g8ed1b From 3984d64aba35f9a317e4afa48f48b4cc6f46d084 Mon Sep 17 00:00:00 2001 From: Aparna Balasubramanian Date: Thu, 9 Nov 2017 09:40:04 -0600 Subject: ARM: davinci_all_defconfig: enable support for USB network adaptors Enables CONFIG_USB_USBNET so that well known USB network adapters can enumerate as network interfaces. Signed-off-by: Aparna Balasubramanian Signed-off-by: Sekhar Nori --- arch/arm/configs/davinci_all_defconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/arm/configs/davinci_all_defconfig b/arch/arm/configs/davinci_all_defconfig index bd0cf22f9ceb..026154c1d55a 100644 --- a/arch/arm/configs/davinci_all_defconfig +++ b/arch/arm/configs/davinci_all_defconfig @@ -94,6 +94,7 @@ CONFIG_PPP=m CONFIG_PPP_DEFLATE=m CONFIG_PPP_ASYNC=m CONFIG_PPP_SYNC_TTY=m +CONFIG_USB_USBNET=m CONFIG_INPUT_EVDEV=m CONFIG_INPUT_EVBUG=m CONFIG_KEYBOARD_ATKBD=m -- cgit v1.2.3-59-g8ed1b From 0cd070c9f5ba87a0e4fc89b950209e89dfd3e85a Mon Sep 17 00:00:00 2001 From: Russell King Date: Tue, 6 Sep 2016 19:09:49 +0100 Subject: ARM: sa1111: remove legacy shutdown method Since the only user of the SA1111 device driver shutdown method has now gone, we can kill the bus level support code and the entry in the sa1111 device driver structure. Signed-off-by: Russell King --- arch/arm/common/sa1111.c | 9 --------- arch/arm/include/asm/hardware/sa1111.h | 1 - 2 files changed, 10 deletions(-) (limited to 'arch') diff --git a/arch/arm/common/sa1111.c b/arch/arm/common/sa1111.c index 4ecd5120fce7..1fcf06d1cda8 100644 --- a/arch/arm/common/sa1111.c +++ b/arch/arm/common/sa1111.c @@ -1401,14 +1401,6 @@ static int sa1111_bus_resume(struct device *dev) return ret; } -static void sa1111_bus_shutdown(struct device *dev) -{ - struct sa1111_driver *drv = SA1111_DRV(dev->driver); - - if (drv && drv->shutdown) - drv->shutdown(to_sa1111_device(dev)); -} - static int sa1111_bus_probe(struct device *dev) { struct sa1111_dev *sadev = to_sa1111_device(dev); @@ -1438,7 +1430,6 @@ struct bus_type sa1111_bus_type = { .remove = sa1111_bus_remove, .suspend = sa1111_bus_suspend, .resume = sa1111_bus_resume, - .shutdown = sa1111_bus_shutdown, }; EXPORT_SYMBOL(sa1111_bus_type); diff --git a/arch/arm/include/asm/hardware/sa1111.h b/arch/arm/include/asm/hardware/sa1111.h index 0bbf163d1ed3..b4411add2ea8 100644 --- a/arch/arm/include/asm/hardware/sa1111.h +++ b/arch/arm/include/asm/hardware/sa1111.h @@ -433,7 +433,6 @@ struct sa1111_driver { int (*remove)(struct sa1111_dev *); int (*suspend)(struct sa1111_dev *, pm_message_t); int (*resume)(struct sa1111_dev *); - void (*shutdown)(struct sa1111_dev *); }; #define SA1111_DRV(_d) container_of((_d), struct sa1111_driver, drv) -- cgit v1.2.3-59-g8ed1b From 78a68acf3d33a0909895ec41eecc9c3ed6bb2bcf Mon Sep 17 00:00:00 2001 From: Sylwester Nawrocki Date: Fri, 3 Nov 2017 17:54:45 +0100 Subject: ARM: dts: exynos: Switch to dedicated Odroid XU3 sound card binding The new sound card DT binding is used for Odroid XU3 in order to properly support the HDMI audio path. Clocks configuration is changed so the I2S controller is now the bit clock and the frame clock master. The EPLL output clock is now the audio root clock adjusted to each audio sample rate. Signed-off-by: Sylwester Nawrocki Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/exynos4.dtsi | 1 + arch/arm/boot/dts/exynos5420.dtsi | 1 + arch/arm/boot/dts/exynos5422-odroidxu3-audio.dtsi | 60 ++++++++++++++--------- 3 files changed, 40 insertions(+), 22 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi index 4768b086ed67..2db6cfe5d908 100644 --- a/arch/arm/boot/dts/exynos4.dtsi +++ b/arch/arm/boot/dts/exynos4.dtsi @@ -755,6 +755,7 @@ phy = <&hdmi_i2c_phy>; power-domains = <&pd_tv>; samsung,syscon-phandle = <&pmu_system_controller>; + #sound-dai-cells = <0>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index 8aa2cc7aa125..19d48798a80f 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -618,6 +618,7 @@ samsung,syscon-phandle = <&pmu_system_controller>; status = "disabled"; power-domains = <&disp_pd>; + #sound-dai-cells = <0>; }; hdmiphy: hdmiphy@145D0000 { diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-audio.dtsi b/arch/arm/boot/dts/exynos5422-odroidxu3-audio.dtsi index da3141a307d5..fe4d8ef094d0 100644 --- a/arch/arm/boot/dts/exynos5422-odroidxu3-audio.dtsi +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-audio.dtsi @@ -1,5 +1,5 @@ /* - * Hardkernel Odroid XU3 Audio Codec device tree source + * Hardkernel Odroid XU3 audio subsystem device tree source * * Copyright (c) 2015 Krzysztof Kozlowski * Copyright (c) 2014 Collabora Ltd. @@ -15,13 +15,13 @@ / { sound: sound { - compatible = "simple-audio-card"; + compatible = "samsung,odroid-xu3-audio"; + model = "Odroid-XU3"; - simple-audio-card,name = "Odroid-XU3"; - simple-audio-card,widgets = + samsung,audio-widgets = "Headphone", "Headphone Jack", "Speakers", "Speakers"; - simple-audio-card,routing = + samsung,audio-routing = "Headphone Jack", "HPL", "Headphone Jack", "HPR", "Headphone Jack", "MICBIAS", @@ -29,31 +29,47 @@ "Speakers", "SPKL", "Speakers", "SPKR"; - simple-audio-card,format = "i2s"; - simple-audio-card,bitclock-master = <&link0_codec>; - simple-audio-card,frame-master = <&link0_codec>; + assigned-clocks = <&i2s0 CLK_I2S_RCLK_SRC>, + <&clock CLK_MOUT_EPLL>, + <&clock CLK_MOUT_MAU_EPLL>, + <&clock CLK_MOUT_USER_MAU_EPLL>, + <&clock_audss EXYNOS_MOUT_AUDSS>, + <&clock_audss EXYNOS_MOUT_I2S>, + <&clock_audss EXYNOS_DOUT_SRP>, + <&clock_audss EXYNOS_DOUT_AUD_BUS>, + <&clock_audss EXYNOS_DOUT_I2S>; - simple-audio-card,cpu { + assigned-clock-parents = <&clock_audss EXYNOS_SCLK_I2S>, + <&clock CLK_FOUT_EPLL>, + <&clock CLK_MOUT_EPLL>, + <&clock CLK_MOUT_MAU_EPLL>, + <&clock CLK_MAU_EPLL>, + <&clock_audss EXYNOS_MOUT_AUDSS>; + + assigned-clock-rates = <0>, + <0>, + <0>, + <0>, + <0>, + <0>, + <196608001>, + <(196608002 / 2)>, + <196608000>; + + cpu { sound-dai = <&i2s0 0>; - system-clock-frequency = <19200000>; }; - - link0_codec: simple-audio-card,codec { - sound-dai = <&max98090>; - clocks = <&i2s0 CLK_I2S_CDCLK>; + codec { + sound-dai = <&hdmi>, <&max98090>; }; }; }; &clock_audss { - assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>, - <&clock_audss EXYNOS_MOUT_I2S>, - <&clock_audss EXYNOS_DOUT_AUD_BUS>; - assigned-clock-parents = <&clock CLK_FIN_PLL>, - <&clock_audss EXYNOS_MOUT_AUDSS>; - assigned-clock-rates = <0>, - <0>, - <19200000>; + assigned-clocks = <&clock_audss EXYNOS_DOUT_SRP>, + <&clock CLK_FOUT_EPLL>; + assigned-clock-rates = <(196608000 / 256)>, + <196608000>; }; &hsi2c_5 { -- cgit v1.2.3-59-g8ed1b From fe6b204d2182e21b991741141ac80ed217a3038b Mon Sep 17 00:00:00 2001 From: Sylwester Nawrocki Date: Fri, 3 Nov 2017 17:54:46 +0100 Subject: ARM: dts: exynos: Add sound support for Odroid XU4 This patch adds support for Odroid XU4 audio. The main difference comparing to Odroid XU3 is a missing on-board audio CODEC, only HDMI output is supported on Odroid XU4. External CODEC could be optionally connected to the I2S port connector. Signed-off-by: Sylwester Nawrocki Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/exynos5422-odroidxu4.dts | 52 ++++++++++++++++++++++++++++++ 1 file changed, 52 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/exynos5422-odroidxu4.dts b/arch/arm/boot/dts/exynos5422-odroidxu4.dts index 2faf88627a48..0c2f1ef8a552 100644 --- a/arch/arm/boot/dts/exynos5422-odroidxu4.dts +++ b/arch/arm/boot/dts/exynos5422-odroidxu4.dts @@ -12,6 +12,7 @@ */ /dts-v1/; +#include #include "exynos5422-odroidxu3-common.dtsi" / { @@ -30,6 +31,57 @@ linux,default-trigger = "heartbeat"; }; }; + + sound: sound { + compatible = "samsung,odroid-xu3-audio"; + model = "Odroid-XU4"; + + assigned-clocks = <&i2s0 CLK_I2S_RCLK_SRC>, + <&clock CLK_MOUT_EPLL>, + <&clock CLK_MOUT_MAU_EPLL>, + <&clock CLK_MOUT_USER_MAU_EPLL>, + <&clock_audss EXYNOS_MOUT_AUDSS>, + <&clock_audss EXYNOS_MOUT_I2S>, + <&clock_audss EXYNOS_DOUT_SRP>, + <&clock_audss EXYNOS_DOUT_AUD_BUS>, + <&clock_audss EXYNOS_DOUT_I2S>; + + assigned-clock-parents = <&clock_audss EXYNOS_SCLK_I2S>, + <&clock CLK_FOUT_EPLL>, + <&clock CLK_MOUT_EPLL>, + <&clock CLK_MOUT_MAU_EPLL>, + <&clock CLK_MAU_EPLL>, + <&clock_audss EXYNOS_MOUT_AUDSS>; + + assigned-clock-rates = <0>, + <0>, + <0>, + <0>, + <0>, + <0>, + <196608001>, + <(196608002 / 2)>, + <196608000>; + + cpu { + sound-dai = <&i2s0 0>; + }; + + codec { + sound-dai = <&hdmi>; + }; + }; +}; + +&clock_audss { + assigned-clocks = <&clock_audss EXYNOS_DOUT_SRP>, + <&clock CLK_FOUT_EPLL>; + assigned-clock-rates = <(196608000 / 256)>, + <196608000>; +}; + +&i2s0 { + status = "okay"; }; &pwm { -- cgit v1.2.3-59-g8ed1b From 1b377924841df1e13ab5b225be3a83f807a92b52 Mon Sep 17 00:00:00 2001 From: Simon Shields Date: Tue, 21 Nov 2017 22:24:24 +1100 Subject: ARM: dts: exynos: Correct Trats2 panel reset line Trats2 uses gpf2-1 as the panel reset GPIO. gpy4-5 was only used on early revisions of the board. Fixes: 420ae8451a22 ("ARM: dts: exynos4412-trats2: add panel node") Signed-off-by: Simon Shields Acked-by: Marek Szyprowski Tested-by: Marek Szyprowski Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/exynos4412-trats2.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts index 220cdf109405..9f4672ba9943 100644 --- a/arch/arm/boot/dts/exynos4412-trats2.dts +++ b/arch/arm/boot/dts/exynos4412-trats2.dts @@ -454,7 +454,7 @@ reg = <0>; vdd3-supply = <&lcd_vdd3_reg>; vci-supply = <&ldo25_reg>; - reset-gpios = <&gpy4 5 GPIO_ACTIVE_HIGH>; + reset-gpios = <&gpf2 1 GPIO_ACTIVE_HIGH>; power-on-delay= <50>; reset-delay = <100>; init-delay = <100>; -- cgit v1.2.3-59-g8ed1b From f77cbb9a3e5d29eb70377a0f0321cffb2ef54da5 Mon Sep 17 00:00:00 2001 From: Simon Shields Date: Mon, 13 Nov 2017 11:52:03 +1100 Subject: ARM: dts: exynos: Add bcm4334 device node to Trats2 This patch allows the bcm4334 to power on and enables WiFi functionality on Trats2. Signed-off-by: Simon Shields Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/exynos4412-trats2.dts | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts index 9f4672ba9943..f285790e8e04 100644 --- a/arch/arm/boot/dts/exynos4412-trats2.dts +++ b/arch/arm/boot/dts/exynos4412-trats2.dts @@ -300,6 +300,13 @@ }; + wlan_pwrseq: sdhci3-pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&gpj0 0 GPIO_ACTIVE_LOW>; + clocks = <&max77686 MAX77686_CLK_PMIC>; + clock-names = "ext_clock"; + }; + sound { compatible = "samsung,trats2-audio"; samsung,i2s-controller = <&i2s0>; @@ -1350,6 +1357,26 @@ status = "okay"; }; +&sdhci_3 { + #address-cells = <1>; + #size-cells = <0>; + non-removable; + bus-width = <4>; + + mmc-pwrseq = <&wlan_pwrseq>; + pinctrl-names = "default"; + pinctrl-0 = <&sd3_clk &sd3_cmd &sd3_bus4>; + status = "okay"; + + brcmf: wifi@1 { + reg = <1>; + compatible = "brcm,bcm4329-fmac"; + interrupt-parent = <&gpx2>; + interrupts = <5 IRQ_TYPE_NONE>; + interrupt-names = "host-wake"; + }; +}; + &serial_0 { status = "okay"; }; -- cgit v1.2.3-59-g8ed1b From cdd745c8c76b02471d88f467c44a3d4eb431aa0b Mon Sep 17 00:00:00 2001 From: Łukasz Stelmach Date: Mon, 27 Nov 2017 13:37:11 +0100 Subject: ARM: dts: exynos: Remove duplicate definitions of SSS nodes for Exynos5 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Move Security Subsystem nodes common for Exynos5250 and Exynos54xx to exynos5.dtsi to avoid duplication. Signed-off-by: Łukasz Stelmach Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/exynos5.dtsi | 6 ++++++ arch/arm/boot/dts/exynos5250.dtsi | 13 +++++-------- arch/arm/boot/dts/exynos54xx.dtsi | 6 ------ 3 files changed, 11 insertions(+), 14 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi index 66d22521c976..7da4a4285b24 100644 --- a/arch/arm/boot/dts/exynos5.dtsi +++ b/arch/arm/boot/dts/exynos5.dtsi @@ -204,5 +204,11 @@ #size-cells = <0>; status = "disabled"; }; + + sss: sss@10830000 { + compatible = "samsung,exynos4210-secss"; + reg = <0x10830000 0x300>; + interrupts = ; + }; }; }; diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index 5286084e1032..dbe81a1bfd25 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -739,14 +739,6 @@ status = "disabled"; }; - sss@10830000 { - compatible = "samsung,exynos4210-secss"; - reg = <0x10830000 0x300>; - interrupts = ; - clocks = <&clock CLK_SSS>; - clock-names = "secss"; - }; - sysmmu_g2d: sysmmu@10A60000 { compatible = "samsung,exynos-sysmmu"; reg = <0x10A60000 0x1000>; @@ -1092,4 +1084,9 @@ dma-names = "rx", "tx"; }; +&sss { + clocks = <&clock CLK_SSS>; + clock-names = "secss"; +}; + #include "exynos5250-pinctrl.dtsi" diff --git a/arch/arm/boot/dts/exynos54xx.dtsi b/arch/arm/boot/dts/exynos54xx.dtsi index a5007f182bc4..b45678212f1a 100644 --- a/arch/arm/boot/dts/exynos54xx.dtsi +++ b/arch/arm/boot/dts/exynos54xx.dtsi @@ -79,12 +79,6 @@ interrupts = ; }; - sss: sss@10830000 { - compatible = "samsung,exynos4210-secss"; - reg = <0x10830000 0x300>; - interrupts = ; - }; - /* i2c_0-3 are defined in exynos5.dtsi */ hsi2c_4: i2c@12ca0000 { compatible = "samsung,exynos5250-hsi2c"; -- cgit v1.2.3-59-g8ed1b From 699d7a5734c9051d33fb86b57c6d7cd3fb84809b Mon Sep 17 00:00:00 2001 From: Al Viro Date: Mon, 4 Sep 2017 02:37:17 -0400 Subject: um: make sure to have generated headers for target Signed-off-by: Al Viro --- arch/um/Makefile | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'arch') diff --git a/arch/um/Makefile b/arch/um/Makefile index b76fcce397a1..e54dda8a0363 100644 --- a/arch/um/Makefile +++ b/arch/um/Makefile @@ -116,8 +116,15 @@ endef KBUILD_KCONFIG := $(HOST_DIR)/um/Kconfig archheaders: + $(Q)$(MAKE) -f $(srctree)/scripts/Makefile.asm-generic \ + kbuild-file=$(HOST_DIR)/include/asm/Kbuild \ + obj=$(HOST_DIR)/include/generated/asm + $(Q)$(MAKE) -f $(srctree)/scripts/Makefile.asm-generic \ + kbuild-file=$(HOST_DIR)/include/uapi/asm/Kbuild \ + obj=$(HOST_DIR)/include/generated/uapi/asm $(Q)$(MAKE) KBUILD_SRC= ARCH=$(HEADER_ARCH) archheaders + archprepare: include/generated/user_constants.h LINK-$(CONFIG_LD_SCRIPT_STATIC) += -static -- cgit v1.2.3-59-g8ed1b From d759be8953febb6e5b5376c7d9bbf568864c6e2d Mon Sep 17 00:00:00 2001 From: Al Viro Date: Sun, 16 Jul 2017 20:14:55 -0400 Subject: switch wrapper poll.h instances to generic-y Signed-off-by: Al Viro --- arch/alpha/include/uapi/asm/Kbuild | 2 ++ arch/alpha/include/uapi/asm/poll.h | 2 -- arch/ia64/include/uapi/asm/Kbuild | 1 + arch/ia64/include/uapi/asm/poll.h | 2 -- arch/m32r/include/uapi/asm/Kbuild | 1 + arch/m32r/include/uapi/asm/poll.h | 2 -- arch/mn10300/include/uapi/asm/Kbuild | 1 + arch/mn10300/include/uapi/asm/poll.h | 2 -- arch/score/include/uapi/asm/Kbuild | 1 + arch/score/include/uapi/asm/poll.h | 7 ------- arch/x86/include/uapi/asm/Kbuild | 1 + arch/x86/include/uapi/asm/poll.h | 1 - 12 files changed, 7 insertions(+), 16 deletions(-) delete mode 100644 arch/alpha/include/uapi/asm/poll.h delete mode 100644 arch/ia64/include/uapi/asm/poll.h delete mode 100644 arch/m32r/include/uapi/asm/poll.h delete mode 100644 arch/mn10300/include/uapi/asm/poll.h delete mode 100644 arch/score/include/uapi/asm/poll.h delete mode 100644 arch/x86/include/uapi/asm/poll.h (limited to 'arch') diff --git a/arch/alpha/include/uapi/asm/Kbuild b/arch/alpha/include/uapi/asm/Kbuild index b15bf6bc0e94..574fe90c8b58 100644 --- a/arch/alpha/include/uapi/asm/Kbuild +++ b/arch/alpha/include/uapi/asm/Kbuild @@ -1,2 +1,4 @@ # UAPI Header export list include include/uapi/asm-generic/Kbuild.asm + +generic-y += poll.h diff --git a/arch/alpha/include/uapi/asm/poll.h b/arch/alpha/include/uapi/asm/poll.h deleted file mode 100644 index b7132a305a47..000000000000 --- a/arch/alpha/include/uapi/asm/poll.h +++ /dev/null @@ -1,2 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ -#include diff --git a/arch/ia64/include/uapi/asm/Kbuild b/arch/ia64/include/uapi/asm/Kbuild index 13a97aa2285f..4c9825edd4a3 100644 --- a/arch/ia64/include/uapi/asm/Kbuild +++ b/arch/ia64/include/uapi/asm/Kbuild @@ -2,3 +2,4 @@ include include/uapi/asm-generic/Kbuild.asm generic-y += kvm_para.h +generic-y += poll.h diff --git a/arch/ia64/include/uapi/asm/poll.h b/arch/ia64/include/uapi/asm/poll.h deleted file mode 100644 index b7132a305a47..000000000000 --- a/arch/ia64/include/uapi/asm/poll.h +++ /dev/null @@ -1,2 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ -#include diff --git a/arch/m32r/include/uapi/asm/Kbuild b/arch/m32r/include/uapi/asm/Kbuild index 1c44d3b3eba0..21f241553a2e 100644 --- a/arch/m32r/include/uapi/asm/Kbuild +++ b/arch/m32r/include/uapi/asm/Kbuild @@ -2,4 +2,5 @@ include include/uapi/asm-generic/Kbuild.asm generic-y += kvm_para.h +generic-y += poll.h generic-y += siginfo.h diff --git a/arch/m32r/include/uapi/asm/poll.h b/arch/m32r/include/uapi/asm/poll.h deleted file mode 100644 index b7132a305a47..000000000000 --- a/arch/m32r/include/uapi/asm/poll.h +++ /dev/null @@ -1,2 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ -#include diff --git a/arch/mn10300/include/uapi/asm/Kbuild b/arch/mn10300/include/uapi/asm/Kbuild index c94ee54210bc..162fbdbb5fd5 100644 --- a/arch/mn10300/include/uapi/asm/Kbuild +++ b/arch/mn10300/include/uapi/asm/Kbuild @@ -1,4 +1,5 @@ # UAPI Header export list include include/uapi/asm-generic/Kbuild.asm +generic-y += poll.h generic-y += siginfo.h diff --git a/arch/mn10300/include/uapi/asm/poll.h b/arch/mn10300/include/uapi/asm/poll.h deleted file mode 100644 index b7132a305a47..000000000000 --- a/arch/mn10300/include/uapi/asm/poll.h +++ /dev/null @@ -1,2 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ -#include diff --git a/arch/score/include/uapi/asm/Kbuild b/arch/score/include/uapi/asm/Kbuild index c94ee54210bc..162fbdbb5fd5 100644 --- a/arch/score/include/uapi/asm/Kbuild +++ b/arch/score/include/uapi/asm/Kbuild @@ -1,4 +1,5 @@ # UAPI Header export list include include/uapi/asm-generic/Kbuild.asm +generic-y += poll.h generic-y += siginfo.h diff --git a/arch/score/include/uapi/asm/poll.h b/arch/score/include/uapi/asm/poll.h deleted file mode 100644 index c636b85843cd..000000000000 --- a/arch/score/include/uapi/asm/poll.h +++ /dev/null @@ -1,7 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ -#ifndef _ASM_SCORE_POLL_H -#define _ASM_SCORE_POLL_H - -#include - -#endif /* _ASM_SCORE_POLL_H */ diff --git a/arch/x86/include/uapi/asm/Kbuild b/arch/x86/include/uapi/asm/Kbuild index da1489cb64dc..e9f6b8e332bd 100644 --- a/arch/x86/include/uapi/asm/Kbuild +++ b/arch/x86/include/uapi/asm/Kbuild @@ -4,3 +4,4 @@ include include/uapi/asm-generic/Kbuild.asm generated-y += unistd_32.h generated-y += unistd_64.h generated-y += unistd_x32.h +generic-y += poll.h diff --git a/arch/x86/include/uapi/asm/poll.h b/arch/x86/include/uapi/asm/poll.h deleted file mode 100644 index c98509d3149e..000000000000 --- a/arch/x86/include/uapi/asm/poll.h +++ /dev/null @@ -1 +0,0 @@ -#include -- cgit v1.2.3-59-g8ed1b From 8ced390c2b18364af35e3d3f080e06f8ea96be9a Mon Sep 17 00:00:00 2001 From: Al Viro Date: Sun, 2 Jul 2017 22:05:03 -0400 Subject: define __poll_t, annotate constants Signed-off-by: Al Viro --- arch/blackfin/include/uapi/asm/poll.h | 4 ++-- arch/frv/include/uapi/asm/poll.h | 2 +- arch/m68k/include/uapi/asm/poll.h | 2 +- arch/mips/include/uapi/asm/poll.h | 2 +- arch/sparc/include/uapi/asm/poll.h | 8 ++++---- arch/xtensa/include/uapi/asm/poll.h | 4 ++-- include/uapi/asm-generic/poll.h | 30 +++++++++++++++--------------- include/uapi/linux/types.h | 6 ++++++ 8 files changed, 32 insertions(+), 26 deletions(-) (limited to 'arch') diff --git a/arch/blackfin/include/uapi/asm/poll.h b/arch/blackfin/include/uapi/asm/poll.h index 8b094d43e9b7..961e49056b0a 100644 --- a/arch/blackfin/include/uapi/asm/poll.h +++ b/arch/blackfin/include/uapi/asm/poll.h @@ -9,8 +9,8 @@ #ifndef _UAPI__BFIN_POLL_H #define _UAPI__BFIN_POLL_H -#define POLLWRNORM 4 /* POLLOUT */ -#define POLLWRBAND 256 +#define POLLWRNORM (__force __poll_t)4 /* POLLOUT */ +#define POLLWRBAND (__force __poll_t)256 #include diff --git a/arch/frv/include/uapi/asm/poll.h b/arch/frv/include/uapi/asm/poll.h index 887b67288340..d7053ada7c69 100644 --- a/arch/frv/include/uapi/asm/poll.h +++ b/arch/frv/include/uapi/asm/poll.h @@ -3,7 +3,7 @@ #define _ASM_POLL_H #define POLLWRNORM POLLOUT -#define POLLWRBAND 256 +#define POLLWRBAND (__force __poll_t)256 #include diff --git a/arch/m68k/include/uapi/asm/poll.h b/arch/m68k/include/uapi/asm/poll.h index c3e3fcc15e1d..99314937fe5c 100644 --- a/arch/m68k/include/uapi/asm/poll.h +++ b/arch/m68k/include/uapi/asm/poll.h @@ -3,7 +3,7 @@ #define __m68k_POLL_H #define POLLWRNORM POLLOUT -#define POLLWRBAND 256 +#define POLLWRBAND (__force __poll_t)256 #include diff --git a/arch/mips/include/uapi/asm/poll.h b/arch/mips/include/uapi/asm/poll.h index ad289d7b7434..e937f8b1b007 100644 --- a/arch/mips/include/uapi/asm/poll.h +++ b/arch/mips/include/uapi/asm/poll.h @@ -3,7 +3,7 @@ #define __ASM_POLL_H #define POLLWRNORM POLLOUT -#define POLLWRBAND 0x0100 +#define POLLWRBAND (__force __poll_t)0x0100 #include diff --git a/arch/sparc/include/uapi/asm/poll.h b/arch/sparc/include/uapi/asm/poll.h index 72356c999125..595cb12df1f1 100644 --- a/arch/sparc/include/uapi/asm/poll.h +++ b/arch/sparc/include/uapi/asm/poll.h @@ -3,10 +3,10 @@ #define __SPARC_POLL_H #define POLLWRNORM POLLOUT -#define POLLWRBAND 256 -#define POLLMSG 512 -#define POLLREMOVE 1024 -#define POLLRDHUP 2048 +#define POLLWRBAND (__force __poll_t)256 +#define POLLMSG (__force __poll_t)512 +#define POLLREMOVE (__force __poll_t)1024 +#define POLLRDHUP (__force __poll_t)2048 #include diff --git a/arch/xtensa/include/uapi/asm/poll.h b/arch/xtensa/include/uapi/asm/poll.h index 4d249040b33d..22bbc48b9f85 100644 --- a/arch/xtensa/include/uapi/asm/poll.h +++ b/arch/xtensa/include/uapi/asm/poll.h @@ -13,8 +13,8 @@ #define _XTENSA_POLL_H #define POLLWRNORM POLLOUT -#define POLLWRBAND 0x0100 -#define POLLREMOVE 0x0800 +#define POLLWRBAND (__force __poll_t)0x0100 +#define POLLREMOVE (__force __poll_t)0x0800 #include diff --git a/include/uapi/asm-generic/poll.h b/include/uapi/asm-generic/poll.h index fefb3d2c3fac..8c0e9dd384b6 100644 --- a/include/uapi/asm-generic/poll.h +++ b/include/uapi/asm-generic/poll.h @@ -3,35 +3,35 @@ #define __ASM_GENERIC_POLL_H /* These are specified by iBCS2 */ -#define POLLIN 0x0001 -#define POLLPRI 0x0002 -#define POLLOUT 0x0004 -#define POLLERR 0x0008 -#define POLLHUP 0x0010 -#define POLLNVAL 0x0020 +#define POLLIN (__force __poll_t)0x0001 +#define POLLPRI (__force __poll_t)0x0002 +#define POLLOUT (__force __poll_t)0x0004 +#define POLLERR (__force __poll_t)0x0008 +#define POLLHUP (__force __poll_t)0x0010 +#define POLLNVAL (__force __poll_t)0x0020 /* The rest seem to be more-or-less nonstandard. Check them! */ -#define POLLRDNORM 0x0040 -#define POLLRDBAND 0x0080 +#define POLLRDNORM (__force __poll_t)0x0040 +#define POLLRDBAND (__force __poll_t)0x0080 #ifndef POLLWRNORM -#define POLLWRNORM 0x0100 +#define POLLWRNORM (__force __poll_t)0x0100 #endif #ifndef POLLWRBAND -#define POLLWRBAND 0x0200 +#define POLLWRBAND (__force __poll_t)0x0200 #endif #ifndef POLLMSG -#define POLLMSG 0x0400 +#define POLLMSG (__force __poll_t)0x0400 #endif #ifndef POLLREMOVE -#define POLLREMOVE 0x1000 +#define POLLREMOVE (__force __poll_t)0x1000 #endif #ifndef POLLRDHUP -#define POLLRDHUP 0x2000 +#define POLLRDHUP (__force __poll_t)0x2000 #endif -#define POLLFREE 0x4000 /* currently only for epoll */ +#define POLLFREE (__force __poll_t)0x4000 /* currently only for epoll */ -#define POLL_BUSY_LOOP 0x8000 +#define POLL_BUSY_LOOP (__force __poll_t)0x8000 struct pollfd { int fd; diff --git a/include/uapi/linux/types.h b/include/uapi/linux/types.h index e3d1d0c78f3c..cd4f0b897a48 100644 --- a/include/uapi/linux/types.h +++ b/include/uapi/linux/types.h @@ -49,5 +49,11 @@ typedef __u32 __bitwise __wsum; #define __aligned_be64 __be64 __attribute__((aligned(8))) #define __aligned_le64 __le64 __attribute__((aligned(8))) +#ifdef __CHECK_POLL +typedef unsigned __bitwise __poll_t; +#else +typedef unsigned __poll_t; +#endif + #endif /* __ASSEMBLY__ */ #endif /* _UAPI_LINUX_TYPES_H */ -- cgit v1.2.3-59-g8ed1b From 87c1c0935890492fdb240922dd86088c589bae18 Mon Sep 17 00:00:00 2001 From: Al Viro Date: Sun, 2 Jul 2017 22:25:05 -0400 Subject: cris: annotate ->poll() instances Signed-off-by: Al Viro --- arch/cris/arch-v10/drivers/gpio.c | 6 +++--- arch/cris/arch-v10/drivers/sync_serial.c | 8 ++++---- arch/cris/arch-v32/drivers/sync_serial.c | 8 ++++---- 3 files changed, 11 insertions(+), 11 deletions(-) (limited to 'arch') diff --git a/arch/cris/arch-v10/drivers/gpio.c b/arch/cris/arch-v10/drivers/gpio.c index 68dbe261dc57..a2986c60aaac 100644 --- a/arch/cris/arch-v10/drivers/gpio.c +++ b/arch/cris/arch-v10/drivers/gpio.c @@ -50,7 +50,7 @@ static ssize_t gpio_write(struct file *file, const char __user *buf, size_t count, loff_t *off); static int gpio_open(struct inode *inode, struct file *filp); static int gpio_release(struct inode *inode, struct file *filp); -static unsigned int gpio_poll(struct file *filp, struct poll_table_struct *wait); +static __poll_t gpio_poll(struct file *filp, struct poll_table_struct *wait); /* private data per open() of this driver */ @@ -141,9 +141,9 @@ static unsigned long dir_g_shadow; /* 1=output */ #define USE_PORTS(priv) ((priv)->minor <= GPIO_MINOR_B) -static unsigned int gpio_poll(struct file *file, poll_table *wait) +static __poll_t gpio_poll(struct file *file, poll_table *wait) { - unsigned int mask = 0; + __poll_t mask = 0; struct gpio_private *priv = file->private_data; unsigned long data; unsigned long flags; diff --git a/arch/cris/arch-v10/drivers/sync_serial.c b/arch/cris/arch-v10/drivers/sync_serial.c index cfe9176f2205..177843c64071 100644 --- a/arch/cris/arch-v10/drivers/sync_serial.c +++ b/arch/cris/arch-v10/drivers/sync_serial.c @@ -157,7 +157,7 @@ static inline int sync_data_avail(struct sync_port *port); static int sync_serial_open(struct inode *inode, struct file *file); static int sync_serial_release(struct inode *inode, struct file *file); -static unsigned int sync_serial_poll(struct file *filp, poll_table *wait); +static __poll_t sync_serial_poll(struct file *filp, poll_table *wait); static long sync_serial_ioctl(struct file *file, unsigned int cmd, unsigned long arg); @@ -654,12 +654,12 @@ static int sync_serial_release(struct inode *inode, struct file *file) -static unsigned int sync_serial_poll(struct file *file, poll_table *wait) +static __poll_t sync_serial_poll(struct file *file, poll_table *wait) { int dev = MINOR(file_inode(file)->i_rdev); - unsigned int mask = 0; + __poll_t mask = 0; struct sync_port *port; - DEBUGPOLL(static unsigned int prev_mask = 0); + DEBUGPOLL(static __poll_t prev_mask = 0); port = &ports[dev]; poll_wait(file, &port->out_wait_q, wait); diff --git a/arch/cris/arch-v32/drivers/sync_serial.c b/arch/cris/arch-v32/drivers/sync_serial.c index 8efcc1a899a8..e20e0b9a3a5c 100644 --- a/arch/cris/arch-v32/drivers/sync_serial.c +++ b/arch/cris/arch-v32/drivers/sync_serial.c @@ -178,7 +178,7 @@ static inline int sync_data_avail(struct sync_port *port); static int sync_serial_open(struct inode *, struct file *); static int sync_serial_release(struct inode *, struct file *); -static unsigned int sync_serial_poll(struct file *filp, poll_table *wait); +static __poll_t sync_serial_poll(struct file *filp, poll_table *wait); static long sync_serial_ioctl(struct file *file, unsigned int cmd, unsigned long arg); @@ -555,13 +555,13 @@ static int sync_serial_release(struct inode *inode, struct file *file) return 0; } -static unsigned int sync_serial_poll(struct file *file, poll_table *wait) +static __poll_t sync_serial_poll(struct file *file, poll_table *wait) { int dev = iminor(file_inode(file)); - unsigned int mask = 0; + __poll_t mask = 0; struct sync_port *port; DEBUGPOLL( - static unsigned int prev_mask; + static __poll_t prev_mask; ); port = &ports[dev]; -- cgit v1.2.3-59-g8ed1b From e720f32fceeaaacf03c977d3bb44892370cf184f Mon Sep 17 00:00:00 2001 From: Al Viro Date: Sun, 2 Jul 2017 22:26:11 -0400 Subject: ia64: annotate ->poll() instances Signed-off-by: Al Viro --- arch/ia64/kernel/perfmon.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/ia64/kernel/perfmon.c b/arch/ia64/kernel/perfmon.c index 09f86ebfcc7b..c44f002e8f6b 100644 --- a/arch/ia64/kernel/perfmon.c +++ b/arch/ia64/kernel/perfmon.c @@ -1644,12 +1644,12 @@ pfm_write(struct file *file, const char __user *ubuf, return -EINVAL; } -static unsigned int +static __poll_t pfm_poll(struct file *filp, poll_table * wait) { pfm_context_t *ctx; unsigned long flags; - unsigned int mask = 0; + __poll_t mask = 0; if (PFM_IS_FILE(filp) == 0) { printk(KERN_ERR "perfmon: pfm_poll: bad magic [%d]\n", task_pid_nr(current)); -- cgit v1.2.3-59-g8ed1b From 8b9aab09aaf390b868359b9365b667cf6506473c Mon Sep 17 00:00:00 2001 From: Al Viro Date: Sun, 2 Jul 2017 22:27:13 -0400 Subject: mips: annotate ->poll() instances Signed-off-by: Al Viro --- arch/mips/kernel/rtlx.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/mips/kernel/rtlx.c b/arch/mips/kernel/rtlx.c index b80dd8b17a76..bbb0f4770c0d 100644 --- a/arch/mips/kernel/rtlx.c +++ b/arch/mips/kernel/rtlx.c @@ -336,10 +336,10 @@ static int file_release(struct inode *inode, struct file *filp) return rtlx_release(iminor(inode)); } -static unsigned int file_poll(struct file *file, poll_table *wait) +static __poll_t file_poll(struct file *file, poll_table *wait) { int minor = iminor(file_inode(file)); - unsigned int mask = 0; + __poll_t mask = 0; poll_wait(file, &channel_wqs[minor].rt_queue, wait); poll_wait(file, &channel_wqs[minor].lx_queue, wait); -- cgit v1.2.3-59-g8ed1b From 8153a5ead0898ba5a932282e571dfccd61940bba Mon Sep 17 00:00:00 2001 From: Al Viro Date: Sun, 2 Jul 2017 22:33:19 -0400 Subject: ppc: annotate ->poll() instances Signed-off-by: Al Viro --- arch/powerpc/kernel/rtasd.c | 2 +- arch/powerpc/platforms/cell/spufs/backing_ops.c | 6 +++--- arch/powerpc/platforms/cell/spufs/file.c | 16 ++++++++-------- arch/powerpc/platforms/cell/spufs/hw_ops.c | 5 ++--- arch/powerpc/platforms/cell/spufs/spufs.h | 3 +-- arch/powerpc/platforms/powernv/opal-prd.c | 2 +- 6 files changed, 16 insertions(+), 18 deletions(-) (limited to 'arch') diff --git a/arch/powerpc/kernel/rtasd.c b/arch/powerpc/kernel/rtasd.c index 0f0b1b2f3b60..1da8b7d8c6ca 100644 --- a/arch/powerpc/kernel/rtasd.c +++ b/arch/powerpc/kernel/rtasd.c @@ -388,7 +388,7 @@ out: return error; } -static unsigned int rtas_log_poll(struct file *file, poll_table * wait) +static __poll_t rtas_log_poll(struct file *file, poll_table * wait) { poll_wait(file, &rtas_log_wait, wait); if (rtas_log_size) diff --git a/arch/powerpc/platforms/cell/spufs/backing_ops.c b/arch/powerpc/platforms/cell/spufs/backing_ops.c index 6e8a9ef8590e..1a9a756b0b2f 100644 --- a/arch/powerpc/platforms/cell/spufs/backing_ops.c +++ b/arch/powerpc/platforms/cell/spufs/backing_ops.c @@ -86,10 +86,10 @@ static u32 spu_backing_mbox_stat_read(struct spu_context *ctx) return ctx->csa.prob.mb_stat_R; } -static unsigned int spu_backing_mbox_stat_poll(struct spu_context *ctx, - unsigned int events) +static __poll_t spu_backing_mbox_stat_poll(struct spu_context *ctx, + __poll_t events) { - int ret; + __poll_t ret; u32 stat; ret = 0; diff --git a/arch/powerpc/platforms/cell/spufs/file.c b/arch/powerpc/platforms/cell/spufs/file.c index 5ffcdeb1eb17..fc7772c3d068 100644 --- a/arch/powerpc/platforms/cell/spufs/file.c +++ b/arch/powerpc/platforms/cell/spufs/file.c @@ -762,10 +762,10 @@ out: return count; } -static unsigned int spufs_ibox_poll(struct file *file, poll_table *wait) +static __poll_t spufs_ibox_poll(struct file *file, poll_table *wait) { struct spu_context *ctx = file->private_data; - unsigned int mask; + __poll_t mask; poll_wait(file, &ctx->ibox_wq, wait); @@ -898,10 +898,10 @@ out: return count; } -static unsigned int spufs_wbox_poll(struct file *file, poll_table *wait) +static __poll_t spufs_wbox_poll(struct file *file, poll_table *wait) { struct spu_context *ctx = file->private_data; - unsigned int mask; + __poll_t mask; poll_wait(file, &ctx->wbox_wq, wait); @@ -1690,11 +1690,11 @@ out: return ret; } -static unsigned int spufs_mfc_poll(struct file *file,poll_table *wait) +static __poll_t spufs_mfc_poll(struct file *file,poll_table *wait) { struct spu_context *ctx = file->private_data; u32 free_elements, tagstatus; - unsigned int mask; + __poll_t mask; poll_wait(file, &ctx->mfc_wq, wait); @@ -2455,11 +2455,11 @@ static ssize_t spufs_switch_log_read(struct file *file, char __user *buf, return cnt == 0 ? error : cnt; } -static unsigned int spufs_switch_log_poll(struct file *file, poll_table *wait) +static __poll_t spufs_switch_log_poll(struct file *file, poll_table *wait) { struct inode *inode = file_inode(file); struct spu_context *ctx = SPUFS_I(inode)->i_ctx; - unsigned int mask = 0; + __poll_t mask = 0; int rc; poll_wait(file, &ctx->switch_log->wait, wait); diff --git a/arch/powerpc/platforms/cell/spufs/hw_ops.c b/arch/powerpc/platforms/cell/spufs/hw_ops.c index 8655c4cbefc2..fff58198b5b6 100644 --- a/arch/powerpc/platforms/cell/spufs/hw_ops.c +++ b/arch/powerpc/platforms/cell/spufs/hw_ops.c @@ -56,11 +56,10 @@ static u32 spu_hw_mbox_stat_read(struct spu_context *ctx) return in_be32(&ctx->spu->problem->mb_stat_R); } -static unsigned int spu_hw_mbox_stat_poll(struct spu_context *ctx, - unsigned int events) +static __poll_t spu_hw_mbox_stat_poll(struct spu_context *ctx, __poll_t events) { struct spu *spu = ctx->spu; - int ret = 0; + __poll_t ret = 0; u32 stat; spin_lock_irq(&spu->register_lock); diff --git a/arch/powerpc/platforms/cell/spufs/spufs.h b/arch/powerpc/platforms/cell/spufs/spufs.h index 5e59f80e95db..2d0479ad3af4 100644 --- a/arch/powerpc/platforms/cell/spufs/spufs.h +++ b/arch/powerpc/platforms/cell/spufs/spufs.h @@ -185,8 +185,7 @@ struct mfc_dma_command { struct spu_context_ops { int (*mbox_read) (struct spu_context * ctx, u32 * data); u32(*mbox_stat_read) (struct spu_context * ctx); - unsigned int (*mbox_stat_poll)(struct spu_context *ctx, - unsigned int events); + __poll_t (*mbox_stat_poll)(struct spu_context *ctx, __poll_t events); int (*ibox_read) (struct spu_context * ctx, u32 * data); int (*wbox_write) (struct spu_context * ctx, u32 data); u32(*signal1_read) (struct spu_context * ctx); diff --git a/arch/powerpc/platforms/powernv/opal-prd.c b/arch/powerpc/platforms/powernv/opal-prd.c index de4dd09f4a15..c18de0a9b1bd 100644 --- a/arch/powerpc/platforms/powernv/opal-prd.c +++ b/arch/powerpc/platforms/powernv/opal-prd.c @@ -147,7 +147,7 @@ static bool opal_msg_queue_empty(void) return ret; } -static unsigned int opal_prd_poll(struct file *file, +static __poll_t opal_prd_poll(struct file *file, struct poll_table_struct *wait) { poll_wait(file, &opal_prd_msg_wait, wait); -- cgit v1.2.3-59-g8ed1b From 76d2d4a11b877e9f10f3d494180ec9a6f01f0857 Mon Sep 17 00:00:00 2001 From: Al Viro Date: Sun, 2 Jul 2017 22:59:49 -0400 Subject: um: annotate ->poll() instances Signed-off-by: Al Viro --- arch/um/drivers/hostaudio_kern.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/um/drivers/hostaudio_kern.c b/arch/um/drivers/hostaudio_kern.c index 12bdb5996bf5..7f9dbdbc4eb7 100644 --- a/arch/um/drivers/hostaudio_kern.c +++ b/arch/um/drivers/hostaudio_kern.c @@ -119,10 +119,10 @@ static ssize_t hostaudio_write(struct file *file, const char __user *buffer, return err; } -static unsigned int hostaudio_poll(struct file *file, - struct poll_table_struct *wait) +static __poll_t hostaudio_poll(struct file *file, + struct poll_table_struct *wait) { - unsigned int mask = 0; + __poll_t mask = 0; #ifdef DEBUG printk(KERN_DEBUG "hostaudio: poll called (unimplemented)\n"); -- cgit v1.2.3-59-g8ed1b From b146e2ce804e76cffcfc17393ca7aa5e17e6037c Mon Sep 17 00:00:00 2001 From: Al Viro Date: Sun, 2 Jul 2017 23:00:52 -0400 Subject: x86: annotate ->poll() instances Signed-off-by: Al Viro --- arch/x86/kernel/apm_32.c | 2 +- arch/x86/kernel/cpu/mcheck/dev-mcelog.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/x86/kernel/apm_32.c b/arch/x86/kernel/apm_32.c index e4b0d92b3ae0..ab1865342002 100644 --- a/arch/x86/kernel/apm_32.c +++ b/arch/x86/kernel/apm_32.c @@ -1506,7 +1506,7 @@ static ssize_t do_read(struct file *fp, char __user *buf, size_t count, loff_t * return 0; } -static unsigned int do_poll(struct file *fp, poll_table *wait) +static __poll_t do_poll(struct file *fp, poll_table *wait) { struct apm_user *as; diff --git a/arch/x86/kernel/cpu/mcheck/dev-mcelog.c b/arch/x86/kernel/cpu/mcheck/dev-mcelog.c index 7f85b76f43bc..213e8c2ca702 100644 --- a/arch/x86/kernel/cpu/mcheck/dev-mcelog.c +++ b/arch/x86/kernel/cpu/mcheck/dev-mcelog.c @@ -243,7 +243,7 @@ out: return err ? err : buf - ubuf; } -static unsigned int mce_chrdev_poll(struct file *file, poll_table *wait) +static __poll_t mce_chrdev_poll(struct file *file, poll_table *wait) { poll_wait(file, &mce_chrdev_wait, wait); if (READ_ONCE(mcelog.next)) -- cgit v1.2.3-59-g8ed1b From d3decc2c34c8e69828918e69a63b35e927af709c Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Sun, 15 Oct 2017 14:46:15 +0200 Subject: arm64: dts: renesas: salvator: set driver type for eMMC These boards are known to have eMMC issues with the default driver type. Specify a working one. Signed-off-by: Wolfram Sang Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/salvator-common.dtsi | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/arm64/boot/dts/renesas/salvator-common.dtsi b/arch/arm64/boot/dts/renesas/salvator-common.dtsi index a298df74ca6c..24a32c63ce7c 100644 --- a/arch/arm64/boot/dts/renesas/salvator-common.dtsi +++ b/arch/arm64/boot/dts/renesas/salvator-common.dtsi @@ -596,6 +596,7 @@ bus-width = <8>; mmc-hs200-1_8v; non-removable; + fixed-emmc-driver-type = <1>; status = "okay"; }; -- cgit v1.2.3-59-g8ed1b From e4428a726d57fb6068346a736c79953657bc8da6 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Tue, 17 Oct 2017 08:09:49 +0200 Subject: arm64: dts: renesas: r8a7795: Use R-Car SDHI Gen3 fallback compat string Use newly added R-Car SDHI Gen3 fallback compat string in the DT of the r8a7795 SoC. This should have no run-time effect as the driver matches against the per-SoC compat string before considering the fallback compat string. Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a7795.dtsi | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index 15ef292a8d9f..42c51f2ec30b 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi @@ -1539,7 +1539,8 @@ }; sdhi0: sd@ee100000 { - compatible = "renesas,sdhi-r8a7795"; + compatible = "renesas,sdhi-r8a7795", + "renesas,rcar-gen3-sdhi"; reg = <0 0xee100000 0 0x2000>; interrupts = ; clocks = <&cpg CPG_MOD 314>; @@ -1550,7 +1551,8 @@ }; sdhi1: sd@ee120000 { - compatible = "renesas,sdhi-r8a7795"; + compatible = "renesas,sdhi-r8a7795", + "renesas,rcar-gen3-sdhi"; reg = <0 0xee120000 0 0x2000>; interrupts = ; clocks = <&cpg CPG_MOD 313>; @@ -1561,7 +1563,8 @@ }; sdhi2: sd@ee140000 { - compatible = "renesas,sdhi-r8a7795"; + compatible = "renesas,sdhi-r8a7795", + "renesas,rcar-gen3-sdhi"; reg = <0 0xee140000 0 0x2000>; interrupts = ; clocks = <&cpg CPG_MOD 312>; @@ -1572,7 +1575,8 @@ }; sdhi3: sd@ee160000 { - compatible = "renesas,sdhi-r8a7795"; + compatible = "renesas,sdhi-r8a7795", + "renesas,rcar-gen3-sdhi"; reg = <0 0xee160000 0 0x2000>; interrupts = ; clocks = <&cpg CPG_MOD 311>; -- cgit v1.2.3-59-g8ed1b From e871efc9a4f48c9b52d0a2980bf0cac9ecfd310c Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Tue, 17 Oct 2017 08:09:50 +0200 Subject: arm64: dts: renesas: r8a7796: Use R-Car SDHI Gen3 fallback compat string Use newly added R-Car SDHI Gen3 fallback compat string in the DT of the r8a7796 SoC. This should have no run-time effect as the driver matches against the per-SoC compat string before considering the fallback compat string. Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a7796.dtsi | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi index f2b2e40c655e..8c94a313d9e1 100644 --- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi @@ -1380,7 +1380,8 @@ }; sdhi0: sd@ee100000 { - compatible = "renesas,sdhi-r8a7796"; + compatible = "renesas,sdhi-r8a7796", + "renesas,rcar-gen3-sdhi"; reg = <0 0xee100000 0 0x2000>; interrupts = ; clocks = <&cpg CPG_MOD 314>; @@ -1391,7 +1392,8 @@ }; sdhi1: sd@ee120000 { - compatible = "renesas,sdhi-r8a7796"; + compatible = "renesas,sdhi-r8a7796", + "renesas,rcar-gen3-sdhi"; reg = <0 0xee120000 0 0x2000>; interrupts = ; clocks = <&cpg CPG_MOD 313>; @@ -1402,7 +1404,8 @@ }; sdhi2: sd@ee140000 { - compatible = "renesas,sdhi-r8a7796"; + compatible = "renesas,sdhi-r8a7796", + "renesas,rcar-gen3-sdhi"; reg = <0 0xee140000 0 0x2000>; interrupts = ; clocks = <&cpg CPG_MOD 312>; @@ -1413,7 +1416,8 @@ }; sdhi3: sd@ee160000 { - compatible = "renesas,sdhi-r8a7796"; + compatible = "renesas,sdhi-r8a7796", + "renesas,rcar-gen3-sdhi"; reg = <0 0xee160000 0 0x2000>; interrupts = ; clocks = <&cpg CPG_MOD 311>; -- cgit v1.2.3-59-g8ed1b From 206d082e55850797b7152a7c56ccc5c4a41b72ee Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Mon, 30 Oct 2017 16:56:27 +0100 Subject: arm64: dts: renesas: r8a77970: Add RWDT node Add a device node for the Watchdog Timer (WDT) controller on the Renesas R-Car V3M (r8a77970) SoC. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a77970.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'arch') diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi index 97e6981938e7..75d09f1724f0 100644 --- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi @@ -103,6 +103,16 @@ IRQ_TYPE_LEVEL_LOW)>; }; + rwdt: watchdog@e6020000 { + compatible = "renesas,r8a77970-wdt", + "renesas,rcar-gen3-wdt"; + reg = <0 0xe6020000 0 0x0c>; + clocks = <&cpg CPG_MOD 402>; + power-domains = <&sysc 32>; + resets = <&cpg 402>; + status = "disabled"; + }; + cpg: clock-controller@e6150000 { compatible = "renesas,r8a77970-cpg-mssr"; reg = <0 0xe6150000 0 0x1000>; -- cgit v1.2.3-59-g8ed1b From d0ff035f89f18424fd7665b9a29c547adafdea38 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Mon, 30 Oct 2017 16:56:28 +0100 Subject: arm64: dts: renesas: eagle: Move avb node to preserve sort order Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a77970-eagle.dts | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) (limited to 'arch') diff --git a/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts b/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts index a711e77cc6a5..9e37f6e7b265 100644 --- a/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts +++ b/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts @@ -33,6 +33,17 @@ }; }; +&avb { + renesas,no-ether-link; + phy-handle = <&phy0>; + status = "okay"; + + phy0: ethernet-phy@0 { + rxc-skew-ps = <1500>; + reg = <0>; + }; +}; + &extal_clk { clock-frequency = <16666666>; }; @@ -44,14 +55,3 @@ &scif0 { status = "okay"; }; - -&avb { - renesas,no-ether-link; - phy-handle = <&phy0>; - status = "okay"; - - phy0: ethernet-phy@0 { - rxc-skew-ps = <1500>; - reg = <0>; - }; -}; -- cgit v1.2.3-59-g8ed1b From fd363f54979df670ad8ea844c1b69b021ba1039d Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Mon, 30 Oct 2017 16:56:29 +0100 Subject: arm64: dts: renesas: eagle: Enable watchdog timer Enable the Watchdog Timer (WDT) controller on the Renesas Eagle board equipped with an R-Car V3M (r8a77970) SoC. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a77970-eagle.dts | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch') diff --git a/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts b/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts index 9e37f6e7b265..8fe5c193e049 100644 --- a/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts +++ b/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts @@ -52,6 +52,11 @@ clock-frequency = <32768>; }; +&rwdt { + timeout-sec = <60>; + status = "okay"; +}; + &scif0 { status = "okay"; }; -- cgit v1.2.3-59-g8ed1b From 79eba26e170dbb9dc381e5d842da06394ad17c59 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Mon, 30 Oct 2017 18:29:59 +0100 Subject: arm64: dts: renesas: Add support for Salvator-XS with R-Car M3-W Add initial support for the Renesas Salvator-XS (Salvator-X 2nd version) development board equipped with an R-Car M3-W SiP. Based on work for the Salvator-X and -XS boards with M3-W resp. H3 SiPs. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/Makefile | 1 + .../arm64/boot/dts/renesas/r8a7796-salvator-xs.dts | 58 ++++++++++++++++++++++ 2 files changed, 59 insertions(+) create mode 100644 arch/arm64/boot/dts/renesas/r8a7796-salvator-xs.dts (limited to 'arch') diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile index 646198d82903..7f13e014d0aa 100644 --- a/arch/arm64/boot/dts/renesas/Makefile +++ b/arch/arm64/boot/dts/renesas/Makefile @@ -6,5 +6,6 @@ dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-salvator-x.dtb r8a7795-es1-h3ulcb.dtb dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-h3ulcb-kf.dtb dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-x.dtb r8a7796-m3ulcb.dtb dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-m3ulcb-kf.dtb +dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-xs.dtb dtb-$(CONFIG_ARCH_R8A77970) += r8a77970-eagle.dtb dtb-$(CONFIG_ARCH_R8A77995) += r8a77995-draak.dtb diff --git a/arch/arm64/boot/dts/renesas/r8a7796-salvator-xs.dts b/arch/arm64/boot/dts/renesas/r8a7796-salvator-xs.dts new file mode 100644 index 000000000000..2c37055efa94 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a7796-salvator-xs.dts @@ -0,0 +1,58 @@ +/* + * Device Tree Source for the Salvator-X 2nd version board with R-Car M3-W + * + * Copyright (C) 2015-2017 Renesas Electronics Corp. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +/dts-v1/; +#include "r8a7796.dtsi" +#include "salvator-xs.dtsi" + +/ { + model = "Renesas Salvator-X 2nd version board based on r8a7796"; + compatible = "renesas,salvator-xs", "renesas,r8a7796"; + + memory@48000000 { + device_type = "memory"; + /* first 128MB is reserved for secure area. */ + reg = <0x0 0x48000000 0x0 0x78000000>; + }; + + memory@600000000 { + device_type = "memory"; + reg = <0x6 0x00000000 0x0 0x80000000>; + }; +}; + +&du { + clocks = <&cpg CPG_MOD 724>, + <&cpg CPG_MOD 723>, + <&cpg CPG_MOD 722>, + <&cpg CPG_MOD 727>, + <&versaclock6 1>, + <&x21_clk>, + <&versaclock6 2>; + clock-names = "du.0", "du.1", "du.2", "lvds.0", + "dclkin.0", "dclkin.1", "dclkin.2"; +}; + +&hdmi0 { + status = "okay"; + + ports { + port@1 { + reg = <1>; + rcar_dw_hdmi0_out: endpoint { + remote-endpoint = <&hdmi0_con>; + }; + }; + }; +}; + +&hdmi0_con { + remote-endpoint = <&rcar_dw_hdmi0_out>; +}; -- cgit v1.2.3-59-g8ed1b From 389baa409617cda237ae8ae6dd4e897a2d072710 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Fri, 10 Nov 2017 14:26:06 +0100 Subject: arm64: dts: renesas: r8a7796: Add IPMMU device nodes Add r8a7796 IPMMU nodes and keep all disabled by default. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman Reviewed-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r8a7796.dtsi | 100 +++++++++++++++++++++++++++++++ 1 file changed, 100 insertions(+) (limited to 'arch') diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi index 8c94a313d9e1..9e7604108215 100644 --- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi @@ -357,6 +357,106 @@ <&a53_3>; }; + ipmmu_vi0: mmu@febd0000 { + compatible = "renesas,ipmmu-r8a7796"; + reg = <0 0xfebd0000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 9>; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_vc0: mmu@fe6b0000 { + compatible = "renesas,ipmmu-r8a7796"; + reg = <0 0xfe6b0000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 8>; + power-domains = <&sysc R8A7796_PD_A3VC>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_pv0: mmu@fd800000 { + compatible = "renesas,ipmmu-r8a7796"; + reg = <0 0xfd800000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 5>; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_pv1: mmu@fd950000 { + compatible = "renesas,ipmmu-r8a7796"; + reg = <0 0xfd950000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 6>; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_ir: mmu@ff8b0000 { + compatible = "renesas,ipmmu-r8a7796"; + reg = <0 0xff8b0000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 3>; + power-domains = <&sysc R8A7796_PD_A3IR>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_hc: mmu@e6570000 { + compatible = "renesas,ipmmu-r8a7796"; + reg = <0 0xe6570000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 2>; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_rt: mmu@ffc80000 { + compatible = "renesas,ipmmu-r8a7796"; + reg = <0 0xffc80000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 7>; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_mp: mmu@ec670000 { + compatible = "renesas,ipmmu-r8a7796"; + reg = <0 0xec670000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 4>; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_ds0: mmu@e6740000 { + compatible = "renesas,ipmmu-r8a7796"; + reg = <0 0xe6740000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 0>; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_ds1: mmu@e7740000 { + compatible = "renesas,ipmmu-r8a7796"; + reg = <0 0xe7740000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 1>; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_mm: mmu@e67b0000 { + compatible = "renesas,ipmmu-r8a7796"; + reg = <0 0xe67b0000 0 0x1000>; + interrupts = , + ; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + #iommu-cells = <1>; + status = "disabled"; + }; + cpg: clock-controller@e6150000 { compatible = "renesas,r8a7796-cpg-mssr"; reg = <0 0xe6150000 0 0x1000>; -- cgit v1.2.3-59-g8ed1b From 24120522e6ebd3bcf61c84766943a42dec7fad32 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Fri, 10 Nov 2017 14:26:07 +0100 Subject: arm64: dts: renesas: r8a7796: Tie SYS-DMAC to IPMMU-DS0/1 Hook up r8a7796 DMAC nodes to the IPMMUs. In particular SYS-DMAC0 gets tied to IPMMU-DS0, and SYS-DMAC1 and SYS-DMAC2 get tied to IPMMU-DS1. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman Reviewed-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r8a7796.dtsi | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) (limited to 'arch') diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi index 9e7604108215..84f38056f8e6 100644 --- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi @@ -1201,6 +1201,14 @@ resets = <&cpg 219>; #dma-cells = <1>; dma-channels = <16>; + iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, + <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, + <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, + <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, + <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, + <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, + <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, + <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; }; dmac1: dma-controller@e7300000 { @@ -1235,6 +1243,14 @@ resets = <&cpg 218>; #dma-cells = <1>; dma-channels = <16>; + iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, + <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, + <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, + <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, + <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, + <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, + <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, + <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; }; dmac2: dma-controller@e7310000 { @@ -1269,6 +1285,14 @@ resets = <&cpg 217>; #dma-cells = <1>; dma-channels = <16>; + iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, + <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, + <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, + <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, + <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, + <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, + <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, + <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; }; audma0: dma-controller@ec700000 { -- cgit v1.2.3-59-g8ed1b From 13312527a220d077984cc1d20d1ec73db22a866a Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Fri, 10 Nov 2017 14:26:08 +0100 Subject: arm64: dts: renesas: r8a7796: Tie Audio-DMAC to IPMMU-MP Hook up r8a7796 Audio-DMAC nodes to the IPMMU-MP. Based on work for the r8a7795 by Magnus Damm. Signed-off-by: Simon Horman Reviewed-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r8a7796.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) (limited to 'arch') diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi index 84f38056f8e6..fd875b5ea861 100644 --- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi @@ -1327,6 +1327,14 @@ resets = <&cpg 502>; #dma-cells = <1>; dma-channels = <16>; + iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>, + <&ipmmu_mp 2>, <&ipmmu_mp 3>, + <&ipmmu_mp 4>, <&ipmmu_mp 5>, + <&ipmmu_mp 6>, <&ipmmu_mp 7>, + <&ipmmu_mp 8>, <&ipmmu_mp 9>, + <&ipmmu_mp 10>, <&ipmmu_mp 11>, + <&ipmmu_mp 12>, <&ipmmu_mp 13>, + <&ipmmu_mp 14>, <&ipmmu_mp 15>; }; audma1: dma-controller@ec720000 { @@ -1361,6 +1369,14 @@ resets = <&cpg 501>; #dma-cells = <1>; dma-channels = <16>; + iommus = <&ipmmu_mp 16>, <&ipmmu_mp 17>, + <&ipmmu_mp 18>, <&ipmmu_mp 19>, + <&ipmmu_mp 20>, <&ipmmu_mp 21>, + <&ipmmu_mp 22>, <&ipmmu_mp 23>, + <&ipmmu_mp 24>, <&ipmmu_mp 25>, + <&ipmmu_mp 26>, <&ipmmu_mp 27>, + <&ipmmu_mp 28>, <&ipmmu_mp 29>, + <&ipmmu_mp 30>, <&ipmmu_mp 31>; }; usb_dmac0: dma-controller@e65a0000 { -- cgit v1.2.3-59-g8ed1b From 69490bc9665d08b8ba221542b368c662a550a7a4 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Fri, 10 Nov 2017 14:26:09 +0100 Subject: arm64: dts: renesas: r8a7796: Point FDP1 via FCPF to IPMMU-VI0 Hook up the FCPF devices to allow use of FDP1 with IPMMU-VI0. Based on work by Magnus Damm for the r8a7795. Signed-off-by: Simon Horman Reviewed-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r8a7796.dtsi | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch') diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi index fd875b5ea861..859dde64311e 100644 --- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi @@ -1903,6 +1903,7 @@ clocks = <&cpg CPG_MOD 603>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 603>; + iommus = <&ipmmu_vi0 8>; }; vspd1: vsp@fea28000 { @@ -1922,6 +1923,7 @@ clocks = <&cpg CPG_MOD 602>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 602>; + iommus = <&ipmmu_vi0 9>; }; vspd2: vsp@fea30000 { @@ -1941,6 +1943,7 @@ clocks = <&cpg CPG_MOD 601>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 601>; + iommus = <&ipmmu_vi0 10>; }; hdmi0: hdmi@fead0000 { -- cgit v1.2.3-59-g8ed1b From cef942d0bd89dc42145f6e55eaad5e710a0c83f8 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Fri, 10 Nov 2017 14:26:10 +0100 Subject: arm64: dts: renesas: r8a7796: Point VSPI via FCPVI to IPMMU-VC0 Hook up the FCPVI devices to allow use of VSPI with IPMMU-VC0. Based on work for the r8a7795 by Magnus Damm. Signed-off-by: Simon Horman Reviewed-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r8a7796.dtsi | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi index 859dde64311e..3b7a727b94be 100644 --- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi @@ -1884,6 +1884,7 @@ clocks = <&cpg CPG_MOD 611>; power-domains = <&sysc R8A7796_PD_A3VC>; resets = <&cpg 611>; + iommus = <&ipmmu_vc0 19>; }; vspd0: vsp@fea20000 { -- cgit v1.2.3-59-g8ed1b From 03f70d172611b1eb7edf4f690186ec226df86a46 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Fri, 10 Nov 2017 14:26:11 +0100 Subject: arm64: dts: renesas: r8a7796: Connect Ethernet-AVB to IPMMU-DS0 Add IPMMU-DS0 to the Ethernet-AVB device node. Based on work by Magnus Damm for the r8a7795. Signed-off-by: Simon Horman Reviewed-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r8a7796.dtsi | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi index 3b7a727b94be..7e5fef780786 100644 --- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi @@ -917,6 +917,7 @@ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 812>; phy-mode = "rgmii-txid"; + iommus = <&ipmmu_ds0 16>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; -- cgit v1.2.3-59-g8ed1b From 88d1eb0c99cc1c055b3a65fe1afafe36478abb57 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Fri, 10 Nov 2017 14:26:12 +0100 Subject: arm64: dts: renesas: r8a7796: Enable IPMMU-DS0, DS1, MP, VI0, VC0 and MM Enable the r8a7795 device nodes for IPMMU-DS0, IPMMU-DS1, IPMMU-MP, IPMMU-VI0, IPMMU-VC0 and the shared IPMMU-MM device. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman Reviewed-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r8a7796.dtsi | 6 ------ 1 file changed, 6 deletions(-) (limited to 'arch') diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi index 7e5fef780786..cc0cca7c0494 100644 --- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi @@ -363,7 +363,6 @@ renesas,ipmmu-main = <&ipmmu_mm 9>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; #iommu-cells = <1>; - status = "disabled"; }; ipmmu_vc0: mmu@fe6b0000 { @@ -381,7 +380,6 @@ renesas,ipmmu-main = <&ipmmu_mm 5>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; #iommu-cells = <1>; - status = "disabled"; }; ipmmu_pv1: mmu@fd950000 { @@ -426,7 +424,6 @@ renesas,ipmmu-main = <&ipmmu_mm 4>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; #iommu-cells = <1>; - status = "disabled"; }; ipmmu_ds0: mmu@e6740000 { @@ -435,7 +432,6 @@ renesas,ipmmu-main = <&ipmmu_mm 0>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; #iommu-cells = <1>; - status = "disabled"; }; ipmmu_ds1: mmu@e7740000 { @@ -444,7 +440,6 @@ renesas,ipmmu-main = <&ipmmu_mm 1>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; #iommu-cells = <1>; - status = "disabled"; }; ipmmu_mm: mmu@e67b0000 { @@ -454,7 +449,6 @@ ; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; #iommu-cells = <1>; - status = "disabled"; }; cpg: clock-controller@e6150000 { -- cgit v1.2.3-59-g8ed1b From 80785024767c03ff28861db0faf274fffb8d713a Mon Sep 17 00:00:00 2001 From: Vladimir Barinov Date: Wed, 8 Nov 2017 15:21:38 +0300 Subject: arm64: dts: renesas: ulcb-kf: enable USB2 PHY of channel 0 This supports USB2 PHY channel #0 on ULCB Kingfisher board The dedicated USB0_PWEN pin is used to control CN13 VBUS source from U43 power supply. MAX3355 can also provide VBUS, hence it should be disabled via OTG_OFFVBUSn node coming from gpio expander TCA9539. Set MAX3355 enabled using OTG_EXTLPn node to be able to read OTG ID of CN13. Signed-off-by: Vladimir Barinov Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/ulcb-kf.dtsi | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) (limited to 'arch') diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi index 657ad1041965..48a2e8f48e3f 100644 --- a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi +++ b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi @@ -67,6 +67,20 @@ output-high; line-name = "HUB rst"; }; + + otg_offvbusn { + gpio-hog; + gpios = <8 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "OTG OFFVBUSn"; + }; + + otg_extlpn { + gpio-hog; + gpios = <9 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "OTG EXTLPn"; + }; }; gpio_exp_75: gpio@75 { @@ -154,6 +168,11 @@ groups = "scif1_data_b", "scif1_ctrl"; function = "scif1"; }; + + usb0_pins: usb0 { + groups = "usb0"; + function = "usb0"; + }; }; &scif1 { @@ -164,6 +183,13 @@ status = "okay"; }; +&usb2_phy0 { + pinctrl-0 = <&usb0_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + &xhci0 { status = "okay"; }; -- cgit v1.2.3-59-g8ed1b From 499468cf063923dbcbab92c4916b6183348c551f Mon Sep 17 00:00:00 2001 From: Vladimir Barinov Date: Wed, 8 Nov 2017 16:09:00 +0300 Subject: arm64: dts: renesas: ulcb-kf: add dr_mode property for USB2.0 channel 0 ULCB-KF has a USB2.0 dual-role channel (CN13). This adds dr_mode property for USB2.0 channel 0 (EHCI/OHCI and HS-USB) as "otg". Signed-off-by: Vladimir Barinov Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/ulcb-kf.dtsi | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch') diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi index 48a2e8f48e3f..a4e715cbde87 100644 --- a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi +++ b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi @@ -29,6 +29,7 @@ }; &ehci0 { + dr_mode = "otg"; status = "okay"; }; @@ -41,6 +42,7 @@ }; &hsusb { + dr_mode = "otg"; status = "okay"; }; @@ -133,6 +135,7 @@ }; &ohci0 { + dr_mode = "otg"; status = "okay"; }; -- cgit v1.2.3-59-g8ed1b From 942164ca49897397a9f21048d83517ea8af6d044 Mon Sep 17 00:00:00 2001 From: Ulrich Hecht Date: Wed, 15 Nov 2017 16:25:08 +0100 Subject: arm64: dts: renesas: r8a77995: add SYS-DMAC nodes Differs from other Gen3 SoCs in that each controller only supports eight channels. Signed-off-by: Ulrich Hecht Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a77995.dtsi | 72 +++++++++++++++++++++++++++++++ 1 file changed, 72 insertions(+) (limited to 'arch') diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi index 788e3afae6e3..04a392a9d9de 100644 --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi @@ -155,6 +155,78 @@ resets = <&cpg 407>; }; + dmac0: dma-controller@e6700000 { + compatible = "renesas,dmac-r8a77995", + "renesas,rcar-dmac"; + reg = <0 0xe6700000 0 0x10000>; + interrupts = ; + interrupt-names = "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7"; + clocks = <&cpg CPG_MOD 219>; + clock-names = "fck"; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; + resets = <&cpg 219>; + #dma-cells = <1>; + dma-channels = <8>; + }; + + dmac1: dma-controller@e7300000 { + compatible = "renesas,dmac-r8a77995", + "renesas,rcar-dmac"; + reg = <0 0xe7300000 0 0x10000>; + interrupts = ; + interrupt-names = "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7"; + clocks = <&cpg CPG_MOD 218>; + clock-names = "fck"; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; + resets = <&cpg 218>; + #dma-cells = <1>; + dma-channels = <8>; + }; + + dmac2: dma-controller@e7310000 { + compatible = "renesas,dmac-r8a77995", + "renesas,rcar-dmac"; + reg = <0 0xe7310000 0 0x10000>; + interrupts = ; + interrupt-names = "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7"; + clocks = <&cpg CPG_MOD 217>; + clock-names = "fck"; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; + resets = <&cpg 217>; + #dma-cells = <1>; + dma-channels = <8>; + }; + gpio0: gpio@e6050000 { compatible = "renesas,gpio-r8a77995", "renesas,rcar-gen3-gpio", -- cgit v1.2.3-59-g8ed1b From 83f18749c2f65ae699d909f6f9a6242681344176 Mon Sep 17 00:00:00 2001 From: Ulrich Hecht Date: Wed, 15 Nov 2017 16:25:47 +0100 Subject: arm64: dts: renesas: r8a77995: Add SDHI (MMC) support R-Car D3 has only one SDHI controller. Signed-off-by: Ulrich Hecht Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a77995.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'arch') diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi index 04a392a9d9de..98b70542b812 100644 --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi @@ -438,6 +438,18 @@ status = "disabled"; }; + sdhi2: sd@ee140000 { + compatible = "renesas,sdhi-r8a77995", + "renesas,rcar-gen3-sdhi"; + reg = <0 0xee140000 0 0x2000>; + interrupts = ; + clocks = <&cpg CPG_MOD 312>; + max-frequency = <200000000>; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; + resets = <&cpg 312>; + status = "disabled"; + }; + ehci0: usb@ee080100 { compatible = "generic-ehci"; reg = <0 0xee080100 0 0x100>; -- cgit v1.2.3-59-g8ed1b From 3b7e7848f0e88b369519e8f479cdabf6eb998af5 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Fri, 10 Nov 2017 14:25:18 +0100 Subject: arm64: dts: renesas: r8a7795: Add IPMMU device nodes Add r8a7795 IPMMU nodes and keep all disabled by default. This includes all IPMMU devices for r8a7795 ES2.0. Those not present in r8a7795 ES1.x are removed from the DT for those SoCs using delete-node. A follow-up patch will add IPMMU devices to ES1.x which are not also present in ES2.0. Signed-off-by: Magnus Damm Reviewed-by: Laurent Pinchart Signed-off-by: Simon Horman Reviewed-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi | 25 +++++ arch/arm64/boot/dts/renesas/r8a7795.dtsi | 145 +++++++++++++++++++++++++++ 2 files changed, 170 insertions(+) (limited to 'arch') diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi index 655dd30639c5..246323eacb56 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi @@ -21,6 +21,11 @@ status = "disabled"; }; + /delete-node/ mmu@febe0000; + /delete-node/ mmu@fe980000; + /delete-node/ mmu@fd960000; + /delete-node/ mmu@fd970000; + /delete-node/ usb-phy@ee0e0200; /delete-node/ usb@ee0e0100; /delete-node/ usb@ee0e0000; @@ -86,6 +91,26 @@ }; }; +&ipmmu_vi0 { + renesas,ipmmu-main = <&ipmmu_mm 11>; +}; + +&ipmmu_vp0 { + renesas,ipmmu-main = <&ipmmu_mm 12>; +}; + +&ipmmu_vc0 { + renesas,ipmmu-main = <&ipmmu_mm 9>; +}; + +&ipmmu_vc1 { + renesas,ipmmu-main = <&ipmmu_mm 10>; +}; + +&ipmmu_rt { + renesas,ipmmu-main = <&ipmmu_mm 7>; +}; + &du { vsps = <&vspd0 &vspd1 &vspd2 &vspd3>; }; diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index 42c51f2ec30b..1a091bb41b7f 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi @@ -421,6 +421,151 @@ resets = <&cpg 407>; }; + ipmmu_vi0: mmu@febd0000 { + compatible = "renesas,ipmmu-r8a7795"; + reg = <0 0xfebd0000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 14>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_vi1: mmu@febe0000 { + compatible = "renesas,ipmmu-r8a7795"; + reg = <0 0xfebe0000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 15>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_vp0: mmu@fe990000 { + compatible = "renesas,ipmmu-r8a7795"; + reg = <0 0xfe990000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 16>; + power-domains = <&sysc R8A7795_PD_A3VP>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_vp1: mmu@fe980000 { + compatible = "renesas,ipmmu-r8a7795"; + reg = <0 0xfe980000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 17>; + power-domains = <&sysc R8A7795_PD_A3VP>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_vc0: mmu@fe6b0000 { + compatible = "renesas,ipmmu-r8a7795"; + reg = <0 0xfe6b0000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 12>; + power-domains = <&sysc R8A7795_PD_A3VC>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_vc1: mmu@fe6f0000 { + compatible = "renesas,ipmmu-r8a7795"; + reg = <0 0xfe6f0000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 13>; + power-domains = <&sysc R8A7795_PD_A3VC>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_pv0: mmu@fd800000 { + compatible = "renesas,ipmmu-r8a7795"; + reg = <0 0xfd800000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 6>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_pv2: mmu@fd960000 { + compatible = "renesas,ipmmu-r8a7795"; + reg = <0 0xfd960000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 8>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_pv3: mmu@fd970000 { + compatible = "renesas,ipmmu-r8a7795"; + reg = <0 0xfd970000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 9>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_ir: mmu@ff8b0000 { + compatible = "renesas,ipmmu-r8a7795"; + reg = <0 0xff8b0000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 3>; + power-domains = <&sysc R8A7795_PD_A3IR>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_hc: mmu@e6570000 { + compatible = "renesas,ipmmu-r8a7795"; + reg = <0 0xe6570000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 2>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_rt: mmu@ffc80000 { + compatible = "renesas,ipmmu-r8a7795"; + reg = <0 0xffc80000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 10>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_mp0: mmu@ec670000 { + compatible = "renesas,ipmmu-r8a7795"; + reg = <0 0xec670000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 4>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_ds0: mmu@e6740000 { + compatible = "renesas,ipmmu-r8a7795"; + reg = <0 0xe6740000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 0>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_ds1: mmu@e7740000 { + compatible = "renesas,ipmmu-r8a7795"; + reg = <0 0xe7740000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 1>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_mm: mmu@e67b0000 { + compatible = "renesas,ipmmu-r8a7795"; + reg = <0 0xe67b0000 0 0x1000>; + interrupts = , + ; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; + #iommu-cells = <1>; + status = "disabled"; + }; + dmac0: dma-controller@e6700000 { compatible = "renesas,dmac-r8a7795", "renesas,rcar-dmac"; -- cgit v1.2.3-59-g8ed1b From e4b9a493df45075bf3ae2d41fdc1a29e57fe024b Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Fri, 10 Nov 2017 14:25:19 +0100 Subject: arm64: dts: renesas: r8a7795-es1: Add IPMMU device nodes Add r8a7795 ES1.x IPMMU nodes and keep all disabled by default. This is a follow-up to a patch that adds IPMMU device nodes that are common to r8a7795 ES1.x and ES2.0 Power domains are omitted as they appear to be undocumented. Signed-off-by: Magnus Damm Reviewed-by: Laurent Pinchart Signed-off-by: Simon Horman Reviewed-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) (limited to 'arch') diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi index 246323eacb56..38b7cfb3b428 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi @@ -26,6 +26,22 @@ /delete-node/ mmu@fd960000; /delete-node/ mmu@fd970000; + ipmmu_mp1: mmu@ec680000 { + compatible = "renesas,ipmmu-r8a7795"; + reg = <0 0xec680000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 5>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_sy: mmu@e7730000 { + compatible = "renesas,ipmmu-r8a7795"; + reg = <0 0xe7730000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 8>; + #iommu-cells = <1>; + status = "disabled"; + }; + /delete-node/ usb-phy@ee0e0200; /delete-node/ usb@ee0e0100; /delete-node/ usb@ee0e0000; -- cgit v1.2.3-59-g8ed1b From bf2ca657f1fc280531eb62d56467c259125d26ff Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Fri, 10 Nov 2017 14:25:20 +0100 Subject: arm64: dts: renesas: r8a7795: Tie SYS-DMAC to IPMMU-DS0/1 Hook up r8a7795 SYS-DMAC nodes to the IPMMUs. In particular SYS-DMAC0 gets tied to IPMMU-DS0, and SYS-DMAC1 and SYS-DMAC2 get tied to IPMMU-DS1. Signed-off-by: Magnus Damm Reviewed-by: Laurent Pinchart Signed-off-by: Simon Horman Reviewed-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r8a7795.dtsi | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) (limited to 'arch') diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index 1a091bb41b7f..af200aa55fce 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi @@ -598,6 +598,14 @@ resets = <&cpg 219>; #dma-cells = <1>; dma-channels = <16>; + iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, + <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, + <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, + <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, + <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, + <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, + <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, + <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; }; dmac1: dma-controller@e7300000 { @@ -632,6 +640,14 @@ resets = <&cpg 218>; #dma-cells = <1>; dma-channels = <16>; + iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, + <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, + <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, + <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, + <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, + <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, + <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, + <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; }; dmac2: dma-controller@e7310000 { @@ -666,6 +682,14 @@ resets = <&cpg 217>; #dma-cells = <1>; dma-channels = <16>; + iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, + <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, + <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, + <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, + <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, + <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, + <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, + <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; }; audma0: dma-controller@ec700000 { -- cgit v1.2.3-59-g8ed1b From c2b57f76a725b65a24bae0fd1486b58addb7d75f Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Fri, 10 Nov 2017 14:25:21 +0100 Subject: arm64: dts: renesas: r8a7795: Tie Audio-DMAC to IPMMU-MP0/1 Hook up r8a7795 ES2.0 Audio-DMAC nodes to the IPMMU-MP0. Hook up r8a7795 ES1.x Audio-DMAC nodes to the IPMMU-MP1. Signed-off-by: Magnus Damm Reviewed-by: Laurent Pinchart Signed-off-by: Simon Horman Reviewed-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi | 22 ++++++++++++++++++++++ arch/arm64/boot/dts/renesas/r8a7795.dtsi | 16 ++++++++++++++++ 2 files changed, 38 insertions(+) (limited to 'arch') diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi index 38b7cfb3b428..2dfe8108072c 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi @@ -127,6 +127,28 @@ renesas,ipmmu-main = <&ipmmu_mm 7>; }; +&audma0 { + iommus = <&ipmmu_mp1 0>, <&ipmmu_mp1 1>, + <&ipmmu_mp1 2>, <&ipmmu_mp1 3>, + <&ipmmu_mp1 4>, <&ipmmu_mp1 5>, + <&ipmmu_mp1 6>, <&ipmmu_mp1 7>, + <&ipmmu_mp1 8>, <&ipmmu_mp1 9>, + <&ipmmu_mp1 10>, <&ipmmu_mp1 11>, + <&ipmmu_mp1 12>, <&ipmmu_mp1 13>, + <&ipmmu_mp1 14>, <&ipmmu_mp1 15>; +}; + +&audma1 { + iommus = <&ipmmu_mp1 16>, <&ipmmu_mp1 17>, + <&ipmmu_mp1 18>, <&ipmmu_mp1 19>, + <&ipmmu_mp1 20>, <&ipmmu_mp1 21>, + <&ipmmu_mp1 22>, <&ipmmu_mp1 23>, + <&ipmmu_mp1 24>, <&ipmmu_mp1 25>, + <&ipmmu_mp1 26>, <&ipmmu_mp1 27>, + <&ipmmu_mp1 28>, <&ipmmu_mp1 29>, + <&ipmmu_mp1 30>, <&ipmmu_mp1 31>; +}; + &du { vsps = <&vspd0 &vspd1 &vspd2 &vspd3>; }; diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index af200aa55fce..2ca746c304d5 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi @@ -724,6 +724,14 @@ resets = <&cpg 502>; #dma-cells = <1>; dma-channels = <16>; + iommus = <&ipmmu_mp0 0>, <&ipmmu_mp0 1>, + <&ipmmu_mp0 2>, <&ipmmu_mp0 3>, + <&ipmmu_mp0 4>, <&ipmmu_mp0 5>, + <&ipmmu_mp0 6>, <&ipmmu_mp0 7>, + <&ipmmu_mp0 8>, <&ipmmu_mp0 9>, + <&ipmmu_mp0 10>, <&ipmmu_mp0 11>, + <&ipmmu_mp0 12>, <&ipmmu_mp0 13>, + <&ipmmu_mp0 14>, <&ipmmu_mp0 15>; }; audma1: dma-controller@ec720000 { @@ -758,6 +766,14 @@ resets = <&cpg 501>; #dma-cells = <1>; dma-channels = <16>; + iommus = <&ipmmu_mp0 16>, <&ipmmu_mp0 17>, + <&ipmmu_mp0 18>, <&ipmmu_mp0 19>, + <&ipmmu_mp0 20>, <&ipmmu_mp0 21>, + <&ipmmu_mp0 22>, <&ipmmu_mp0 23>, + <&ipmmu_mp0 24>, <&ipmmu_mp0 25>, + <&ipmmu_mp0 26>, <&ipmmu_mp0 27>, + <&ipmmu_mp0 28>, <&ipmmu_mp0 29>, + <&ipmmu_mp0 30>, <&ipmmu_mp0 31>; }; avb: ethernet@e6800000 { -- cgit v1.2.3-59-g8ed1b From 45b894a9fc324291adabaeadb5e9e0d28192860d Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Fri, 10 Nov 2017 14:25:22 +0100 Subject: arm64: dts: renesas: r8a7795: Point DU/VSPD via FCPVD to IPMMU-VI0/1 Hook up the FCPVD devices to allow use of the VSP and DU together with IPMMU-VI1 and IPMMU-VI1. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman Reviewed-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi | 4 ++++ arch/arm64/boot/dts/renesas/r8a7795.dtsi | 3 +++ 2 files changed, 7 insertions(+) (limited to 'arch') diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi index 2dfe8108072c..71499d193ddb 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi @@ -149,6 +149,10 @@ <&ipmmu_mp1 30>, <&ipmmu_mp1 31>; }; +&fcpvd2 { + iommus = <&ipmmu_vi0 10>; +}; + &du { vsps = <&vspd0 &vspd1 &vspd2 &vspd3>; }; diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index 2ca746c304d5..6187e9c33e88 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi @@ -2154,6 +2154,7 @@ clocks = <&cpg CPG_MOD 603>; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; resets = <&cpg 603>; + iommus = <&ipmmu_vi0 8>; }; vspd1: vsp@fea28000 { @@ -2173,6 +2174,7 @@ clocks = <&cpg CPG_MOD 602>; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; resets = <&cpg 602>; + iommus = <&ipmmu_vi0 9>; }; vspd2: vsp@fea30000 { @@ -2192,6 +2194,7 @@ clocks = <&cpg CPG_MOD 601>; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; resets = <&cpg 601>; + iommus = <&ipmmu_vi1 10>; }; fdp1@fe940000 { -- cgit v1.2.3-59-g8ed1b From f54de024ef009502a7a767b8263e93edb05a13bd Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Fri, 10 Nov 2017 14:25:23 +0100 Subject: arm64: dts: renesas: r8a7795-es1: Point DU/VSPD via FCPVD to IPMMU-VI0 Hook up the FCPVD devices to allow use of the VSP and DU together with IPMMU-VI0. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman Reviewed-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi index 71499d193ddb..1eafa5382e86 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi @@ -94,6 +94,7 @@ clocks = <&cpg CPG_MOD 600>; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; resets = <&cpg 600>; + iommus = <&ipmmu_vi0 11>; }; fdp1@fe948000 { -- cgit v1.2.3-59-g8ed1b From afdeb149aaecdd7151f4e43f2531dee59e53ced0 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Fri, 10 Nov 2017 14:25:24 +0100 Subject: arm64: dts: renesas: r8a7795: Point FDP1 via FCPF to IPMMU-VP0/1 Hook up the FCPF devices to allow use of FDP1 with IPMMU-VP. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman Reviewed-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi | 4 ++++ arch/arm64/boot/dts/renesas/r8a7795.dtsi | 2 ++ 2 files changed, 6 insertions(+) (limited to 'arch') diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi index 1eafa5382e86..6b4dfa42f5b2 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi @@ -150,6 +150,10 @@ <&ipmmu_mp1 30>, <&ipmmu_mp1 31>; }; +&fcpf1 { + iommus = <&ipmmu_vp0 1>; +}; + &fcpvd2 { iommus = <&ipmmu_vi0 10>; }; diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index 6187e9c33e88..f7d7c98a7f73 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi @@ -2070,6 +2070,7 @@ clocks = <&cpg CPG_MOD 615>; power-domains = <&sysc R8A7795_PD_A3VP>; resets = <&cpg 615>; + iommus = <&ipmmu_vp0 0>; }; fcpf1: fcp@fe951000 { @@ -2078,6 +2079,7 @@ clocks = <&cpg CPG_MOD 614>; power-domains = <&sysc R8A7795_PD_A3VP>; resets = <&cpg 614>; + iommus = <&ipmmu_vp1 1>; }; vspbd: vsp@fe960000 { -- cgit v1.2.3-59-g8ed1b From f54d63fe7ed6d37df15ec8903302dd05375168f4 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Fri, 10 Nov 2017 14:25:25 +0100 Subject: arm64: dts: renesas: r8a7795-es1: Point FDP1 via FCPF to IPMMU-VP0 Hook up the FCPF devices to allow use of FDP1 with IPMMU-VP0. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman Reviewed-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi index 6b4dfa42f5b2..736281335653 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi @@ -56,6 +56,7 @@ clocks = <&cpg CPG_MOD 613>; power-domains = <&sysc R8A7795_PD_A3VP>; resets = <&cpg 613>; + iommus = <&ipmmu_vp0 2>; }; vspi2: vsp@fe9c0000 { -- cgit v1.2.3-59-g8ed1b From cdd919ba225433a334b2f2c2ef71c7e70f80173e Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Fri, 10 Nov 2017 14:25:26 +0100 Subject: arm64: dts: renesas: r8a7795: Point VSPBC/VSPBD via FCPVB to IPMMU-VP0/1 Hook up the FCPVB devices to allow use of VSPBC/VSPBD with IPMMU-VP0 and IPMMU-VP1. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman Reviewed-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi | 4 ++++ arch/arm64/boot/dts/renesas/r8a7795.dtsi | 2 ++ 2 files changed, 6 insertions(+) (limited to 'arch') diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi index 736281335653..3d50627c0670 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi @@ -151,6 +151,10 @@ <&ipmmu_mp1 30>, <&ipmmu_mp1 31>; }; +&fcpvb1 { + iommus = <&ipmmu_vp0 7>; +}; + &fcpf1 { iommus = <&ipmmu_vp0 1>; }; diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index f7d7c98a7f73..35efacd1ec21 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi @@ -2062,6 +2062,7 @@ clocks = <&cpg CPG_MOD 606>; power-domains = <&sysc R8A7795_PD_A3VP>; resets = <&cpg 606>; + iommus = <&ipmmu_vp1 7>; }; fcpf0: fcp@fe950000 { @@ -2099,6 +2100,7 @@ clocks = <&cpg CPG_MOD 607>; power-domains = <&sysc R8A7795_PD_A3VP>; resets = <&cpg 607>; + iommus = <&ipmmu_vp0 5>; }; vspi0: vsp@fe9a0000 { -- cgit v1.2.3-59-g8ed1b From a02aac487325b5bba09a7fd48569d36eb2394a51 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Fri, 10 Nov 2017 14:25:27 +0100 Subject: arm64: dts: renesas: r8a7795: Point VSPI via FCPVI to IPMMU-VP0/1 Hook up the FCPVI devices to allow use of VSPI with IPMMU-VP0 and IPMMU-VP1. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman Reviewed-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi | 4 ++++ arch/arm64/boot/dts/renesas/r8a7795.dtsi | 2 ++ 2 files changed, 6 insertions(+) (limited to 'arch') diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi index 3d50627c0670..b2d2f04c5e1c 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi @@ -159,6 +159,10 @@ iommus = <&ipmmu_vp0 1>; }; +&fcpvi1 { + iommus = <&ipmmu_vp0 9>; +}; + &fcpvd2 { iommus = <&ipmmu_vi0 10>; }; diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index 35efacd1ec21..10c7728d1b25 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi @@ -2120,6 +2120,7 @@ clocks = <&cpg CPG_MOD 611>; power-domains = <&sysc R8A7795_PD_A3VP>; resets = <&cpg 611>; + iommus = <&ipmmu_vp0 8>; }; vspi1: vsp@fe9b0000 { @@ -2139,6 +2140,7 @@ clocks = <&cpg CPG_MOD 610>; power-domains = <&sysc R8A7795_PD_A3VP>; resets = <&cpg 610>; + iommus = <&ipmmu_vp1 9>; }; vspd0: vsp@fea20000 { -- cgit v1.2.3-59-g8ed1b From 8f0940b0330c67ed8d6e7dad1210f9b519967ca0 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Fri, 10 Nov 2017 14:25:28 +0100 Subject: arm64: dts: renesas: r8a7795-es1: Point VSPI via FCPVI to IPMMU-VP Hook up the FCPVI devices to allow use of VSPI with IPMMU-VP. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman Reviewed-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi index b2d2f04c5e1c..6713eeeab52a 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi @@ -76,6 +76,7 @@ clocks = <&cpg CPG_MOD 609>; power-domains = <&sysc R8A7795_PD_A3VP>; resets = <&cpg 609>; + iommus = <&ipmmu_vp0 10>; }; vspd3: vsp@fea38000 { -- cgit v1.2.3-59-g8ed1b From ca8740f419440a456d1aa1bbfe91a57c07b09975 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Fri, 10 Nov 2017 14:25:29 +0100 Subject: arm64: dts: renesas: r8a7795: Connect Ethernet-AVB to IPMMU-DS0 Add IPMMU-DS0 to the Ethernet-AVB device node. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman Reviewed-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r8a7795.dtsi | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index 10c7728d1b25..f5ab1c3370e6 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi @@ -816,6 +816,7 @@ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; resets = <&cpg 812>; phy-mode = "rgmii-txid"; + iommus = <&ipmmu_ds0 16>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; -- cgit v1.2.3-59-g8ed1b From 0703824ca960ef855e5bc1239e03be520748fb5a Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Fri, 10 Nov 2017 14:25:30 +0100 Subject: arm64: dts: renesas: r8a7795: Connect SATA to IPMMU-HC Add IPMMU-HC to the SATA device node. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman Reviewed-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r8a7795.dtsi | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index f5ab1c3370e6..08c125cfa5d6 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi @@ -1645,6 +1645,7 @@ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; resets = <&cpg 815>; status = "disabled"; + iommus = <&ipmmu_hc 2>; }; xhci0: usb@ee000000 { -- cgit v1.2.3-59-g8ed1b From 0e467ade5e289625a637ebf3255f99c77d6192a5 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Fri, 10 Nov 2017 14:25:32 +0100 Subject: arm64: dts: renesas: r8a7795-es1: Enable IPMMU-MP1 Enable the r8a7795 ES1.x device node for IPMMU-MP1. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman Reviewed-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi | 1 - 1 file changed, 1 deletion(-) (limited to 'arch') diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi index 6713eeeab52a..29b52d89c78a 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi @@ -31,7 +31,6 @@ reg = <0 0xec680000 0 0x1000>; renesas,ipmmu-main = <&ipmmu_mm 5>; #iommu-cells = <1>; - status = "disabled"; }; ipmmu_sy: mmu@e7730000 { -- cgit v1.2.3-59-g8ed1b From 27767b784b5a7b13aedc248029570da0487722f5 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Fri, 10 Nov 2017 14:25:31 +0100 Subject: arm64: dts: renesas: r8a7795: Enable IPMMU-VI0, VP1, DS0, DS1 and MM Enable the r8a7795 device nodes for IPMMU-VI0, IPMMU-VP1, IPMMU-DS0, IPMMU-DS1 and the shared IPMMU-MM device. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman Reviewed-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r8a7795.dtsi | 5 ----- 1 file changed, 5 deletions(-) (limited to 'arch') diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index 08c125cfa5d6..a438d58f1b50 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi @@ -427,7 +427,6 @@ renesas,ipmmu-main = <&ipmmu_mm 14>; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; #iommu-cells = <1>; - status = "disabled"; }; ipmmu_vi1: mmu@febe0000 { @@ -454,7 +453,6 @@ renesas,ipmmu-main = <&ipmmu_mm 17>; power-domains = <&sysc R8A7795_PD_A3VP>; #iommu-cells = <1>; - status = "disabled"; }; ipmmu_vc0: mmu@fe6b0000 { @@ -544,7 +542,6 @@ renesas,ipmmu-main = <&ipmmu_mm 0>; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; #iommu-cells = <1>; - status = "disabled"; }; ipmmu_ds1: mmu@e7740000 { @@ -553,7 +550,6 @@ renesas,ipmmu-main = <&ipmmu_mm 1>; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; #iommu-cells = <1>; - status = "disabled"; }; ipmmu_mm: mmu@e67b0000 { @@ -563,7 +559,6 @@ ; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; #iommu-cells = <1>; - status = "disabled"; }; dmac0: dma-controller@e6700000 { -- cgit v1.2.3-59-g8ed1b From f80f4920b78dbcbebbe5e0a1383bce7849cd08af Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 16 Nov 2017 14:34:10 +0100 Subject: arm64: dts: renesas: salvator-common: Add BD9571 PMIC Add a device node for the ROHM BD9571MWV PMIC. This was based on the example in the DT binding documentation, but using IRQ0 instead of a GPIO interrupt, as that matches the schematics, and because INTC-EX is a simpler block. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/salvator-common.dtsi | 29 ++++++++++++++++++++++++ 1 file changed, 29 insertions(+) (limited to 'arch') diff --git a/arch/arm64/boot/dts/renesas/salvator-common.dtsi b/arch/arm64/boot/dts/renesas/salvator-common.dtsi index 24a32c63ce7c..b9505a65a793 100644 --- a/arch/arm64/boot/dts/renesas/salvator-common.dtsi +++ b/arch/arm64/boot/dts/renesas/salvator-common.dtsi @@ -355,6 +355,30 @@ &i2c_dvfs { status = "okay"; + + pmic: pmic@30 { + pinctrl-0 = <&irq0_pins>; + pinctrl-names = "default"; + + compatible = "rohm,bd9571mwv"; + reg = <0x30>; + interrupt-parent = <&intc_ex>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-controller; + #gpio-cells = <2>; + + regulators { + dvfs: dvfs { + regulator-name = "dvfs"; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <1030000>; + regulator-boot-on; + regulator-always-on; + }; + }; + }; }; &ohci0 { @@ -410,6 +434,11 @@ function = "i2c2"; }; + irq0_pins: irq0 { + groups = "intc_ex_irq0"; + function = "intc_ex"; + }; + pwm1_pins: pwm1 { groups = "pwm1_a"; function = "pwm1"; -- cgit v1.2.3-59-g8ed1b From aa8c6e451e96cb0db85e19d31da0b9bcc04e7217 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 16 Nov 2017 14:44:18 +0100 Subject: arm64: dts: renesas: r8a7795-es1-salvator-x: Add SoC name to file header Document clearly which SoC this DTS applies to, to distinguish from Salvator-X boards equipped with other SoCs. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a7795-es1-salvator-x.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a7795-es1-salvator-x.dts index 3f7d5f51e428..7f2a3d923f21 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795-es1-salvator-x.dts +++ b/arch/arm64/boot/dts/renesas/r8a7795-es1-salvator-x.dts @@ -1,5 +1,5 @@ /* - * Device Tree Source for the Salvator-X board + * Device Tree Source for the Salvator-X board with R-Car H3 ES1.x * * Copyright (C) 2015 Renesas Electronics Corp. * -- cgit v1.2.3-59-g8ed1b From 3d5863e6112adb8265456ca201d90bd9dc4eb886 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 16 Nov 2017 14:44:19 +0100 Subject: arm64: dts: renesas: r8a7795-salvator-x: Add SoC name to file header Document clearly which SoC this DTS applies to, to distinguish from Salvator-X boards equipped with other SoCs. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts index 17953070f38d..af467419266a 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts +++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts @@ -1,5 +1,5 @@ /* - * Device Tree Source for the Salvator-X board + * Device Tree Source for the Salvator-X board with R-Car H3 ES2.0 * * Copyright (C) 2015 Renesas Electronics Corp. * -- cgit v1.2.3-59-g8ed1b From 8af1da9e8a804ef81a034f96f0e9a778e5f3cc6e Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 16 Nov 2017 14:44:20 +0100 Subject: arm64: dts: renesas: r8a7796-salvator-x: Add SoC name to file header Document clearly which SoC this DTS applies to, to distinguish from Salvator-X boards equipped with other SoCs. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts index b317be03306e..498c9e807dc4 100644 --- a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts +++ b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts @@ -1,5 +1,5 @@ /* - * Device Tree Source for the Salvator-X board + * Device Tree Source for the Salvator-X board with R-Car M3-W * * Copyright (C) 2016 Renesas Electronics Corp. * -- cgit v1.2.3-59-g8ed1b From 61799464a4c01139fefe11aca2533e97ac579e00 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 16 Nov 2017 14:44:21 +0100 Subject: arm64: dts: renesas: r8a7795-salvator-xs: Add SoC name to file header Document clearly which SoC this DTS applies to, to distinguish from Salvator-XS boards equipped with other SoCs. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a7795-salvator-xs.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm64/boot/dts/renesas/r8a7795-salvator-xs.dts b/arch/arm64/boot/dts/renesas/r8a7795-salvator-xs.dts index 7675de5d4f2c..8b50ceb746e8 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-xs.dts +++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-xs.dts @@ -1,5 +1,5 @@ /* - * Device Tree Source for the Salvator-X 2nd version board + * Device Tree Source for the Salvator-X 2nd version board with R-Car H3 ES2.0 * * Copyright (C) 2015-2017 Renesas Electronics Corp. * -- cgit v1.2.3-59-g8ed1b From 5ba27becdf2c0a62a22d2225b1e205c2eee0ef37 Mon Sep 17 00:00:00 2001 From: Ulrich Hecht Date: Fri, 17 Nov 2017 11:41:25 +0100 Subject: arm64: dts: renesas: r8a77995: Add CAN external clock support Adds external CAN clock node for r8a77995. This clock can be used as fCAN clock of CAN and CAN FD controller. Based on a patch for r8a7796 by Chris Paterson. Signed-off-by: Ulrich Hecht Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a77995.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'arch') diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi index 98b70542b812..0f78592d993c 100644 --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi @@ -51,6 +51,13 @@ clock-frequency = <0>; }; + /* External CAN clock - to be overridden by boards that provide it */ + can_clk: can { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + scif_clk: scif { compatible = "fixed-clock"; #clock-cells = <0>; -- cgit v1.2.3-59-g8ed1b From acaa51a35828d1188e1917d08a3c8c0447d3109b Mon Sep 17 00:00:00 2001 From: Ulrich Hecht Date: Fri, 17 Nov 2017 11:41:26 +0100 Subject: arm64: dts: renesas: r8a77995: Add CAN support Adds CAN controller nodes for r8a77995. Based on a patch for r8a7796 by Chris Paterson. Signed-off-by: Ulrich Hecht Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a77995.dtsi | 32 +++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) (limited to 'arch') diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi index 0f78592d993c..b2c8db15db53 100644 --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi @@ -346,6 +346,38 @@ resets = <&cpg 906>; }; + can0: can@e6c30000 { + compatible = "renesas,can-r8a77995", + "renesas,rcar-gen3-can"; + reg = <0 0xe6c30000 0 0x1000>; + interrupts = ; + clocks = <&cpg CPG_MOD 916>, + <&cpg CPG_CORE R8A77995_CLK_CANFD>, + <&can_clk>; + clock-names = "clkp1", "clkp2", "can_clk"; + assigned-clocks = <&cpg CPG_CORE R8A77995_CLK_CANFD>; + assigned-clock-rates = <40000000>; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; + resets = <&cpg 916>; + status = "disabled"; + }; + + can1: can@e6c38000 { + compatible = "renesas,can-r8a77995", + "renesas,rcar-gen3-can"; + reg = <0 0xe6c38000 0 0x1000>; + interrupts = ; + clocks = <&cpg CPG_MOD 915>, + <&cpg CPG_CORE R8A77995_CLK_CANFD>, + <&can_clk>; + clock-names = "clkp1", "clkp2", "can_clk"; + assigned-clocks = <&cpg CPG_CORE R8A77995_CLK_CANFD>; + assigned-clock-rates = <40000000>; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; + resets = <&cpg 915>; + status = "disabled"; + }; + avb: ethernet@e6800000 { compatible = "renesas,etheravb-r8a77995", "renesas,etheravb-rcar-gen3"; -- cgit v1.2.3-59-g8ed1b From e2767b0f21d95e3df33b290e1cf79f295c02e44f Mon Sep 17 00:00:00 2001 From: Ulrich Hecht Date: Fri, 17 Nov 2017 11:41:27 +0100 Subject: arm64: dts: renesas: r8a77995: Add CAN FD support Adds CAN FD controller node for r8a77995. Based on a patch for r8a7796 by Chris Paterson. Signed-off-by: Ulrich Hecht Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a77995.dtsi | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) (limited to 'arch') diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi index b2c8db15db53..73149c73ef87 100644 --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi @@ -378,6 +378,31 @@ status = "disabled"; }; + canfd: can@e66c0000 { + compatible = "renesas,r8a77995-canfd", + "renesas,rcar-gen3-canfd"; + reg = <0 0xe66c0000 0 0x8000>; + interrupts = , + ; + clocks = <&cpg CPG_MOD 914>, + <&cpg CPG_CORE R8A77995_CLK_CANFD>, + <&can_clk>; + clock-names = "fck", "canfd", "can_clk"; + assigned-clocks = <&cpg CPG_CORE R8A77995_CLK_CANFD>; + assigned-clock-rates = <40000000>; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; + resets = <&cpg 914>; + status = "disabled"; + + channel0 { + status = "disabled"; + }; + + channel1 { + status = "disabled"; + }; + }; + avb: ethernet@e6800000 { compatible = "renesas,etheravb-r8a77995", "renesas,etheravb-rcar-gen3"; -- cgit v1.2.3-59-g8ed1b From eb14ed1ad7b6750b6b82e7f556f2c1c340f35b8f Mon Sep 17 00:00:00 2001 From: Takeshi Kihara Date: Thu, 23 Nov 2017 11:58:50 +0100 Subject: arm64: dts: renesas: r8a7795: Increase the number of GPIO bank 1 ports to 29 This patch changes the number of GPIO bank 1 ports to 29 because GP-1-28 port pin of R8A7795 ES2.0 SoC support was added. Signed-off-by: Takeshi Kihara Fixes: 291e0c4994d0813f ("arm64: dts: r8a7795: Add support for R-Car H3 ES2.0") [geert: Keep 28 GPIOs on H3 ES1.x after r8a7795.dtsi sharing] Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi | 4 ++++ arch/arm64/boot/dts/renesas/r8a7795.dtsi | 2 +- 2 files changed, 5 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi index 29b52d89c78a..26769a11a190 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi @@ -109,6 +109,10 @@ }; }; +&gpio1 { + gpio-ranges = <&pfc 0 32 28>; +}; + &ipmmu_vi0 { renesas,ipmmu-main = <&ipmmu_mm 11>; }; diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index a438d58f1b50..6db4f10376a1 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi @@ -240,7 +240,7 @@ interrupts = ; #gpio-cells = <2>; gpio-controller; - gpio-ranges = <&pfc 0 32 28>; + gpio-ranges = <&pfc 0 32 29>; #interrupt-cells = <2>; interrupt-controller; clocks = <&cpg CPG_MOD 911>; -- cgit v1.2.3-59-g8ed1b From 830241c1e8cea1557b1de099756775e9fa0ab561 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Fri, 10 Nov 2017 14:25:49 +0100 Subject: arm64: dts: renesas: r8a77970: sort includes Sort includes used in r8a77970 DTS to improve maintainability and for consistency with other R-Car DTS files. Signed-off-by: Simon Horman Reviewed-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r8a77970.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi index 75d09f1724f0..8b97842aedb7 100644 --- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi @@ -9,9 +9,9 @@ * kind, whether express or implied. */ -#include -#include #include +#include +#include / { compatible = "renesas,r8a77970"; -- cgit v1.2.3-59-g8ed1b From af2ea3df851ffa68ad07ff59d4dabadbf33b45ef Mon Sep 17 00:00:00 2001 From: Ulrich Hecht Date: Mon, 20 Nov 2017 16:46:35 +0100 Subject: arm64: dts: renesas: r8a77995: add DMA for SCIF2 Tested on Draak. Signed-off-by: Ulrich Hecht Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a77995.dtsi | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch') diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi index 73149c73ef87..21b832fb20b2 100644 --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi @@ -457,6 +457,9 @@ <&cpg CPG_CORE R8A77995_CLK_S3D1C>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; + dmas = <&dmac1 0x13>, <&dmac1 0x12>, + <&dmac2 0x13>, <&dmac2 0x12>; + dma-names = "tx", "rx", "tx", "rx"; power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; resets = <&cpg 310>; status = "disabled"; -- cgit v1.2.3-59-g8ed1b From ce3b52a1595b25b05df86388d08aa454a885349d Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Fri, 10 Nov 2017 14:25:50 +0100 Subject: arm64: dts: renesas: r8a77970: Add IPMMU device nodes Add r8a77970 IPMMU nodes and keep all disabled by default. Based on work for the r8a7796 by Magnus Damm Signed-off-by: Simon Horman Reviewed-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r8a77970.dtsi | 47 +++++++++++++++++++++++++++++++ 1 file changed, 47 insertions(+) (limited to 'arch') diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi index 8b97842aedb7..5f73ee2dfd6d 100644 --- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi @@ -12,6 +12,7 @@ #include #include #include +#include / { compatible = "renesas,r8a77970"; @@ -134,6 +135,52 @@ #power-domain-cells = <1>; }; + ipmmu_vi0: mmu@febd0000 { + compatible = "renesas,ipmmu-r8a77970"; + reg = <0 0xfebd0000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 9>; + power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_ir: mmu@ff8b0000 { + compatible = "renesas,ipmmu-r8a77970"; + reg = <0 0xff8b0000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 3>; + power-domains = <&sysc R8A77970_PD_A3IR>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_rt: mmu@ffc80000 { + compatible = "renesas,ipmmu-r8a77970"; + reg = <0 0xffc80000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 7>; + power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_ds1: mmu@e7740000 { + compatible = "renesas,ipmmu-r8a77970"; + reg = <0 0xe7740000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 1>; + power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_mm: mmu@e67b0000 { + compatible = "renesas,ipmmu-r8a77970"; + reg = <0 0xe67b0000 0 0x1000>; + interrupts = , + ; + power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; + #iommu-cells = <1>; + status = "disabled"; + }; + intc_ex: interrupt-controller@e61c0000 { compatible = "renesas,intc-ex-r8a77970", "renesas,irqc"; #interrupt-cells = <2>; -- cgit v1.2.3-59-g8ed1b From 0071fcd1a9598996bd0fe3d5f746de0d55d97b11 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Fri, 10 Nov 2017 14:25:51 +0100 Subject: arm64: dts: renesas: r8a77970: Tie SYS-DMAC to IPMMU-DS1 Hook up r8a77970 DMAC nodes to the IPMMU. In particular SYS-DMAC1 and SYS-DMAC2 get tied to IPMMU-DS1. Based on work for the r8a7796 by Magnus Damm. Signed-off-by: Simon Horman Reviewed-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r8a77970.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'arch') diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi index 5f73ee2dfd6d..108c6159c847 100644 --- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi @@ -224,6 +224,10 @@ resets = <&cpg 218>; #dma-cells = <1>; dma-channels = <8>; + iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, + <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, + <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, + <&ipmmu_ds1 6>, <&ipmmu_ds1 7>; }; dmac2: dma-controller@e7310000 { @@ -248,6 +252,10 @@ resets = <&cpg 217>; #dma-cells = <1>; dma-channels = <8>; + iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, + <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, + <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, + <&ipmmu_ds1 22>, <&ipmmu_ds1 23>; }; hscif0: serial@e6540000 { -- cgit v1.2.3-59-g8ed1b From 0639be574ea246d65565b0bfe490a84baaee3d61 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Fri, 10 Nov 2017 14:25:52 +0100 Subject: arm64: dts: renesas: r8a77970: Connect Ethernet-AVB to IPMMU-RT Add IPMMU-RT to the Ethernet-AVB device node. Based on work by Magnus Damm for the r8a7795. Signed-off-by: Simon Horman Reviewed-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r8a77970.dtsi | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi index 108c6159c847..0f93484e650a 100644 --- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi @@ -440,6 +440,7 @@ power-domains = <&sysc 32>; resets = <&cpg 812>; phy-mode = "rgmii-id"; + iommus = <&ipmmu_rt 3>; #address-cells = <1>; #size-cells = <0>; }; -- cgit v1.2.3-59-g8ed1b From 572d48fadf597650cf397eb3a7b1f58991f733ce Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Fri, 10 Nov 2017 14:25:53 +0100 Subject: arm64: dts: renesas: r8a77970: Enable IPMMU-DS1, RT and MM Enable the r8a77970 device nodes for IPMMU-DS1, IPMMU-RT and the shared IPMMU-MM device. Based on work for the r8a7796 by Magnus Damm. Signed-off-by: Simon Horman Reviewed-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r8a77970.dtsi | 3 --- 1 file changed, 3 deletions(-) (limited to 'arch') diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi index 0f93484e650a..636b57a2edde 100644 --- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi @@ -159,7 +159,6 @@ renesas,ipmmu-main = <&ipmmu_mm 7>; power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; #iommu-cells = <1>; - status = "disabled"; }; ipmmu_ds1: mmu@e7740000 { @@ -168,7 +167,6 @@ renesas,ipmmu-main = <&ipmmu_mm 1>; power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; #iommu-cells = <1>; - status = "disabled"; }; ipmmu_mm: mmu@e67b0000 { @@ -178,7 +176,6 @@ ; power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; #iommu-cells = <1>; - status = "disabled"; }; intc_ex: interrupt-controller@e61c0000 { -- cgit v1.2.3-59-g8ed1b From a3901e7398e1d7045dfb21c607ddc1063600fc6d Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Fri, 10 Nov 2017 14:26:04 +0100 Subject: arm64: dts: renesas: r8a77995: Add IPMMU device nodes Add r8a77995 IPMMU nodes and keep all disabled by default. Based on work for the r8a7795 and r8a7796 by Magnus Damm Signed-off-by: Simon Horman Reviewed-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r8a77995.dtsi | 82 +++++++++++++++++++++++++++++++ 1 file changed, 82 insertions(+) (limited to 'arch') diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi index 21b832fb20b2..f02bf81e5a5a 100644 --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi @@ -115,6 +115,88 @@ interrupts = ; }; + ipmmu_vi0: mmu@febd0000 { + compatible = "renesas,ipmmu-r8a77995"; + reg = <0 0xfebd0000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 14>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_vp0: mmu@fe990000 { + compatible = "renesas,ipmmu-r8a77995"; + reg = <0 0xfe990000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 16>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_vc0: mmu@fe6b0000 { + compatible = "renesas,ipmmu-r8a77995"; + reg = <0 0xfe6b0000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 12>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_pv0: mmu@fd800000 { + compatible = "renesas,ipmmu-r8a77995"; + reg = <0 0xfd800000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 6>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_hc: mmu@e6570000 { + compatible = "renesas,ipmmu-r8a77995"; + reg = <0 0xe6570000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 2>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_rt: mmu@ffc80000 { + compatible = "renesas,ipmmu-r8a77995"; + reg = <0 0xffc80000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 10>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_mp: mmu@ec670000 { + compatible = "renesas,ipmmu-r8a77995"; + reg = <0 0xec670000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 4>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_ds0: mmu@e6740000 { + compatible = "renesas,ipmmu-r8a77995"; + reg = <0 0xe6740000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 0>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_ds1: mmu@e7740000 { + compatible = "renesas,ipmmu-r8a77995"; + reg = <0 0xe7740000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 1>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_mm: mmu@e67b0000 { + compatible = "renesas,ipmmu-r8a77995"; + reg = <0 0xe67b0000 0 0x1000>; + interrupts = , + ; + #iommu-cells = <1>; + status = "disabled"; + }; + + cpg: clock-controller@e6150000 { compatible = "renesas,r8a77995-cpg-mssr"; reg = <0 0xe6150000 0 0x1000>; -- cgit v1.2.3-59-g8ed1b From 2ebdfea2bbf12c7e5c636fbb4d8616f2027e86f7 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Fri, 10 Nov 2017 14:26:05 +0100 Subject: arm64: dts: renesas: r8a77995: Connect Ethernet-AVB to IPMMU-RT Add IPMMU-RT to the Ethernet-AVB device node. Based on work by Magnus Damm for the r8a7795. Signed-off-by: Simon Horman Reviewed-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r8a77995.dtsi | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi index f02bf81e5a5a..cff42cd1a6c8 100644 --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi @@ -525,6 +525,7 @@ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; resets = <&cpg 812>; phy-mode = "rgmii-txid"; + iommus = <&ipmmu_ds0 16>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; -- cgit v1.2.3-59-g8ed1b From cb74dc3ba2ba9390572c3b6a8f9780b00f02036e Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Mon, 13 Nov 2017 18:27:38 +0100 Subject: ARM: pxa: move declarations to proper place Platform data is not the right place for such declarations, use devices.h in the mach-directory where the rest is located. Note that the some board files needed an additional include for this to work. Signed-off-by: Wolfram Sang Signed-off-by: Robert Jarzmik --- arch/arm/mach-pxa/devices.h | 9 +++++++++ arch/arm/mach-pxa/littleton.c | 1 + arch/arm/mach-pxa/xcep.c | 1 + arch/arm/mach-pxa/zeus.c | 1 + arch/arm/mach-pxa/zylonite_pxa300.c | 1 + include/linux/i2c/pxa-i2c.h | 11 ----------- 6 files changed, 13 insertions(+), 11 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-pxa/devices.h b/arch/arm/mach-pxa/devices.h index 905628dfbbbb..11263f7c455b 100644 --- a/arch/arm/mach-pxa/devices.h +++ b/arch/arm/mach-pxa/devices.h @@ -56,3 +56,12 @@ extern struct platform_device pxa93x_device_gpio; void __init pxa_register_device(struct platform_device *dev, void *data); void __init pxa2xx_set_dmac_info(int nb_channels, int nb_requestors); + +struct i2c_pxa_platform_data; +extern void pxa_set_i2c_info(struct i2c_pxa_platform_data *info); +#ifdef CONFIG_PXA27x +extern void pxa27x_set_i2c_power_info(struct i2c_pxa_platform_data *info); +#endif +#ifdef CONFIG_PXA3xx +extern void pxa3xx_set_i2c_power_info(struct i2c_pxa_platform_data *info); +#endif diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c index fae38fdc8d8e..23aea72b4117 100644 --- a/arch/arm/mach-pxa/littleton.c +++ b/arch/arm/mach-pxa/littleton.c @@ -42,6 +42,7 @@ #include #include "pxa300.h" +#include "devices.h" #include #include #include diff --git a/arch/arm/mach-pxa/xcep.c b/arch/arm/mach-pxa/xcep.c index 056369ef250e..fa21951bc9f0 100644 --- a/arch/arm/mach-pxa/xcep.c +++ b/arch/arm/mach-pxa/xcep.c @@ -32,6 +32,7 @@ #include #include "generic.h" +#include "devices.h" #define XCEP_ETH_PHYS (PXA_CS3_PHYS + 0x00000300) #define XCEP_ETH_PHYS_END (PXA_CS3_PHYS + 0x000fffff) diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c index ecbcaee5a2d5..8b16ba46c8c3 100644 --- a/arch/arm/mach-pxa/zeus.c +++ b/arch/arm/mach-pxa/zeus.c @@ -40,6 +40,7 @@ #include #include "pxa27x.h" +#include "devices.h" #include #include #include diff --git a/arch/arm/mach-pxa/zylonite_pxa300.c b/arch/arm/mach-pxa/zylonite_pxa300.c index e247acf1400a..4fb1c556499a 100644 --- a/arch/arm/mach-pxa/zylonite_pxa300.c +++ b/arch/arm/mach-pxa/zylonite_pxa300.c @@ -22,6 +22,7 @@ #include #include "pxa300.h" +#include "devices.h" #include "zylonite.h" #include "generic.h" diff --git a/include/linux/i2c/pxa-i2c.h b/include/linux/i2c/pxa-i2c.h index 53aab243cbd8..5236f216dfae 100644 --- a/include/linux/i2c/pxa-i2c.h +++ b/include/linux/i2c/pxa-i2c.h @@ -71,15 +71,4 @@ struct i2c_pxa_platform_data { unsigned char master_code; unsigned long rate; }; - -extern void pxa_set_i2c_info(struct i2c_pxa_platform_data *info); - -#ifdef CONFIG_PXA27x -extern void pxa27x_set_i2c_power_info(struct i2c_pxa_platform_data *info); -#endif - -#ifdef CONFIG_PXA3xx -extern void pxa3xx_set_i2c_power_info(struct i2c_pxa_platform_data *info); -#endif - #endif -- cgit v1.2.3-59-g8ed1b From f15fc9b12286f64c2b9a8b90f2bcb94915b2c18b Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Mon, 13 Nov 2017 18:27:39 +0100 Subject: ARM: pxa: move header file out of I2C realm include/linux/i2c is to be deprecated. Move this platform_data to the proper platform_data dir. Signed-off-by: Wolfram Sang Signed-off-by: Robert Jarzmik --- arch/arm/mach-mmp/mmp2.h | 2 +- arch/arm/mach-mmp/pxa168.h | 2 +- arch/arm/mach-mmp/pxa910.h | 2 +- arch/arm/mach-pxa/balloon3.c | 2 +- arch/arm/mach-pxa/cm-x300.c | 2 +- arch/arm/mach-pxa/colibri-evalboard.c | 2 +- arch/arm/mach-pxa/colibri-pxa270-income.c | 2 +- arch/arm/mach-pxa/corgi.c | 2 +- arch/arm/mach-pxa/csb726.c | 2 +- arch/arm/mach-pxa/devices.c | 2 +- arch/arm/mach-pxa/em-x270.c | 2 +- arch/arm/mach-pxa/ezx.c | 2 +- arch/arm/mach-pxa/hx4700.c | 2 +- arch/arm/mach-pxa/littleton.c | 2 +- arch/arm/mach-pxa/magician.c | 2 +- arch/arm/mach-pxa/mainstone.c | 2 +- arch/arm/mach-pxa/mioa701.c | 2 +- arch/arm/mach-pxa/mxm8x10.c | 2 +- arch/arm/mach-pxa/palm27x.c | 2 +- arch/arm/mach-pxa/pcm990-baseboard.c | 2 +- arch/arm/mach-pxa/poodle.c | 2 +- arch/arm/mach-pxa/pxa27x.c | 2 +- arch/arm/mach-pxa/pxa3xx.c | 2 +- arch/arm/mach-pxa/raumfeld.c | 2 +- arch/arm/mach-pxa/saar.c | 2 +- arch/arm/mach-pxa/spitz.c | 2 +- arch/arm/mach-pxa/stargate2.c | 2 +- arch/arm/mach-pxa/tosa.c | 2 +- arch/arm/mach-pxa/trizeps4.c | 2 +- arch/arm/mach-pxa/viper.c | 2 +- arch/arm/mach-pxa/vpac270.c | 2 +- arch/arm/mach-pxa/xcep.c | 2 +- arch/arm/mach-pxa/z2.c | 2 +- arch/arm/mach-pxa/zeus.c | 2 +- arch/arm/mach-pxa/zylonite_pxa300.c | 2 +- drivers/i2c/busses/i2c-pxa-pci.c | 2 +- drivers/i2c/busses/i2c-pxa.c | 2 +- include/linux/i2c/pxa-i2c.h | 74 ------------------------------- include/linux/platform_data/i2c-pxa.h | 74 +++++++++++++++++++++++++++++++ 39 files changed, 111 insertions(+), 111 deletions(-) delete mode 100644 include/linux/i2c/pxa-i2c.h create mode 100644 include/linux/platform_data/i2c-pxa.h (limited to 'arch') diff --git a/arch/arm/mach-mmp/mmp2.h b/arch/arm/mach-mmp/mmp2.h index a4b82f719de1..adafc4fba8f4 100644 --- a/arch/arm/mach-mmp/mmp2.h +++ b/arch/arm/mach-mmp/mmp2.h @@ -10,7 +10,7 @@ extern void __init mmp2_init_irq(void); extern void mmp2_clear_pmic_int(void); #include -#include +#include #include #include "devices.h" diff --git a/arch/arm/mach-mmp/pxa168.h b/arch/arm/mach-mmp/pxa168.h index b39bff37ff11..0331c58b07a2 100644 --- a/arch/arm/mach-mmp/pxa168.h +++ b/arch/arm/mach-mmp/pxa168.h @@ -11,7 +11,7 @@ extern void pxa168_restart(enum reboot_mode, const char *); extern void pxa168_clear_keypad_wakeup(void); #include -#include +#include #include #include