From 404b28199378a4ee6033e8c40399d82d1f3bd3bc Mon Sep 17 00:00:00 2001 From: Andrew-CT Chen Date: Tue, 3 May 2016 07:11:22 -0300 Subject: [media] arm64: dts: mediatek: Add node for Mediatek Video Processor Unit Add VPU drivers for MT8173 Signed-off-by: Andrew-CT Chen Signed-off-by: Tiffany Lin Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- arch/arm64/boot/dts/mediatek/mt8173.dtsi | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) (limited to 'arch') diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi index 05f89c4a5413..72a230f81042 100644 --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi @@ -168,6 +168,18 @@ }; }; + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + vpu_dma_reserved: vpu_dma_mem_region { + compatible = "shared-dma-pool"; + reg = <0 0xb7000000 0 0x500000>; + alignment = <0x1000>; + no-map; + }; + }; + timer { compatible = "arm,armv8-timer"; interrupt-parent = <&gic>; @@ -312,6 +324,17 @@ clock-names = "spi", "wrap"; }; + vpu: vpu@10020000 { + compatible = "mediatek,mt8173-vpu"; + reg = <0 0x10020000 0 0x30000>, + <0 0x10050000 0 0x100>; + reg-names = "tcm", "cfg_reg"; + interrupts = ; + clocks = <&topckgen CLK_TOP_SCP_SEL>; + clock-names = "main"; + memory-region = <&vpu_dma_reserved>; + }; + sysirq: intpol-controller@10200620 { compatible = "mediatek,mt8173-sysirq", "mediatek,mt6577-sysirq"; -- cgit v1.2.3-59-g8ed1b From 8eb80252424375de3cdcf16c199d68894b9561f1 Mon Sep 17 00:00:00 2001 From: Tiffany Lin Date: Tue, 3 May 2016 07:11:27 -0300 Subject: [media] arm64: dts: mediatek: Add Video Encoder for MT8173 Add video encoder node for MT8173 Signed-off-by: Tiffany Lin Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- arch/arm64/boot/dts/mediatek/mt8173.dtsi | 39 ++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) (limited to 'arch') diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi index 72a230f81042..77b8c4e388ca 100644 --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi @@ -777,6 +777,45 @@ clock-names = "apb", "smi"; }; + vcodec_enc: vcodec@18002000 { + compatible = "mediatek,mt8173-vcodec-enc"; + reg = <0 0x18002000 0 0x1000>, /* VENC_SYS */ + <0 0x19002000 0 0x1000>; /* VENC_LT_SYS */ + interrupts = , + ; + mediatek,larb = <&larb3>, + <&larb5>; + iommus = <&iommu M4U_PORT_VENC_RCPU>, + <&iommu M4U_PORT_VENC_REC>, + <&iommu M4U_PORT_VENC_BSDMA>, + <&iommu M4U_PORT_VENC_SV_COMV>, + <&iommu M4U_PORT_VENC_RD_COMV>, + <&iommu M4U_PORT_VENC_CUR_LUMA>, + <&iommu M4U_PORT_VENC_CUR_CHROMA>, + <&iommu M4U_PORT_VENC_REF_LUMA>, + <&iommu M4U_PORT_VENC_REF_CHROMA>, + <&iommu M4U_PORT_VENC_NBM_RDMA>, + <&iommu M4U_PORT_VENC_NBM_WDMA>, + <&iommu M4U_PORT_VENC_RCPU_SET2>, + <&iommu M4U_PORT_VENC_REC_FRM_SET2>, + <&iommu M4U_PORT_VENC_BSDMA_SET2>, + <&iommu M4U_PORT_VENC_SV_COMA_SET2>, + <&iommu M4U_PORT_VENC_RD_COMA_SET2>, + <&iommu M4U_PORT_VENC_CUR_LUMA_SET2>, + <&iommu M4U_PORT_VENC_CUR_CHROMA_SET2>, + <&iommu M4U_PORT_VENC_REF_LUMA_SET2>, + <&iommu M4U_PORT_VENC_REC_CHROMA_SET2>; + mediatek,vpu = <&vpu>; + clocks = <&topckgen CLK_TOP_VENCPLL_D2>, + <&topckgen CLK_TOP_VENC_SEL>, + <&topckgen CLK_TOP_UNIVPLL1_D2>, + <&topckgen CLK_TOP_VENC_LT_SEL>; + clock-names = "venc_sel_src", + "venc_sel", + "venc_lt_sel_src", + "venc_lt_sel"; + }; + vencltsys: clock-controller@19000000 { compatible = "mediatek,mt8173-vencltsys", "syscon"; reg = <0 0x19000000 0 0x1000>; -- cgit v1.2.3-59-g8ed1b From e3513f3f41aba3bf72a5faa32b378d42de842e84 Mon Sep 17 00:00:00 2001 From: Hans Verkuil Date: Tue, 28 Jun 2016 11:52:42 -0300 Subject: [media] ezkit/cobalt: drop unused op_656_range setting The adv7604/adv7842 drivers now handle that register setting themselves and need no input from platform data anymore. This was a left-over from the time that the pixelport output format was decided by the platform data. Signed-off-by: Hans Verkuil Cc: Scott Jiang Signed-off-by: Mauro Carvalho Chehab --- arch/blackfin/mach-bf609/boards/ezkit.c | 2 -- drivers/media/pci/cobalt/cobalt-driver.c | 2 -- 2 files changed, 4 deletions(-) (limited to 'arch') diff --git a/arch/blackfin/mach-bf609/boards/ezkit.c b/arch/blackfin/mach-bf609/boards/ezkit.c index aad5d7416886..9231e5a72b93 100644 --- a/arch/blackfin/mach-bf609/boards/ezkit.c +++ b/arch/blackfin/mach-bf609/boards/ezkit.c @@ -1002,14 +1002,12 @@ static struct adv7842_output_format adv7842_opf[] = { { .op_ch_sel = ADV7842_OP_CH_SEL_BRG, .op_format_sel = ADV7842_OP_FORMAT_SEL_SDR_ITU656_8, - .op_656_range = 1, .blank_data = 1, .insert_av_codes = 1, }, { .op_ch_sel = ADV7842_OP_CH_SEL_RGB, .op_format_sel = ADV7842_OP_FORMAT_SEL_SDR_ITU656_16, - .op_656_range = 1, .blank_data = 1, }, }; diff --git a/drivers/media/pci/cobalt/cobalt-driver.c b/drivers/media/pci/cobalt/cobalt-driver.c index 1aaa2b074f48..476f7f0dcf81 100644 --- a/drivers/media/pci/cobalt/cobalt-driver.c +++ b/drivers/media/pci/cobalt/cobalt-driver.c @@ -492,7 +492,6 @@ static int cobalt_subdevs_init(struct cobalt *cobalt) .ain_sel = ADV7604_AIN7_8_9_NC_SYNC_3_1, .bus_order = ADV7604_BUS_ORDER_BRG, .blank_data = 1, - .op_656_range = 1, .op_format_mode_sel = ADV7604_OP_FORMAT_MODE0, .int1_config = ADV76XX_INT1_CONFIG_ACTIVE_HIGH, .dr_str_data = ADV76XX_DR_STR_HIGH, @@ -571,7 +570,6 @@ static int cobalt_subdevs_hsma_init(struct cobalt *cobalt) .bus_order = ADV7842_BUS_ORDER_RBG, .op_format_mode_sel = ADV7842_OP_FORMAT_MODE0, .blank_data = 1, - .op_656_range = 1, .dr_str_data = 3, .dr_str_clk = 3, .dr_str_sync = 3, -- cgit v1.2.3-59-g8ed1b