From 10cb54de2c97847cd5b6b2df4e8b359e65266181 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Wed, 23 Nov 2011 14:46:36 +1000 Subject: m68knommu: hard set the ColdFire MBAR register on startup The ColdFire MBAR register that holds the mapping of the peripheral region on some ColdFire CPUs is configurable. It can be configured at some address different to that of the bootloader that loaded the kernel. So hard set the MBAR register mapping at kernel startup time. Signed-off-by: Alexander Stein Signed-off-by: Greg Ungerer --- arch/m68k/platform/coldfire/head.S | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch') diff --git a/arch/m68k/platform/coldfire/head.S b/arch/m68k/platform/coldfire/head.S index 38f04a3f6207..c3db70ed33b3 100644 --- a/arch/m68k/platform/coldfire/head.S +++ b/arch/m68k/platform/coldfire/head.S @@ -158,6 +158,10 @@ _start: #if defined(CONFIG_UBOOT) movel %sp,_init_sp /* save initial stack pointer */ #endif +#ifdef CONFIG_MBAR + movel #CONFIG_MBAR+1,%d0 /* configured MBAR address */ + movec %d0,%MBAR /* set it */ +#endif /* * Do any platform or board specific setup now. Most boards -- cgit v1.2.3-59-g8ed1b From f84f52a5c15db7d14a534815f27253b001735183 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Thu, 5 Jan 2012 15:51:13 +1000 Subject: m68knommu: clean up linker script There is a lot of years of collected cruft in the m68knommu linker script. Clean it all up and use the well defined linker script support macros. Support is maintained for building both ROM/FLASH based and RAM based setups. No major changes to section layouts, though the rodata section is now lumped in with the read/write data section. Signed-off-by: Greg Ungerer --- arch/m68k/kernel/vmlinux-nommu.lds | 200 +++++++++---------------------------- 1 file changed, 49 insertions(+), 151 deletions(-) (limited to 'arch') diff --git a/arch/m68k/kernel/vmlinux-nommu.lds b/arch/m68k/kernel/vmlinux-nommu.lds index 8e66ccb0935e..40e02d9c38b4 100644 --- a/arch/m68k/kernel/vmlinux-nommu.lds +++ b/arch/m68k/kernel/vmlinux-nommu.lds @@ -1,195 +1,93 @@ /* * vmlinux.lds.S -- master linker script for m68knommu arch * - * (C) Copyright 2002-2006, Greg Ungerer + * (C) Copyright 2002-2012, Greg Ungerer * * This linker script is equipped to build either ROM loaded or RAM * run kernels. */ -#include -#include -#include - #if defined(CONFIG_RAMKERNEL) -#define RAM_START CONFIG_KERNELBASE -#define RAM_LENGTH (CONFIG_RAMBASE + CONFIG_RAMSIZE - CONFIG_KERNELBASE) -#define TEXT ram -#define DATA ram -#define INIT ram -#define BSSS ram -#endif -#if defined(CONFIG_ROMKERNEL) || defined(CONFIG_HIMEMKERNEL) -#define RAM_START CONFIG_RAMBASE -#define RAM_LENGTH CONFIG_RAMSIZE -#define ROMVEC_START CONFIG_ROMVEC -#define ROMVEC_LENGTH CONFIG_ROMVECSIZE -#define ROM_START CONFIG_ROMSTART -#define ROM_LENGTH CONFIG_ROMSIZE -#define TEXT rom -#define DATA ram -#define INIT ram -#define BSSS ram +#define KTEXT_ADDR CONFIG_KERNELBASE #endif - -#ifndef DATA_ADDR -#define DATA_ADDR +#if defined(CONFIG_ROMKERNEL) +#define KTEXT_ADDR CONFIG_ROMSTART +#define KDATA_ADDR CONFIG_KERNELBASE +#define LOAD_OFFSET KDATA_ADDR + (ADDR(.text) + SIZEOF(.text)) #endif +#include +#include +#include OUTPUT_ARCH(m68k) ENTRY(_start) -MEMORY { - ram : ORIGIN = RAM_START, LENGTH = RAM_LENGTH -#ifdef ROM_START - romvec : ORIGIN = ROMVEC_START, LENGTH = ROMVEC_LENGTH - rom : ORIGIN = ROM_START, LENGTH = ROM_LENGTH -#endif -} - jiffies = jiffies_64 + 4; SECTIONS { -#ifdef ROMVEC_START - . = ROMVEC_START ; +#ifdef CONFIG_ROMVEC + . = CONFIG_ROMVEC; .romvec : { - __rom_start = . ; + __rom_start = .; _romvec = .; + *(.romvec) *(.data..initvect) - } > romvec + } #endif + . = KTEXT_ADDR; + + _text = .; + _stext = .; .text : { - _text = .; - _stext = . ; HEAD_TEXT TEXT_TEXT SCHED_TEXT LOCK_TEXT - *(.text..lock) *(.fixup) + . = ALIGN(16); + } + _etext = .; + +#ifdef KDATA_ADDR + . = KDATA_ADDR; +#endif + + _sdata = .; + RO_DATA_SECTION(PAGE_SIZE) + RW_DATA_SECTION(16, PAGE_SIZE, THREAD_SIZE) + _edata = .; - . = ALIGN(16); /* Exception table */ - __start___ex_table = .; - *(__ex_table) - __stop___ex_table = .; - - *(.rodata) *(.rodata.*) - *(__vermagic) /* Kernel version magic */ - *(.rodata1) - *(.rodata.str1.1) - - /* Kernel symbol table: Normal symbols */ - . = ALIGN(4); - __start___ksymtab = .; - *(SORT(___ksymtab+*)) - __stop___ksymtab = .; - - /* Kernel symbol table: GPL-only symbols */ - __start___ksymtab_gpl = .; - *(SORT(___ksymtab_gpl+*)) - __stop___ksymtab_gpl = .; - - /* Kernel symbol table: Normal unused symbols */ - __start___ksymtab_unused = .; - *(SORT(___ksymtab_unused+*)) - __stop___ksymtab_unused = .; - - /* Kernel symbol table: GPL-only unused symbols */ - __start___ksymtab_unused_gpl = .; - *(SORT(___ksymtab_unused_gpl+*)) - __stop___ksymtab_unused_gpl = .; - - /* Kernel symbol table: GPL-future symbols */ - __start___ksymtab_gpl_future = .; - *(SORT(___ksymtab_gpl_future+*)) - __stop___ksymtab_gpl_future = .; - - /* Kernel symbol table: Normal symbols */ - __start___kcrctab = .; - *(SORT(___kcrctab+*)) - __stop___kcrctab = .; - - /* Kernel symbol table: GPL-only symbols */ - __start___kcrctab_gpl = .; - *(SORT(___kcrctab_gpl+*)) - __stop___kcrctab_gpl = .; - - /* Kernel symbol table: Normal unused symbols */ - __start___kcrctab_unused = .; - *(SORT(___kcrctab_unused+*)) - __stop___kcrctab_unused = .; - - /* Kernel symbol table: GPL-only unused symbols */ - __start___kcrctab_unused_gpl = .; - *(SORT(___kcrctab_unused_gpl+*)) - __stop___kcrctab_unused_gpl = .; - - /* Kernel symbol table: GPL-future symbols */ - __start___kcrctab_gpl_future = .; - *(SORT(___kcrctab_gpl_future+*)) - __stop___kcrctab_gpl_future = .; - - /* Kernel symbol table: strings */ - *(__ksymtab_strings) - - /* Built-in module parameters */ - . = ALIGN(4) ; - __start___param = .; - *(__param) - __stop___param = .; - - /* Built-in module versions */ - . = ALIGN(4) ; - __start___modver = .; - *(__modver) - __stop___modver = .; - - . = ALIGN(4) ; - _etext = . ; - } > TEXT - - .data DATA_ADDR : { - . = ALIGN(4); - _sdata = . ; - DATA_DATA - CACHELINE_ALIGNED_DATA(32) - PAGE_ALIGNED_DATA(PAGE_SIZE) - *(.data..shared_aligned) - INIT_TASK_DATA(THREAD_SIZE) - _edata = . ; - } > DATA + EXCEPTION_TABLE(16) + NOTES + . = ALIGN(PAGE_SIZE); + __init_begin = .; + INIT_TEXT_SECTION(PAGE_SIZE) + INIT_DATA_SECTION(16) + PERCPU_SECTION(16) .m68k_fixup : { __start_fixup = .; *(.m68k_fixup) __stop_fixup = .; - } > DATA - NOTES > DATA - - .init.text : { - . = ALIGN(PAGE_SIZE); - __init_begin = .; - } > INIT - INIT_TEXT_SECTION(PAGE_SIZE) > INIT - INIT_DATA_SECTION(16) > INIT + } .init.data : { . = ALIGN(PAGE_SIZE); __init_end = .; - } > INIT - - .bss : { - . = ALIGN(4); - _sbss = . ; - *(.bss) - *(COMMON) - . = ALIGN(4) ; - _ebss = . ; - _end = . ; - } > BSSS + } + + _sbss = .; + BSS_SECTION(0, 0, 0) + _ebss = .; + + _end = .; + + STABS_DEBUG + .comment 0 : { *(.comment) } + /* Sections to be discarded */ DISCARDS } -- cgit v1.2.3-59-g8ed1b From d3f033f894c433d3c9bf347a0a84f45dac0b14ac Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Mon, 23 Jan 2012 13:12:41 +1000 Subject: m68knommu: remove reduntant definitions of _ramvec The base of the real RAM resident hardware vectors, _ramvec, is declared in our asm/traps.h. No need to have local declarations spread around in other files that use this. So remove them. Signed-off-by: Greg Ungerer --- arch/m68k/platform/68328/ints.c | 2 -- arch/m68k/platform/68360/ints.c | 2 -- arch/m68k/platform/coldfire/vectors.c | 2 -- 3 files changed, 6 deletions(-) (limited to 'arch') diff --git a/arch/m68k/platform/68328/ints.c b/arch/m68k/platform/68328/ints.c index 4bd456531f91..b3810febb3e3 100644 --- a/arch/m68k/platform/68328/ints.c +++ b/arch/m68k/platform/68328/ints.c @@ -68,8 +68,6 @@ asmlinkage irqreturn_t inthandler5(void); asmlinkage irqreturn_t inthandler6(void); asmlinkage irqreturn_t inthandler7(void); -extern e_vector *_ramvec; - /* The 68k family did not have a good way to determine the source * of interrupts until later in the family. The EC000 core does * not provide the vector number on the stack, we vector everything diff --git a/arch/m68k/platform/68360/ints.c b/arch/m68k/platform/68360/ints.c index 7b40202d9638..8cd42692331b 100644 --- a/arch/m68k/platform/68360/ints.c +++ b/arch/m68k/platform/68360/ints.c @@ -32,8 +32,6 @@ asmlinkage void trap(void); asmlinkage void bad_interrupt(void); asmlinkage void inthandler(void); -extern void *_ramvec[]; - static void intc_irq_unmask(struct irq_data *d) { pquicc->intr_cimr |= (1 << d->irq); diff --git a/arch/m68k/platform/coldfire/vectors.c b/arch/m68k/platform/coldfire/vectors.c index 3a7cc524ecd3..a4dbdecbec7a 100644 --- a/arch/m68k/platform/coldfire/vectors.c +++ b/arch/m68k/platform/coldfire/vectors.c @@ -33,8 +33,6 @@ asmlinkage void dbginterrupt_c(struct frame *fp) /***************************************************************************/ -extern e_vector *_ramvec; - /* Assembler routines */ asmlinkage void buserr(void); asmlinkage void trap(void); -- cgit v1.2.3-59-g8ed1b From 9517746131f62294ddd922bcd288415be5104c23 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Mon, 23 Jan 2012 13:25:56 +1000 Subject: m68knommu: make persistent clock code consistent with m68k The read_persistent_clock() code is different on m68knommu, for really no reason. With a few changes to support function names and some code re-organization the code can be made the same. This will make it easier to merge the arch/m68k/kernel/time.c for m68k and m68knommu in a future patch. Signed-off-by: Greg Ungerer --- arch/m68k/include/asm/machdep.h | 2 -- arch/m68k/kernel/setup_no.c | 2 ++ arch/m68k/kernel/time_no.c | 36 ++++++++++++------------------------ arch/m68k/platform/68328/config.c | 5 +++-- arch/m68k/platform/68328/timers.c | 18 +++++++++++------- arch/m68k/platform/68360/config.c | 8 +------- arch/m68k/platform/68EZ328/config.c | 5 +++-- arch/m68k/platform/68VZ328/config.c | 5 +++-- 8 files changed, 35 insertions(+), 46 deletions(-) (limited to 'arch') diff --git a/arch/m68k/include/asm/machdep.h b/arch/m68k/include/asm/machdep.h index 789f3b2de0e9..3bfa7df35729 100644 --- a/arch/m68k/include/asm/machdep.h +++ b/arch/m68k/include/asm/machdep.h @@ -22,8 +22,6 @@ extern unsigned int (*mach_get_ss)(void); extern int (*mach_get_rtc_pll)(struct rtc_pll_info *); extern int (*mach_set_rtc_pll)(struct rtc_pll_info *); extern int (*mach_set_clock_mmss)(unsigned long); -extern void (*mach_gettod)(int *year, int *mon, int *day, int *hour, - int *min, int *sec); extern void (*mach_reset)( void ); extern void (*mach_halt)( void ); extern void (*mach_power_off)( void ); diff --git a/arch/m68k/kernel/setup_no.c b/arch/m68k/kernel/setup_no.c index ca3df0dc7e88..8394b56b2c72 100644 --- a/arch/m68k/kernel/setup_no.c +++ b/arch/m68k/kernel/setup_no.c @@ -31,6 +31,7 @@ #include #include #include +#include #include #include @@ -48,6 +49,7 @@ char __initdata command_line[COMMAND_LINE_SIZE]; /* machine dependent timer functions */ int (*mach_set_clock_mmss)(unsigned long); +int (*mach_hwclk) (int, struct rtc_time*); /* machine dependent reboot functions */ void (*mach_reset)(void); diff --git a/arch/m68k/kernel/time_no.c b/arch/m68k/kernel/time_no.c index 3ef0f7768dcd..ca3b3b4d4630 100644 --- a/arch/m68k/kernel/time_no.c +++ b/arch/m68k/kernel/time_no.c @@ -20,15 +20,11 @@ #include #include #include +#include #include #include -#define TICK_SIZE (tick_nsec / 1000) - -/* machine dependent timer functions */ -void (*mach_gettod)(int*, int*, int*, int*, int*, int*); - static inline int set_rtc_mmss(unsigned long nowtime) { if (mach_set_clock_mmss) @@ -55,28 +51,20 @@ irqreturn_t arch_timer_interrupt(int irq, void *dummy) } #endif -static unsigned long read_rtc_mmss(void) -{ - unsigned int year, mon, day, hour, min, sec; - - if (mach_gettod) { - mach_gettod(&year, &mon, &day, &hour, &min, &sec); - if ((year += 1900) < 1970) - year += 100; - } else { - year = 1970; - mon = day = 1; - hour = min = sec = 0; - } - - - return mktime(year, mon, day, hour, min, sec); -} - void read_persistent_clock(struct timespec *ts) { - ts->tv_sec = read_rtc_mmss(); + struct rtc_time time; + ts->tv_sec = 0; ts->tv_nsec = 0; + + if (mach_hwclk) { + mach_hwclk(0, &time); + + if ((time.tm_year += 1900) < 1970) + time.tm_year += 100; + ts->tv_sec = mktime(time.tm_year, time.tm_mon, time.tm_mday, + time.tm_hour, time.tm_min, time.tm_sec); + } } int update_persistent_clock(struct timespec now) diff --git a/arch/m68k/platform/68328/config.c b/arch/m68k/platform/68328/config.c index d70bf2623db1..44b866544314 100644 --- a/arch/m68k/platform/68328/config.c +++ b/arch/m68k/platform/68328/config.c @@ -17,6 +17,7 @@ #include #include +#include #include #include #include @@ -26,7 +27,7 @@ /***************************************************************************/ -void m68328_timer_gettod(int *year, int *mon, int *day, int *hour, int *min, int *sec); +int m68328_hwclk(int set, struct rtc_time *t); /***************************************************************************/ @@ -48,7 +49,7 @@ void config_BSP(char *command, int len) printk(KERN_INFO "68328 support Kenneth Albanowski \n"); printk(KERN_INFO "68328/Pilot support Bernhard Kuhn \n"); - mach_gettod = m68328_timer_gettod; + mach_hwclk = m68328_hwclk; mach_reset = m68328_reset; } diff --git a/arch/m68k/platform/68328/timers.c b/arch/m68k/platform/68328/timers.c index f2678866067b..b15ddef1ec76 100644 --- a/arch/m68k/platform/68328/timers.c +++ b/arch/m68k/platform/68328/timers.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include #include @@ -119,14 +120,17 @@ void hw_timer_init(void) /***************************************************************************/ -void m68328_timer_gettod(int *year, int *mon, int *day, int *hour, int *min, int *sec) +int m68328_hwclk(int set, struct rtc_time *t) { - long now = RTCTIME; - - *year = *mon = *day = 1; - *hour = (now >> 24) % 24; - *min = (now >> 16) % 60; - *sec = now % 60; + if (!set) { + long now = RTCTIME; + t->tm_year = t->tm_mon = t->tm_mday = 1; + t->tm_hour = (now >> 24) % 24; + t->tm_min = (now >> 16) % 60; + t->tm_sec = now % 60; + } + + return 0; } /***************************************************************************/ diff --git a/arch/m68k/platform/68360/config.c b/arch/m68k/platform/68360/config.c index 9dd5bca38749..599a5949f320 100644 --- a/arch/m68k/platform/68360/config.c +++ b/arch/m68k/platform/68360/config.c @@ -103,11 +103,6 @@ void hw_timer_init(void) pquicc->timer_tgcr = tgcr_save; } -void BSP_gettod (int *yearp, int *monp, int *dayp, - int *hourp, int *minp, int *secp) -{ -} - int BSP_set_clock_mmss(unsigned long nowtime) { #if 0 @@ -181,6 +176,5 @@ void config_BSP(char *command, int len) scc1_hwaddr = "\00\01\02\03\04\05"; #endif - mach_gettod = BSP_gettod; - mach_reset = BSP_reset; + mach_reset = BSP_reset; } diff --git a/arch/m68k/platform/68EZ328/config.c b/arch/m68k/platform/68EZ328/config.c index 1be1a16f6896..dd2c53554341 100644 --- a/arch/m68k/platform/68EZ328/config.c +++ b/arch/m68k/platform/68EZ328/config.c @@ -15,6 +15,7 @@ #include #include +#include #include #include #include @@ -25,7 +26,7 @@ /***************************************************************************/ -void m68328_timer_gettod(int *year, int *mon, int *day, int *hour, int *min, int *sec); +int m68328_hwclk(int set, struct rtc_time *t); /***************************************************************************/ @@ -69,7 +70,7 @@ void config_BSP(char *command, int len) else command[0] = 0; #endif - mach_gettod = m68328_timer_gettod; + mach_hwclk = m68328_hwclk; mach_reset = m68ez328_reset; } diff --git a/arch/m68k/platform/68VZ328/config.c b/arch/m68k/platform/68VZ328/config.c index eabaabe8af36..25ec673edc25 100644 --- a/arch/m68k/platform/68VZ328/config.c +++ b/arch/m68k/platform/68VZ328/config.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include @@ -33,7 +34,7 @@ /***************************************************************************/ -void m68328_timer_gettod(int *year, int *mon, int *day, int *hour, int *min, int *sec); +int m68328_hwclk(int set, struct rtc_time *t); /***************************************************************************/ /* Init Drangon Engine hardware */ @@ -181,7 +182,7 @@ void config_BSP(char *command, int size) init_hardware(command, size); - mach_gettod = m68328_timer_gettod; + mach_hwclk = m68328_hwclk; mach_reset = m68vz328_reset; } -- cgit v1.2.3-59-g8ed1b From 35aefb2645d1ae7576699b2d7b66d6c9503113fc Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Mon, 23 Jan 2012 15:34:58 +1000 Subject: m68knommu: modify timer init code to make it consistent with m68k code With a few small changes we can make the m68knommu timer init code the same as the m68k code. By using the mach_sched_init function pointer and reworking the current timer initializers to keep track of the common m68k timer_interrupt() handler we end up with almost identical code for m68knommu. This will allow us to more easily merge the mmu and non-mmu m68k time.c in future patches. Signed-off-by: Greg Ungerer --- arch/m68k/include/asm/machdep.h | 3 +-- arch/m68k/kernel/setup_no.c | 1 + arch/m68k/kernel/time_no.c | 8 +++----- arch/m68k/platform/5206/config.c | 1 + arch/m68k/platform/520x/config.c | 1 + arch/m68k/platform/523x/config.c | 1 + arch/m68k/platform/5249/config.c | 1 + arch/m68k/platform/5272/config.c | 1 + arch/m68k/platform/527x/config.c | 1 + arch/m68k/platform/528x/config.c | 1 + arch/m68k/platform/5307/config.c | 1 + arch/m68k/platform/532x/config.c | 2 ++ arch/m68k/platform/5407/config.c | 1 + arch/m68k/platform/54xx/config.c | 1 + arch/m68k/platform/coldfire/pit.c | 2 +- arch/m68k/platform/coldfire/sltimers.c | 7 +++++-- arch/m68k/platform/coldfire/timers.c | 7 +++++-- 17 files changed, 28 insertions(+), 12 deletions(-) (limited to 'arch') diff --git a/arch/m68k/include/asm/machdep.h b/arch/m68k/include/asm/machdep.h index 3bfa7df35729..825c1c813196 100644 --- a/arch/m68k/include/asm/machdep.h +++ b/arch/m68k/include/asm/machdep.h @@ -33,9 +33,8 @@ extern void (*mach_l2_flush) (int); extern void (*mach_beep) (unsigned int, unsigned int); /* Hardware clock functions */ -extern void hw_timer_init(void); +extern void hw_timer_init(irq_handler_t handler); extern unsigned long hw_timer_offset(void); -extern irqreturn_t arch_timer_interrupt(int irq, void *dummy); extern void config_BSP(char *command, int len); diff --git a/arch/m68k/kernel/setup_no.c b/arch/m68k/kernel/setup_no.c index 8394b56b2c72..7dc186b7a85f 100644 --- a/arch/m68k/kernel/setup_no.c +++ b/arch/m68k/kernel/setup_no.c @@ -48,6 +48,7 @@ EXPORT_SYMBOL(memory_end); char __initdata command_line[COMMAND_LINE_SIZE]; /* machine dependent timer functions */ +void (*mach_sched_init)(irq_handler_t handler) __initdata = NULL; int (*mach_set_clock_mmss)(unsigned long); int (*mach_hwclk) (int, struct rtc_time*); diff --git a/arch/m68k/kernel/time_no.c b/arch/m68k/kernel/time_no.c index ca3b3b4d4630..5fa42f126706 100644 --- a/arch/m68k/kernel/time_no.c +++ b/arch/m68k/kernel/time_no.c @@ -32,12 +32,11 @@ static inline int set_rtc_mmss(unsigned long nowtime) return -1; } -#ifndef CONFIG_GENERIC_CLOCKEVENTS /* * timer_interrupt() needs to keep up the real-time clock, * as well as call the "xtime_update()" routine every clocktick */ -irqreturn_t arch_timer_interrupt(int irq, void *dummy) +static irqreturn_t timer_interrupt(int irq, void *dummy) { if (current->pid) @@ -49,7 +48,6 @@ irqreturn_t arch_timer_interrupt(int irq, void *dummy) return(IRQ_HANDLED); } -#endif void read_persistent_clock(struct timespec *ts) { @@ -72,7 +70,7 @@ int update_persistent_clock(struct timespec now) return set_rtc_mmss(now.tv_sec); } -void time_init(void) +void __init time_init(void) { - hw_timer_init(); + mach_sched_init(timer_interrupt); } diff --git a/arch/m68k/platform/5206/config.c b/arch/m68k/platform/5206/config.c index 6fa3f800277a..7826b70b1741 100644 --- a/arch/m68k/platform/5206/config.c +++ b/arch/m68k/platform/5206/config.c @@ -105,6 +105,7 @@ void __init config_BSP(char *commandp, int size) #endif /* CONFIG_NETtel */ mach_reset = m5206_cpu_reset; + mach_sched_init = hw_timer_init; m5206_timers_init(); m5206_uarts_init(); diff --git a/arch/m68k/platform/520x/config.c b/arch/m68k/platform/520x/config.c index 8a98683f1b15..61c25151d221 100644 --- a/arch/m68k/platform/520x/config.c +++ b/arch/m68k/platform/520x/config.c @@ -291,6 +291,7 @@ static void m520x_cpu_reset(void) void __init config_BSP(char *commandp, int size) { mach_reset = m520x_cpu_reset; + mach_sched_init = hw_timer_init; m520x_uarts_init(); m520x_fec_init(); #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) diff --git a/arch/m68k/platform/523x/config.c b/arch/m68k/platform/523x/config.c index 71f4436ec809..aa28392ca4ce 100644 --- a/arch/m68k/platform/523x/config.c +++ b/arch/m68k/platform/523x/config.c @@ -274,6 +274,7 @@ static void m523x_cpu_reset(void) void __init config_BSP(char *commandp, int size) { mach_reset = m523x_cpu_reset; + mach_sched_init = hw_timer_init; } /***************************************************************************/ diff --git a/arch/m68k/platform/5249/config.c b/arch/m68k/platform/5249/config.c index ceb31e5744a6..50e2d8f23251 100644 --- a/arch/m68k/platform/5249/config.c +++ b/arch/m68k/platform/5249/config.c @@ -307,6 +307,7 @@ void m5249_cpu_reset(void) void __init config_BSP(char *commandp, int size) { mach_reset = m5249_cpu_reset; + mach_sched_init = hw_timer_init; m5249_timers_init(); m5249_uarts_init(); #ifdef CONFIG_M5249C3 diff --git a/arch/m68k/platform/5272/config.c b/arch/m68k/platform/5272/config.c index 65bb582734e1..426e66c44736 100644 --- a/arch/m68k/platform/5272/config.c +++ b/arch/m68k/platform/5272/config.c @@ -146,6 +146,7 @@ void __init config_BSP(char *commandp, int size) #endif mach_reset = m5272_cpu_reset; + mach_sched_init = hw_timer_init; } /***************************************************************************/ diff --git a/arch/m68k/platform/527x/config.c b/arch/m68k/platform/527x/config.c index 3ebc769cefda..c948a16beea8 100644 --- a/arch/m68k/platform/527x/config.c +++ b/arch/m68k/platform/527x/config.c @@ -364,6 +364,7 @@ static void m527x_cpu_reset(void) void __init config_BSP(char *commandp, int size) { mach_reset = m527x_cpu_reset; + mach_sched_init = hw_timer_init; m527x_uarts_init(); m527x_fec_init(); #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) diff --git a/arch/m68k/platform/528x/config.c b/arch/m68k/platform/528x/config.c index 7abe77a2f3e3..08f397a382bb 100644 --- a/arch/m68k/platform/528x/config.c +++ b/arch/m68k/platform/528x/config.c @@ -306,6 +306,7 @@ void __init config_BSP(char *commandp, int size) static int __init init_BSP(void) { mach_reset = m528x_cpu_reset; + mach_sched_init = hw_timer_init; m528x_uarts_init(); m528x_fec_init(); #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) diff --git a/arch/m68k/platform/5307/config.c b/arch/m68k/platform/5307/config.c index 00900ac06a9c..6bf7c1cca627 100644 --- a/arch/m68k/platform/5307/config.c +++ b/arch/m68k/platform/5307/config.c @@ -115,6 +115,7 @@ void __init config_BSP(char *commandp, int size) #endif mach_reset = m5307_cpu_reset; + mach_sched_init = hw_timer_init; m5307_timers_init(); m5307_uarts_init(); diff --git a/arch/m68k/platform/532x/config.c b/arch/m68k/platform/532x/config.c index ca51323f957b..3558a620a00c 100644 --- a/arch/m68k/platform/532x/config.c +++ b/arch/m68k/platform/532x/config.c @@ -263,6 +263,8 @@ void __init config_BSP(char *commandp, int size) } #endif + mach_sched_init = hw_timer_init; + #ifdef CONFIG_BDM_DISABLE /* * Disable the BDM clocking. This also turns off most of the rest of diff --git a/arch/m68k/platform/5407/config.c b/arch/m68k/platform/5407/config.c index 70ea789a400c..4861be602dcd 100644 --- a/arch/m68k/platform/5407/config.c +++ b/arch/m68k/platform/5407/config.c @@ -99,6 +99,7 @@ void m5407_cpu_reset(void) void __init config_BSP(char *commandp, int size) { mach_reset = m5407_cpu_reset; + mach_sched_init = hw_timer_init; m5407_timers_init(); m5407_uarts_init(); diff --git a/arch/m68k/platform/54xx/config.c b/arch/m68k/platform/54xx/config.c index ee043540bfa2..8282ef1c783e 100644 --- a/arch/m68k/platform/54xx/config.c +++ b/arch/m68k/platform/54xx/config.c @@ -145,6 +145,7 @@ void __init config_BSP(char *commandp, int size) mmu_context_init(); #endif mach_reset = mcf54xx_reset; + mach_sched_init = hw_timer_init; m54xx_uarts_init(); } diff --git a/arch/m68k/platform/coldfire/pit.c b/arch/m68k/platform/coldfire/pit.c index 02663d25822d..e62dbbcb10f6 100644 --- a/arch/m68k/platform/coldfire/pit.c +++ b/arch/m68k/platform/coldfire/pit.c @@ -149,7 +149,7 @@ static struct clocksource pit_clk = { /***************************************************************************/ -void hw_timer_init(void) +void hw_timer_init(irq_handler_t handler) { cf_pit_clockevent.cpumask = cpumask_of(smp_processor_id()); cf_pit_clockevent.mult = div_sc(FREQ, NSEC_PER_SEC, 32); diff --git a/arch/m68k/platform/coldfire/sltimers.c b/arch/m68k/platform/coldfire/sltimers.c index 54e1452f853a..2027fc20b876 100644 --- a/arch/m68k/platform/coldfire/sltimers.c +++ b/arch/m68k/platform/coldfire/sltimers.c @@ -81,12 +81,14 @@ void mcfslt_profile_init(void) static u32 mcfslt_cycles_per_jiffy; static u32 mcfslt_cnt; +static irq_handler_t timer_interrupt; + static irqreturn_t mcfslt_tick(int irq, void *dummy) { /* Reset Slice Timer 0 */ __raw_writel(MCFSLT_SSR_BE | MCFSLT_SSR_TE, TA(MCFSLT_SSR)); mcfslt_cnt += mcfslt_cycles_per_jiffy; - return arch_timer_interrupt(irq, dummy); + return timer_interrupt(irq, dummy); } static struct irqaction mcfslt_timer_irq = { @@ -121,7 +123,7 @@ static struct clocksource mcfslt_clk = { .flags = CLOCK_SOURCE_IS_CONTINUOUS, }; -void hw_timer_init(void) +void hw_timer_init(irq_handler_t handler) { mcfslt_cycles_per_jiffy = MCF_BUSCLK / HZ; /* @@ -136,6 +138,7 @@ void hw_timer_init(void) /* initialize mcfslt_cnt knowing that slice timers count down */ mcfslt_cnt = mcfslt_cycles_per_jiffy; + timer_interrupt = handler; setup_irq(MCF_IRQ_TIMER, &mcfslt_timer_irq); clocksource_register_hz(&mcfslt_clk, MCF_BUSCLK); diff --git a/arch/m68k/platform/coldfire/timers.c b/arch/m68k/platform/coldfire/timers.c index 0d90da32fcdb..d0b4e9798fde 100644 --- a/arch/m68k/platform/coldfire/timers.c +++ b/arch/m68k/platform/coldfire/timers.c @@ -47,6 +47,8 @@ void coldfire_profile_init(void); static u32 mcftmr_cycles_per_jiffy; static u32 mcftmr_cnt; +static irq_handler_t timer_interrupt; + /***************************************************************************/ static irqreturn_t mcftmr_tick(int irq, void *dummy) @@ -55,7 +57,7 @@ static irqreturn_t mcftmr_tick(int irq, void *dummy) __raw_writeb(MCFTIMER_TER_CAP | MCFTIMER_TER_REF, TA(MCFTIMER_TER)); mcftmr_cnt += mcftmr_cycles_per_jiffy; - return arch_timer_interrupt(irq, dummy); + return timer_interrupt(irq, dummy); } /***************************************************************************/ @@ -94,7 +96,7 @@ static struct clocksource mcftmr_clk = { /***************************************************************************/ -void hw_timer_init(void) +void hw_timer_init(irq_handler_t handler) { __raw_writew(MCFTIMER_TMR_DISABLE, TA(MCFTIMER_TMR)); mcftmr_cycles_per_jiffy = FREQ / HZ; @@ -110,6 +112,7 @@ void hw_timer_init(void) clocksource_register_hz(&mcftmr_clk, FREQ); + timer_interrupt = handler; setup_irq(MCF_IRQ_TIMER, &mcftmr_timer_irq); #ifdef CONFIG_HIGHPROFILE -- cgit v1.2.3-59-g8ed1b From b6c58e8af0d1188ce826bb35444f11752000e5e1 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Wed, 22 Feb 2012 13:41:11 +1000 Subject: m68knommu: remove unused CONFIG_GENERIC_CMOS_UPDATE option The CONFIG_GENERIC_CMOS_UPDATE switch is always enabled for the non-MMU m68k case. But the underlying code to support it, update_persistent_clock(), doesn't end up doing anything on the currently supported non-MMU platforms. No platforms supply the necessary function support for writing back the RTC. So lets remove this option and support code. This also brings m68knommu in line with the m68k, which doesn't enabled this switch either. Signed-off-by: Greg Ungerer --- arch/m68k/Kconfig | 3 --- arch/m68k/kernel/time_no.c | 5 ----- 2 files changed, 8 deletions(-) (limited to 'arch') diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig index ae413d4a8bb7..6f823dcc0d70 100644 --- a/arch/m68k/Kconfig +++ b/arch/m68k/Kconfig @@ -24,9 +24,6 @@ config ARCH_HAS_ILOG2_U64 config GENERIC_CLOCKEVENTS bool -config GENERIC_CMOS_UPDATE - def_bool !MMU - config GENERIC_GPIO bool diff --git a/arch/m68k/kernel/time_no.c b/arch/m68k/kernel/time_no.c index 5fa42f126706..87c7acd2706f 100644 --- a/arch/m68k/kernel/time_no.c +++ b/arch/m68k/kernel/time_no.c @@ -65,11 +65,6 @@ void read_persistent_clock(struct timespec *ts) } } -int update_persistent_clock(struct timespec now) -{ - return set_rtc_mmss(now.tv_sec); -} - void __init time_init(void) { mach_sched_init(timer_interrupt); -- cgit v1.2.3-59-g8ed1b From fa7f9e7fade84571800977782b04e07cb0a5dae3 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Mon, 23 Jan 2012 16:23:33 +1000 Subject: m68k: merge mmu and non-mmu versions of time.c There is only trivial differences between the mmu time_mm.c and non-mmu time_no.c files. Merge them back into a single time.c. Signed-off-by: Greg Ungerer Acked-by: Geert Uytterhoeven --- arch/m68k/kernel/time.c | 123 +++++++++++++++++++++++++++++++++++++++++++-- arch/m68k/kernel/time_mm.c | 114 ----------------------------------------- arch/m68k/kernel/time_no.c | 71 -------------------------- 3 files changed, 118 insertions(+), 190 deletions(-) delete mode 100644 arch/m68k/kernel/time_mm.c delete mode 100644 arch/m68k/kernel/time_no.c (limited to 'arch') diff --git a/arch/m68k/kernel/time.c b/arch/m68k/kernel/time.c index 75ab79b3bdeb..adfcefbb34b0 100644 --- a/arch/m68k/kernel/time.c +++ b/arch/m68k/kernel/time.c @@ -1,5 +1,118 @@ -#if defined(CONFIG_MMU) && !defined(CONFIG_COLDFIRE) -#include "time_mm.c" -#else -#include "time_no.c" -#endif +/* + * linux/arch/m68k/kernel/time.c + * + * Copyright (C) 1991, 1992, 1995 Linus Torvalds + * + * This file contains the m68k-specific time handling details. + * Most of the stuff is located in the machine specific files. + * + * 1997-09-10 Updated NTP code according to technical memorandum Jan '96 + * "A Kernel Model for Precision Timekeeping" by Dave Mills + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include +#include +#include + +static inline int set_rtc_mmss(unsigned long nowtime) +{ + if (mach_set_clock_mmss) + return mach_set_clock_mmss (nowtime); + return -1; +} + +/* + * timer_interrupt() needs to keep up the real-time clock, + * as well as call the "xtime_update()" routine every clocktick + */ +static irqreturn_t timer_interrupt(int irq, void *dummy) +{ + xtime_update(1); + update_process_times(user_mode(get_irq_regs())); + profile_tick(CPU_PROFILING); + +#ifdef CONFIG_HEARTBEAT + /* use power LED as a heartbeat instead -- much more useful + for debugging -- based on the version for PReP by Cort */ + /* acts like an actual heart beat -- ie thump-thump-pause... */ + if (mach_heartbeat) { + static unsigned cnt = 0, period = 0, dist = 0; + + if (cnt == 0 || cnt == dist) + mach_heartbeat( 1 ); + else if (cnt == 7 || cnt == dist+7) + mach_heartbeat( 0 ); + + if (++cnt > period) { + cnt = 0; + /* The hyperbolic function below modifies the heartbeat period + * length in dependency of the current (5min) load. It goes + * through the points f(0)=126, f(1)=86, f(5)=51, + * f(inf)->30. */ + period = ((672<tv_sec = 0; + ts->tv_nsec = 0; + + if (mach_hwclk) { + mach_hwclk(0, &time); + + if ((time.tm_year += 1900) < 1970) + time.tm_year += 100; + ts->tv_sec = mktime(time.tm_year, time.tm_mon, time.tm_mday, + time.tm_hour, time.tm_min, time.tm_sec); + } +} + +void __init time_init(void) +{ + mach_sched_init(timer_interrupt); +} + +#ifdef CONFIG_M68KCLASSIC + +u32 arch_gettimeoffset(void) +{ + return mach_gettimeoffset() * 1000; +} + +static int __init rtc_init(void) +{ + struct platform_device *pdev; + + if (!mach_hwclk) + return -ENODEV; + + pdev = platform_device_register_simple("rtc-generic", -1, NULL, 0); + if (IS_ERR(pdev)) + return PTR_ERR(pdev); + + return 0; +} + +module_init(rtc_init); + +#endif /* CONFIG_M68KCLASSIC */ diff --git a/arch/m68k/kernel/time_mm.c b/arch/m68k/kernel/time_mm.c deleted file mode 100644 index 18b34ee5db3b..000000000000 --- a/arch/m68k/kernel/time_mm.c +++ /dev/null @@ -1,114 +0,0 @@ -/* - * linux/arch/m68k/kernel/time.c - * - * Copyright (C) 1991, 1992, 1995 Linus Torvalds - * - * This file contains the m68k-specific time handling details. - * Most of the stuff is located in the machine specific files. - * - * 1997-09-10 Updated NTP code according to technical memorandum Jan '96 - * "A Kernel Model for Precision Timekeeping" by Dave Mills - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include -#include - -static inline int set_rtc_mmss(unsigned long nowtime) -{ - if (mach_set_clock_mmss) - return mach_set_clock_mmss (nowtime); - return -1; -} - -/* - * timer_interrupt() needs to keep up the real-time clock, - * as well as call the "xtime_update()" routine every clocktick - */ -static irqreturn_t timer_interrupt(int irq, void *dummy) -{ - xtime_update(1); - update_process_times(user_mode(get_irq_regs())); - profile_tick(CPU_PROFILING); - -#ifdef CONFIG_HEARTBEAT - /* use power LED as a heartbeat instead -- much more useful - for debugging -- based on the version for PReP by Cort */ - /* acts like an actual heart beat -- ie thump-thump-pause... */ - if (mach_heartbeat) { - static unsigned cnt = 0, period = 0, dist = 0; - - if (cnt == 0 || cnt == dist) - mach_heartbeat( 1 ); - else if (cnt == 7 || cnt == dist+7) - mach_heartbeat( 0 ); - - if (++cnt > period) { - cnt = 0; - /* The hyperbolic function below modifies the heartbeat period - * length in dependency of the current (5min) load. It goes - * through the points f(0)=126, f(1)=86, f(5)=51, - * f(inf)->30. */ - period = ((672<tv_sec = 0; - ts->tv_nsec = 0; - - if (mach_hwclk) { - mach_hwclk(0, &time); - - if ((time.tm_year += 1900) < 1970) - time.tm_year += 100; - ts->tv_sec = mktime(time.tm_year, time.tm_mon, time.tm_mday, - time.tm_hour, time.tm_min, time.tm_sec); - } -} - -void __init time_init(void) -{ - mach_sched_init(timer_interrupt); -} - -u32 arch_gettimeoffset(void) -{ - return mach_gettimeoffset() * 1000; -} - -static int __init rtc_init(void) -{ - struct platform_device *pdev; - - if (!mach_hwclk) - return -ENODEV; - - pdev = platform_device_register_simple("rtc-generic", -1, NULL, 0); - if (IS_ERR(pdev)) - return PTR_ERR(pdev); - - return 0; -} - -module_init(rtc_init); diff --git a/arch/m68k/kernel/time_no.c b/arch/m68k/kernel/time_no.c deleted file mode 100644 index 87c7acd2706f..000000000000 --- a/arch/m68k/kernel/time_no.c +++ /dev/null @@ -1,71 +0,0 @@ -/* - * linux/arch/m68knommu/kernel/time.c - * - * Copyright (C) 1991, 1992, 1995 Linus Torvalds - * - * This file contains the m68k-specific time handling details. - * Most of the stuff is located in the machine specific files. - * - * 1997-09-10 Updated NTP code according to technical memorandum Jan '96 - * "A Kernel Model for Precision Timekeeping" by Dave Mills - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -static inline int set_rtc_mmss(unsigned long nowtime) -{ - if (mach_set_clock_mmss) - return mach_set_clock_mmss (nowtime); - return -1; -} - -/* - * timer_interrupt() needs to keep up the real-time clock, - * as well as call the "xtime_update()" routine every clocktick - */ -static irqreturn_t timer_interrupt(int irq, void *dummy) -{ - - if (current->pid) - profile_tick(CPU_PROFILING); - - xtime_update(1); - - update_process_times(user_mode(get_irq_regs())); - - return(IRQ_HANDLED); -} - -void read_persistent_clock(struct timespec *ts) -{ - struct rtc_time time; - ts->tv_sec = 0; - ts->tv_nsec = 0; - - if (mach_hwclk) { - mach_hwclk(0, &time); - - if ((time.tm_year += 1900) < 1970) - time.tm_year += 100; - ts->tv_sec = mktime(time.tm_year, time.tm_mon, time.tm_mday, - time.tm_hour, time.tm_min, time.tm_sec); - } -} - -void __init time_init(void) -{ - mach_sched_init(timer_interrupt); -} -- cgit v1.2.3-59-g8ed1b From 397ac99c6cef38cdf260440635c8873f51109c34 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Wed, 22 Feb 2012 13:51:22 +1000 Subject: m68k: remove dead timer code The set_rtc_mmss() function is defined "static inline" but is never used in this file. Remove it. Signed-off-by: Greg Ungerer Acked-by: Geert Uytterhoeven --- arch/m68k/kernel/time.c | 7 ------- 1 file changed, 7 deletions(-) (limited to 'arch') diff --git a/arch/m68k/kernel/time.c b/arch/m68k/kernel/time.c index adfcefbb34b0..d7deb7fc7eb5 100644 --- a/arch/m68k/kernel/time.c +++ b/arch/m68k/kernel/time.c @@ -28,13 +28,6 @@ #include #include -static inline int set_rtc_mmss(unsigned long nowtime) -{ - if (mach_set_clock_mmss) - return mach_set_clock_mmss (nowtime); - return -1; -} - /* * timer_interrupt() needs to keep up the real-time clock, * as well as call the "xtime_update()" routine every clocktick -- cgit v1.2.3-59-g8ed1b From 43dec91f4dbf4adbd2ffc9a86e34fa76ab1f5a05 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Tue, 24 Jan 2012 16:16:35 +1000 Subject: m68k: merge the mmu and non-mmu versions of ptrace.c Most of the code in the non-mmu ptrace_no.c file is the same as the mmu version ptrace_mm.c. So merge them back into a single file. Signed-off-by: Greg Ungerer Acked-by: Geert Uytterhoeven --- arch/m68k/kernel/ptrace.c | 306 ++++++++++++++++++++++++++++++++++++++++++- arch/m68k/kernel/ptrace_mm.c | 295 ----------------------------------------- arch/m68k/kernel/ptrace_no.c | 255 ------------------------------------ 3 files changed, 303 insertions(+), 553 deletions(-) delete mode 100644 arch/m68k/kernel/ptrace_mm.c delete mode 100644 arch/m68k/kernel/ptrace_no.c (limited to 'arch') diff --git a/arch/m68k/kernel/ptrace.c b/arch/m68k/kernel/ptrace.c index 07a417550e94..149a05f8b9ee 100644 --- a/arch/m68k/kernel/ptrace.c +++ b/arch/m68k/kernel/ptrace.c @@ -1,5 +1,305 @@ +/* + * linux/arch/m68k/kernel/ptrace.c + * + * Copyright (C) 1994 by Hamish Macdonald + * Taken from linux/kernel/ptrace.c and modified for M680x0. + * linux/kernel/ptrace.c is by Ross Biro 1/23/92, edited by Linus Torvalds + * + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file COPYING in the main directory of + * this archive for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +/* + * does not yet catch signals sent when the child dies. + * in exit.c or in signal.c. + */ + +/* determines which bits in the SR the user has access to. */ +/* 1 = access 0 = no access */ +#define SR_MASK 0x001f + +/* sets the trace bits. */ +#define TRACE_BITS 0xC000 +#define T1_BIT 0x8000 +#define T0_BIT 0x4000 + +/* Find the stack offset for a register, relative to thread.esp0. */ +#define PT_REG(reg) ((long)&((struct pt_regs *)0)->reg) +#define SW_REG(reg) ((long)&((struct switch_stack *)0)->reg \ + - sizeof(struct switch_stack)) +/* Mapping from PT_xxx to the stack offset at which the register is + saved. Notice that usp has no stack-slot and needs to be treated + specially (see get_reg/put_reg below). */ +static const int regoff[] = { + [0] = PT_REG(d1), + [1] = PT_REG(d2), + [2] = PT_REG(d3), + [3] = PT_REG(d4), + [4] = PT_REG(d5), + [5] = SW_REG(d6), + [6] = SW_REG(d7), + [7] = PT_REG(a0), + [8] = PT_REG(a1), + [9] = PT_REG(a2), + [10] = SW_REG(a3), + [11] = SW_REG(a4), + [12] = SW_REG(a5), + [13] = SW_REG(a6), + [14] = PT_REG(d0), + [15] = -1, + [16] = PT_REG(orig_d0), + [17] = PT_REG(sr), + [18] = PT_REG(pc), +}; + +/* + * Get contents of register REGNO in task TASK. + */ +static inline long get_reg(struct task_struct *task, int regno) +{ + unsigned long *addr; + + if (regno == PT_USP) + addr = &task->thread.usp; + else if (regno < ARRAY_SIZE(regoff)) + addr = (unsigned long *)(task->thread.esp0 + regoff[regno]); + else + return 0; + /* Need to take stkadj into account. */ + if (regno == PT_SR || regno == PT_PC) { + long stkadj = *(long *)(task->thread.esp0 + PT_REG(stkadj)); + addr = (unsigned long *) ((unsigned long)addr + stkadj); + /* The sr is actually a 16 bit register. */ + if (regno == PT_SR) + return *(unsigned short *)addr; + } + return *addr; +} + +/* + * Write contents of register REGNO in task TASK. + */ +static inline int put_reg(struct task_struct *task, int regno, + unsigned long data) +{ + unsigned long *addr; + + if (regno == PT_USP) + addr = &task->thread.usp; + else if (regno < ARRAY_SIZE(regoff)) + addr = (unsigned long *)(task->thread.esp0 + regoff[regno]); + else + return -1; + /* Need to take stkadj into account. */ + if (regno == PT_SR || regno == PT_PC) { + long stkadj = *(long *)(task->thread.esp0 + PT_REG(stkadj)); + addr = (unsigned long *) ((unsigned long)addr + stkadj); + /* The sr is actually a 16 bit register. */ + if (regno == PT_SR) { + *(unsigned short *)addr = data; + return 0; + } + } + *addr = data; + return 0; +} + +/* + * Make sure the single step bit is not set. + */ +static inline void singlestep_disable(struct task_struct *child) +{ + unsigned long tmp = get_reg(child, PT_SR) & ~TRACE_BITS; + put_reg(child, PT_SR, tmp); + clear_tsk_thread_flag(child, TIF_DELAYED_TRACE); +} + +/* + * Called by kernel/ptrace.c when detaching.. + */ +void ptrace_disable(struct task_struct *child) +{ + singlestep_disable(child); +} + +void user_enable_single_step(struct task_struct *child) +{ + unsigned long tmp = get_reg(child, PT_SR) & ~TRACE_BITS; + put_reg(child, PT_SR, tmp | T1_BIT); + set_tsk_thread_flag(child, TIF_DELAYED_TRACE); +} + #ifdef CONFIG_MMU -#include "ptrace_mm.c" -#else -#include "ptrace_no.c" +void user_enable_block_step(struct task_struct *child) +{ + unsigned long tmp = get_reg(child, PT_SR) & ~TRACE_BITS; + put_reg(child, PT_SR, tmp | T0_BIT); +} #endif + +void user_disable_single_step(struct task_struct *child) +{ + singlestep_disable(child); +} + +long arch_ptrace(struct task_struct *child, long request, + unsigned long addr, unsigned long data) +{ + unsigned long tmp; + int i, ret = 0; + int regno = addr >> 2; /* temporary hack. */ + unsigned long __user *datap = (unsigned long __user *) data; + + switch (request) { + /* read the word at location addr in the USER area. */ + case PTRACE_PEEKUSR: + if (addr & 3) + goto out_eio; + + if (regno >= 0 && regno < 19) { + tmp = get_reg(child, regno); + } else if (regno >= 21 && regno < 49) { + tmp = child->thread.fp[regno - 21]; + /* Convert internal fpu reg representation + * into long double format + */ + if (FPU_IS_EMU && (regno < 45) && !(regno % 3)) + tmp = ((tmp & 0xffff0000) << 15) | + ((tmp & 0x0000ffff) << 16); +#ifndef CONFIG_MMU + } else if (regno == 49) { + tmp = child->mm->start_code; + } else if (regno == 50) { + tmp = child->mm->start_data; + } else if (regno == 51) { + tmp = child->mm->end_code; +#endif + } else + goto out_eio; + ret = put_user(tmp, datap); + break; + + case PTRACE_POKEUSR: + /* write the word at location addr in the USER area */ + if (addr & 3) + goto out_eio; + + if (regno == PT_SR) { + data &= SR_MASK; + data |= get_reg(child, PT_SR) & ~SR_MASK; + } + if (regno >= 0 && regno < 19) { + if (put_reg(child, regno, data)) + goto out_eio; + } else if (regno >= 21 && regno < 48) { + /* Convert long double format + * into internal fpu reg representation + */ + if (FPU_IS_EMU && (regno < 45) && !(regno % 3)) { + data <<= 15; + data = (data & 0xffff0000) | + ((data & 0x0000ffff) >> 1); + } + child->thread.fp[regno - 21] = data; + } else + goto out_eio; + break; + + case PTRACE_GETREGS: /* Get all gp regs from the child. */ + for (i = 0; i < 19; i++) { + tmp = get_reg(child, i); + ret = put_user(tmp, datap); + if (ret) + break; + datap++; + } + break; + + case PTRACE_SETREGS: /* Set all gp regs in the child. */ + for (i = 0; i < 19; i++) { + ret = get_user(tmp, datap); + if (ret) + break; + if (i == PT_SR) { + tmp &= SR_MASK; + tmp |= get_reg(child, PT_SR) & ~SR_MASK; + } + put_reg(child, i, tmp); + datap++; + } + break; + + case PTRACE_GETFPREGS: /* Get the child FPU state. */ + if (copy_to_user(datap, &child->thread.fp, + sizeof(struct user_m68kfp_struct))) + ret = -EFAULT; + break; + + case PTRACE_SETFPREGS: /* Set the child FPU state. */ + if (copy_from_user(&child->thread.fp, datap, + sizeof(struct user_m68kfp_struct))) + ret = -EFAULT; + break; + + case PTRACE_GET_THREAD_AREA: + ret = put_user(task_thread_info(child)->tp_value, datap); + break; + + default: + ret = ptrace_request(child, request, addr, data); + break; + } + + return ret; +out_eio: + return -EIO; +} + +asmlinkage void syscall_trace(void) +{ + ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) + ? 0x80 : 0)); + /* + * this isn't the same as continuing with a signal, but it will do + * for normal use. strace only continues with a signal if the + * stopping signal is not SIGTRAP. -brl + */ + if (current->exit_code) { + send_sig(current->exit_code, current, 1); + current->exit_code = 0; + } +} + +#ifdef CONFIG_COLDFIRE +asmlinkage int syscall_trace_enter(void) +{ + int ret = 0; + + if (test_thread_flag(TIF_SYSCALL_TRACE)) + ret = tracehook_report_syscall_entry(task_pt_regs(current)); + return ret; +} + +asmlinkage void syscall_trace_leave(void) +{ + if (test_thread_flag(TIF_SYSCALL_TRACE)) + tracehook_report_syscall_exit(task_pt_regs(current), 0); +} +#endif /* CONFIG_COLDFIRE */ diff --git a/arch/m68k/kernel/ptrace_mm.c b/arch/m68k/kernel/ptrace_mm.c deleted file mode 100644 index 7bc999b73529..000000000000 --- a/arch/m68k/kernel/ptrace_mm.c +++ /dev/null @@ -1,295 +0,0 @@ -/* - * linux/arch/m68k/kernel/ptrace.c - * - * Copyright (C) 1994 by Hamish Macdonald - * Taken from linux/kernel/ptrace.c and modified for M680x0. - * linux/kernel/ptrace.c is by Ross Biro 1/23/92, edited by Linus Torvalds - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file COPYING in the main directory of - * this archive for more details. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -/* - * does not yet catch signals sent when the child dies. - * in exit.c or in signal.c. - */ - -/* determines which bits in the SR the user has access to. */ -/* 1 = access 0 = no access */ -#define SR_MASK 0x001f - -/* sets the trace bits. */ -#define TRACE_BITS 0xC000 -#define T1_BIT 0x8000 -#define T0_BIT 0x4000 - -/* Find the stack offset for a register, relative to thread.esp0. */ -#define PT_REG(reg) ((long)&((struct pt_regs *)0)->reg) -#define SW_REG(reg) ((long)&((struct switch_stack *)0)->reg \ - - sizeof(struct switch_stack)) -/* Mapping from PT_xxx to the stack offset at which the register is - saved. Notice that usp has no stack-slot and needs to be treated - specially (see get_reg/put_reg below). */ -static const int regoff[] = { - [0] = PT_REG(d1), - [1] = PT_REG(d2), - [2] = PT_REG(d3), - [3] = PT_REG(d4), - [4] = PT_REG(d5), - [5] = SW_REG(d6), - [6] = SW_REG(d7), - [7] = PT_REG(a0), - [8] = PT_REG(a1), - [9] = PT_REG(a2), - [10] = SW_REG(a3), - [11] = SW_REG(a4), - [12] = SW_REG(a5), - [13] = SW_REG(a6), - [14] = PT_REG(d0), - [15] = -1, - [16] = PT_REG(orig_d0), - [17] = PT_REG(sr), - [18] = PT_REG(pc), -}; - -/* - * Get contents of register REGNO in task TASK. - */ -static inline long get_reg(struct task_struct *task, int regno) -{ - unsigned long *addr; - - if (regno == PT_USP) - addr = &task->thread.usp; - else if (regno < ARRAY_SIZE(regoff)) - addr = (unsigned long *)(task->thread.esp0 + regoff[regno]); - else - return 0; - /* Need to take stkadj into account. */ - if (regno == PT_SR || regno == PT_PC) { - long stkadj = *(long *)(task->thread.esp0 + PT_REG(stkadj)); - addr = (unsigned long *) ((unsigned long)addr + stkadj); - /* The sr is actually a 16 bit register. */ - if (regno == PT_SR) - return *(unsigned short *)addr; - } - return *addr; -} - -/* - * Write contents of register REGNO in task TASK. - */ -static inline int put_reg(struct task_struct *task, int regno, - unsigned long data) -{ - unsigned long *addr; - - if (regno == PT_USP) - addr = &task->thread.usp; - else if (regno < ARRAY_SIZE(regoff)) - addr = (unsigned long *)(task->thread.esp0 + regoff[regno]); - else - return -1; - /* Need to take stkadj into account. */ - if (regno == PT_SR || regno == PT_PC) { - long stkadj = *(long *)(task->thread.esp0 + PT_REG(stkadj)); - addr = (unsigned long *) ((unsigned long)addr + stkadj); - /* The sr is actually a 16 bit register. */ - if (regno == PT_SR) { - *(unsigned short *)addr = data; - return 0; - } - } - *addr = data; - return 0; -} - -/* - * Make sure the single step bit is not set. - */ -static inline void singlestep_disable(struct task_struct *child) -{ - unsigned long tmp = get_reg(child, PT_SR) & ~TRACE_BITS; - put_reg(child, PT_SR, tmp); - clear_tsk_thread_flag(child, TIF_DELAYED_TRACE); -} - -/* - * Called by kernel/ptrace.c when detaching.. - */ -void ptrace_disable(struct task_struct *child) -{ - singlestep_disable(child); -} - -void user_enable_single_step(struct task_struct *child) -{ - unsigned long tmp = get_reg(child, PT_SR) & ~TRACE_BITS; - put_reg(child, PT_SR, tmp | T1_BIT); - set_tsk_thread_flag(child, TIF_DELAYED_TRACE); -} - -void user_enable_block_step(struct task_struct *child) -{ - unsigned long tmp = get_reg(child, PT_SR) & ~TRACE_BITS; - put_reg(child, PT_SR, tmp | T0_BIT); -} - -void user_disable_single_step(struct task_struct *child) -{ - singlestep_disable(child); -} - -long arch_ptrace(struct task_struct *child, long request, - unsigned long addr, unsigned long data) -{ - unsigned long tmp; - int i, ret = 0; - int regno = addr >> 2; /* temporary hack. */ - unsigned long __user *datap = (unsigned long __user *) data; - - switch (request) { - /* read the word at location addr in the USER area. */ - case PTRACE_PEEKUSR: - if (addr & 3) - goto out_eio; - - if (regno >= 0 && regno < 19) { - tmp = get_reg(child, regno); - } else if (regno >= 21 && regno < 49) { - tmp = child->thread.fp[regno - 21]; - /* Convert internal fpu reg representation - * into long double format - */ - if (FPU_IS_EMU && (regno < 45) && !(regno % 3)) - tmp = ((tmp & 0xffff0000) << 15) | - ((tmp & 0x0000ffff) << 16); - } else - goto out_eio; - ret = put_user(tmp, datap); - break; - - case PTRACE_POKEUSR: - /* write the word at location addr in the USER area */ - if (addr & 3) - goto out_eio; - - if (regno == PT_SR) { - data &= SR_MASK; - data |= get_reg(child, PT_SR) & ~SR_MASK; - } - if (regno >= 0 && regno < 19) { - if (put_reg(child, regno, data)) - goto out_eio; - } else if (regno >= 21 && regno < 48) { - /* Convert long double format - * into internal fpu reg representation - */ - if (FPU_IS_EMU && (regno < 45) && !(regno % 3)) { - data <<= 15; - data = (data & 0xffff0000) | - ((data & 0x0000ffff) >> 1); - } - child->thread.fp[regno - 21] = data; - } else - goto out_eio; - break; - - case PTRACE_GETREGS: /* Get all gp regs from the child. */ - for (i = 0; i < 19; i++) { - tmp = get_reg(child, i); - ret = put_user(tmp, datap); - if (ret) - break; - datap++; - } - break; - - case PTRACE_SETREGS: /* Set all gp regs in the child. */ - for (i = 0; i < 19; i++) { - ret = get_user(tmp, datap); - if (ret) - break; - if (i == PT_SR) { - tmp &= SR_MASK; - tmp |= get_reg(child, PT_SR) & ~SR_MASK; - } - put_reg(child, i, tmp); - datap++; - } - break; - - case PTRACE_GETFPREGS: /* Get the child FPU state. */ - if (copy_to_user(datap, &child->thread.fp, - sizeof(struct user_m68kfp_struct))) - ret = -EFAULT; - break; - - case PTRACE_SETFPREGS: /* Set the child FPU state. */ - if (copy_from_user(&child->thread.fp, datap, - sizeof(struct user_m68kfp_struct))) - ret = -EFAULT; - break; - - case PTRACE_GET_THREAD_AREA: - ret = put_user(task_thread_info(child)->tp_value, datap); - break; - - default: - ret = ptrace_request(child, request, addr, data); - break; - } - - return ret; -out_eio: - return -EIO; -} - -asmlinkage void syscall_trace(void) -{ - ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) - ? 0x80 : 0)); - /* - * this isn't the same as continuing with a signal, but it will do - * for normal use. strace only continues with a signal if the - * stopping signal is not SIGTRAP. -brl - */ - if (current->exit_code) { - send_sig(current->exit_code, current, 1); - current->exit_code = 0; - } -} - -#ifdef CONFIG_COLDFIRE -asmlinkage int syscall_trace_enter(void) -{ - int ret = 0; - - if (test_thread_flag(TIF_SYSCALL_TRACE)) - ret = tracehook_report_syscall_entry(task_pt_regs(current)); - return ret; -} - -asmlinkage void syscall_trace_leave(void) -{ - if (test_thread_flag(TIF_SYSCALL_TRACE)) - tracehook_report_syscall_exit(task_pt_regs(current), 0); -} -#endif /* CONFIG_COLDFIRE */ diff --git a/arch/m68k/kernel/ptrace_no.c b/arch/m68k/kernel/ptrace_no.c deleted file mode 100644 index 6709fb707335..000000000000 --- a/arch/m68k/kernel/ptrace_no.c +++ /dev/null @@ -1,255 +0,0 @@ -/* - * linux/arch/m68knommu/kernel/ptrace.c - * - * Copyright (C) 1994 by Hamish Macdonald - * Taken from linux/kernel/ptrace.c and modified for M680x0. - * linux/kernel/ptrace.c is by Ross Biro 1/23/92, edited by Linus Torvalds - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file COPYING in the main directory of - * this archive for more details. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -/* - * does not yet catch signals sent when the child dies. - * in exit.c or in signal.c. - */ - -/* determines which bits in the SR the user has access to. */ -/* 1 = access 0 = no access */ -#define SR_MASK 0x001f - -/* sets the trace bits. */ -#define TRACE_BITS 0x8000 - -/* Find the stack offset for a register, relative to thread.esp0. */ -#define PT_REG(reg) ((long)&((struct pt_regs *)0)->reg) -#define SW_REG(reg) ((long)&((struct switch_stack *)0)->reg \ - - sizeof(struct switch_stack)) -/* Mapping from PT_xxx to the stack offset at which the register is - saved. Notice that usp has no stack-slot and needs to be treated - specially (see get_reg/put_reg below). */ -static int regoff[] = { - PT_REG(d1), PT_REG(d2), PT_REG(d3), PT_REG(d4), - PT_REG(d5), SW_REG(d6), SW_REG(d7), PT_REG(a0), - PT_REG(a1), PT_REG(a2), SW_REG(a3), SW_REG(a4), - SW_REG(a5), SW_REG(a6), PT_REG(d0), -1, - PT_REG(orig_d0), PT_REG(sr), PT_REG(pc), -}; - -/* - * Get contents of register REGNO in task TASK. - */ -static inline long get_reg(struct task_struct *task, int regno) -{ - unsigned long *addr; - - if (regno == PT_USP) - addr = &task->thread.usp; - else if (regno < ARRAY_SIZE(regoff)) - addr = (unsigned long *)(task->thread.esp0 + regoff[regno]); - else - return 0; - return *addr; -} - -/* - * Write contents of register REGNO in task TASK. - */ -static inline int put_reg(struct task_struct *task, int regno, - unsigned long data) -{ - unsigned long *addr; - - if (regno == PT_USP) - addr = &task->thread.usp; - else if (regno < ARRAY_SIZE(regoff)) - addr = (unsigned long *) (task->thread.esp0 + regoff[regno]); - else - return -1; - *addr = data; - return 0; -} - -void user_enable_single_step(struct task_struct *task) -{ - unsigned long srflags; - srflags = get_reg(task, PT_SR) | (TRACE_BITS << 16); - put_reg(task, PT_SR, srflags); -} - -void user_disable_single_step(struct task_struct *task) -{ - unsigned long srflags; - srflags = get_reg(task, PT_SR) & ~(TRACE_BITS << 16); - put_reg(task, PT_SR, srflags); -} - -/* - * Called by kernel/ptrace.c when detaching.. - * - * Make sure the single step bit is not set. - */ -void ptrace_disable(struct task_struct *child) -{ - /* make sure the single step bit is not set. */ - user_disable_single_step(child); -} - -long arch_ptrace(struct task_struct *child, long request, - unsigned long addr, unsigned long data) -{ - int ret; - int regno = addr >> 2; - unsigned long __user *datap = (unsigned long __user *) data; - - switch (request) { - /* read the word at location addr in the USER area. */ - case PTRACE_PEEKUSR: { - unsigned long tmp; - - ret = -EIO; - if ((addr & 3) || addr > sizeof(struct user) - 3) - break; - - tmp = 0; /* Default return condition */ - ret = -EIO; - if (regno < 19) { - tmp = get_reg(child, regno); - if (regno == PT_SR) - tmp >>= 16; - } else if (regno >= 21 && regno < 49) { - tmp = child->thread.fp[regno - 21]; - } else if (regno == 49) { - tmp = child->mm->start_code; - } else if (regno == 50) { - tmp = child->mm->start_data; - } else if (regno == 51) { - tmp = child->mm->end_code; - } else - break; - ret = put_user(tmp, datap); - break; - } - - case PTRACE_POKEUSR: /* write the word at location addr in the USER area */ - ret = -EIO; - if ((addr & 3) || addr > sizeof(struct user) - 3) - break; - - if (regno == PT_SR) { - data &= SR_MASK; - data <<= 16; - data |= get_reg(child, PT_SR) & ~(SR_MASK << 16); - } - if (regno < 19) { - if (put_reg(child, regno, data)) - break; - ret = 0; - break; - } - if (regno >= 21 && regno < 48) - { - child->thread.fp[regno - 21] = data; - ret = 0; - } - break; - - case PTRACE_GETREGS: { /* Get all gp regs from the child. */ - int i; - unsigned long tmp; - for (i = 0; i < 19; i++) { - tmp = get_reg(child, i); - if (i == PT_SR) - tmp >>= 16; - if (put_user(tmp, datap)) { - ret = -EFAULT; - break; - } - datap++; - } - ret = 0; - break; - } - - case PTRACE_SETREGS: { /* Set all gp regs in the child. */ - int i; - unsigned long tmp; - for (i = 0; i < 19; i++) { - if (get_user(tmp, datap)) { - ret = -EFAULT; - break; - } - if (i == PT_SR) { - tmp &= SR_MASK; - tmp <<= 16; - tmp |= get_reg(child, PT_SR) & ~(SR_MASK << 16); - } - put_reg(child, i, tmp); - datap++; - } - ret = 0; - break; - } - -#ifdef PTRACE_GETFPREGS - case PTRACE_GETFPREGS: { /* Get the child FPU state. */ - ret = 0; - if (copy_to_user(datap, &child->thread.fp, - sizeof(struct user_m68kfp_struct))) - ret = -EFAULT; - break; - } -#endif - -#ifdef PTRACE_SETFPREGS - case PTRACE_SETFPREGS: { /* Set the child FPU state. */ - ret = 0; - if (copy_from_user(&child->thread.fp, datap, - sizeof(struct user_m68kfp_struct))) - ret = -EFAULT; - break; - } -#endif - - case PTRACE_GET_THREAD_AREA: - ret = put_user(task_thread_info(child)->tp_value, datap); - break; - - default: - ret = ptrace_request(child, request, addr, data); - break; - } - return ret; -} - -asmlinkage int syscall_trace_enter(void) -{ - int ret = 0; - - if (test_thread_flag(TIF_SYSCALL_TRACE)) - ret = tracehook_report_syscall_entry(task_pt_regs(current)); - return ret; -} - -asmlinkage void syscall_trace_leave(void) -{ - if (test_thread_flag(TIF_SYSCALL_TRACE)) - tracehook_report_syscall_exit(task_pt_regs(current), 0); -} -- cgit v1.2.3-59-g8ed1b From 9657a87205a367bddd802cbf439531697597fd8b Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Mon, 30 Jan 2012 11:58:21 +1000 Subject: m68k: make support for FPU hardware configurable The classic m68k code has always supported an FPU (although it may have been a software emulated one). The non-MMU m68k code has never supported FPU hardware. To help in merging common code create a configation setting that signifies if we are builing in FPU support or not. This switch, CONFIG_FPU, is set as per the current use cases. So it is always enabled if CONFIG_MMU is set, and disabled otherwise. With a little extra code it will be possible to disable it on the classic m68k platforms as well, and to enable it on non-MMU platforms that do have hardware FPU. Signed-off-by: Greg Ungerer Acked-by: Geert Uytterhoeven --- arch/m68k/Kconfig | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch') diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig index 6f823dcc0d70..d318c606c888 100644 --- a/arch/m68k/Kconfig +++ b/arch/m68k/Kconfig @@ -7,6 +7,7 @@ config M68K select GENERIC_IRQ_SHOW select ARCH_HAVE_NMI_SAFE_CMPXCHG if RMW_INSNS select GENERIC_CPU_DEVICES + select FPU if MMU config RWSEM_GENERIC_SPINLOCK bool @@ -64,6 +65,9 @@ config CPU_HAS_NO_MULDIV64 config CPU_HAS_ADDRESS_SPACES bool +config FPU + bool + config HZ int default 1000 if CLEOPATRA -- cgit v1.2.3-59-g8ed1b From fde3944141c70b264aace92334b297a05233e179 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Thu, 9 Feb 2012 14:18:46 +1000 Subject: m68k: merge the MMU and non-MMU versions of process.c The MMU and non-MMU varients of the m68k arch process.c code are pretty much the same. Only a few minor details differ between the two. The majority of the difference is to deal with having or wanting hardware FPU support. So merge them back into a single process.c file. Signed-off-by: Greg Ungerer Acked-by: Geert Uytterhoeven --- arch/m68k/kernel/process.c | 379 ++++++++++++++++++++++++++++++++++++++- arch/m68k/kernel/process_mm.c | 369 -------------------------------------- arch/m68k/kernel/process_no.c | 406 ------------------------------------------ 3 files changed, 377 insertions(+), 777 deletions(-) delete mode 100644 arch/m68k/kernel/process_mm.c delete mode 100644 arch/m68k/kernel/process_no.c (limited to 'arch') diff --git a/arch/m68k/kernel/process.c b/arch/m68k/kernel/process.c index 6cf4bd6e34f8..f053e245bd40 100644 --- a/arch/m68k/kernel/process.c +++ b/arch/m68k/kernel/process.c @@ -1,5 +1,380 @@ +/* + * linux/arch/m68k/kernel/process.c + * + * Copyright (C) 1995 Hamish Macdonald + * + * 68060 fixes by Jesper Skov + */ + +/* + * This file handles the architecture-dependent parts of process handling.. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + + +asmlinkage void ret_from_fork(void); + + +/* + * Return saved PC from a blocked thread + */ +unsigned long thread_saved_pc(struct task_struct *tsk) +{ + struct switch_stack *sw = (struct switch_stack *)tsk->thread.ksp; + /* Check whether the thread is blocked in resume() */ + if (in_sched_functions(sw->retpc)) + return ((unsigned long *)sw->a6)[1]; + else + return sw->retpc; +} + +/* + * The idle loop on an m68k.. + */ +static void default_idle(void) +{ + if (!need_resched()) +#if defined(MACH_ATARI_ONLY) + /* block out HSYNC on the atari (falcon) */ + __asm__("stop #0x2200" : : : "cc"); +#else + __asm__("stop #0x2000" : : : "cc"); +#endif +} + +void (*idle)(void) = default_idle; + +/* + * The idle thread. There's no useful work to be + * done, so just try to conserve power and have a + * low exit latency (ie sit in a loop waiting for + * somebody to say that they'd like to reschedule) + */ +void cpu_idle(void) +{ + /* endless idle loop with no priority at all */ + while (1) { + while (!need_resched()) + idle(); + preempt_enable_no_resched(); + schedule(); + preempt_disable(); + } +} + +void machine_restart(char * __unused) +{ + if (mach_reset) + mach_reset(); + for (;;); +} + +void machine_halt(void) +{ + if (mach_halt) + mach_halt(); + for (;;); +} + +void machine_power_off(void) +{ + if (mach_power_off) + mach_power_off(); + for (;;); +} + +void (*pm_power_off)(void) = machine_power_off; +EXPORT_SYMBOL(pm_power_off); + +void show_regs(struct pt_regs * regs) +{ + printk("\n"); + printk("Format %02x Vector: %04x PC: %08lx Status: %04x %s\n", + regs->format, regs->vector, regs->pc, regs->sr, print_tainted()); + printk("ORIG_D0: %08lx D0: %08lx A2: %08lx A1: %08lx\n", + regs->orig_d0, regs->d0, regs->a2, regs->a1); + printk("A0: %08lx D5: %08lx D4: %08lx\n", + regs->a0, regs->d5, regs->d4); + printk("D3: %08lx D2: %08lx D1: %08lx\n", + regs->d3, regs->d2, regs->d1); + if (!(regs->sr & PS_S)) + printk("USP: %08lx\n", rdusp()); +} + +/* + * Create a kernel thread + */ +int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags) +{ + int pid; + mm_segment_t fs; + + fs = get_fs(); + set_fs (KERNEL_DS); + + { + register long retval __asm__ ("d0"); + register long clone_arg __asm__ ("d1") = flags | CLONE_VM | CLONE_UNTRACED; + + retval = __NR_clone; + __asm__ __volatile__ + ("clrl %%d2\n\t" + "trap #0\n\t" /* Linux/m68k system call */ + "tstl %0\n\t" /* child or parent */ + "jne 1f\n\t" /* parent - jump */ +#ifdef CONFIG_MMU + "lea %%sp@(%c7),%6\n\t" /* reload current */ + "movel %6@,%6\n\t" +#endif + "movel %3,%%sp@-\n\t" /* push argument */ + "jsr %4@\n\t" /* call fn */ + "movel %0,%%d1\n\t" /* pass exit value */ + "movel %2,%%d0\n\t" /* exit */ + "trap #0\n" + "1:" + : "+d" (retval) + : "i" (__NR_clone), "i" (__NR_exit), + "r" (arg), "a" (fn), "d" (clone_arg), "r" (current), + "i" (-THREAD_SIZE) + : "d2"); + + pid = retval; + } + + set_fs (fs); + return pid; +} +EXPORT_SYMBOL(kernel_thread); + +void flush_thread(void) +{ + current->thread.fs = __USER_DS; +#ifdef CONFIG_FPU + if (!FPU_IS_EMU) { + unsigned long zero = 0; + asm volatile("frestore %0": :"m" (zero)); + } +#endif +} + +/* + * "m68k_fork()".. By the time we get here, the + * non-volatile registers have also been saved on the + * stack. We do some ugly pointer stuff here.. (see + * also copy_thread) + */ + +asmlinkage int m68k_fork(struct pt_regs *regs) +{ #ifdef CONFIG_MMU -#include "process_mm.c" + return do_fork(SIGCHLD, rdusp(), regs, 0, NULL, NULL); #else -#include "process_no.c" + return -EINVAL; #endif +} + +asmlinkage int m68k_vfork(struct pt_regs *regs) +{ + return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, rdusp(), regs, 0, + NULL, NULL); +} + +asmlinkage int m68k_clone(struct pt_regs *regs) +{ + unsigned long clone_flags; + unsigned long newsp; + int __user *parent_tidptr, *child_tidptr; + + /* syscall2 puts clone_flags in d1 and usp in d2 */ + clone_flags = regs->d1; + newsp = regs->d2; + parent_tidptr = (int __user *)regs->d3; + child_tidptr = (int __user *)regs->d4; + if (!newsp) + newsp = rdusp(); + return do_fork(clone_flags, newsp, regs, 0, + parent_tidptr, child_tidptr); +} + +int copy_thread(unsigned long clone_flags, unsigned long usp, + unsigned long unused, + struct task_struct * p, struct pt_regs * regs) +{ + struct pt_regs * childregs; + struct switch_stack * childstack, *stack; + unsigned long *retp; + + childregs = (struct pt_regs *) (task_stack_page(p) + THREAD_SIZE) - 1; + + *childregs = *regs; + childregs->d0 = 0; + + retp = ((unsigned long *) regs); + stack = ((struct switch_stack *) retp) - 1; + + childstack = ((struct switch_stack *) childregs) - 1; + *childstack = *stack; + childstack->retpc = (unsigned long)ret_from_fork; + + p->thread.usp = usp; + p->thread.ksp = (unsigned long)childstack; + + if (clone_flags & CLONE_SETTLS) + task_thread_info(p)->tp_value = regs->d5; + + /* + * Must save the current SFC/DFC value, NOT the value when + * the parent was last descheduled - RGH 10-08-96 + */ + p->thread.fs = get_fs().seg; + +#ifdef CONFIG_FPU + if (!FPU_IS_EMU) { + /* Copy the current fpu state */ + asm volatile ("fsave %0" : : "m" (p->thread.fpstate[0]) : "memory"); + + if (!CPU_IS_060 ? p->thread.fpstate[0] : p->thread.fpstate[2]) { + if (CPU_IS_COLDFIRE) { + asm volatile ("fmovemd %/fp0-%/fp7,%0\n\t" + "fmovel %/fpiar,%1\n\t" + "fmovel %/fpcr,%2\n\t" + "fmovel %/fpsr,%3" + : + : "m" (p->thread.fp[0]), + "m" (p->thread.fpcntl[0]), + "m" (p->thread.fpcntl[1]), + "m" (p->thread.fpcntl[2]) + : "memory"); + } else { + asm volatile ("fmovemx %/fp0-%/fp7,%0\n\t" + "fmoveml %/fpiar/%/fpcr/%/fpsr,%1" + : + : "m" (p->thread.fp[0]), + "m" (p->thread.fpcntl[0]) + : "memory"); + } + } + + /* Restore the state in case the fpu was busy */ + asm volatile ("frestore %0" : : "m" (p->thread.fpstate[0])); + } +#endif /* CONFIG_FPU */ + + return 0; +} + +/* Fill in the fpu structure for a core dump. */ +#ifdef CONFIG_FPU +int dump_fpu (struct pt_regs *regs, struct user_m68kfp_struct *fpu) +{ + char fpustate[216]; + + if (FPU_IS_EMU) { + int i; + + memcpy(fpu->fpcntl, current->thread.fpcntl, 12); + memcpy(fpu->fpregs, current->thread.fp, 96); + /* Convert internal fpu reg representation + * into long double format + */ + for (i = 0; i < 24; i += 3) + fpu->fpregs[i] = ((fpu->fpregs[i] & 0xffff0000) << 15) | + ((fpu->fpregs[i] & 0x0000ffff) << 16); + return 1; + } + + /* First dump the fpu context to avoid protocol violation. */ + asm volatile ("fsave %0" :: "m" (fpustate[0]) : "memory"); + if (!CPU_IS_060 ? !fpustate[0] : !fpustate[2]) + return 0; + + if (CPU_IS_COLDFIRE) { + asm volatile ("fmovel %/fpiar,%0\n\t" + "fmovel %/fpcr,%1\n\t" + "fmovel %/fpsr,%2\n\t" + "fmovemd %/fp0-%/fp7,%3" + : + : "m" (fpu->fpcntl[0]), + "m" (fpu->fpcntl[1]), + "m" (fpu->fpcntl[2]), + "m" (fpu->fpregs[0]) + : "memory"); + } else { + asm volatile ("fmovem %/fpiar/%/fpcr/%/fpsr,%0" + : + : "m" (fpu->fpcntl[0]) + : "memory"); + asm volatile ("fmovemx %/fp0-%/fp7,%0" + : + : "m" (fpu->fpregs[0]) + : "memory"); + } + + return 1; +} +EXPORT_SYMBOL(dump_fpu); +#endif /* CONFIG_FPU */ + +/* + * sys_execve() executes a new program. + */ +asmlinkage int sys_execve(const char __user *name, + const char __user *const __user *argv, + const char __user *const __user *envp) +{ + int error; + char * filename; + struct pt_regs *regs = (struct pt_regs *) &name; + + filename = getname(name); + error = PTR_ERR(filename); + if (IS_ERR(filename)) + return error; + error = do_execve(filename, argv, envp, regs); + putname(filename); + return error; +} + +unsigned long get_wchan(struct task_struct *p) +{ + unsigned long fp, pc; + unsigned long stack_page; + int count = 0; + if (!p || p == current || p->state == TASK_RUNNING) + return 0; + + stack_page = (unsigned long)task_stack_page(p); + fp = ((struct switch_stack *)p->thread.ksp)->a6; + do { + if (fp < stack_page+sizeof(struct thread_info) || + fp >= 8184+stack_page) + return 0; + pc = ((unsigned long *)fp)[1]; + if (!in_sched_functions(pc)) + return pc; + fp = *(unsigned long *) fp; + } while (count++ < 16); + return 0; +} diff --git a/arch/m68k/kernel/process_mm.c b/arch/m68k/kernel/process_mm.c deleted file mode 100644 index 099283ee1a8f..000000000000 --- a/arch/m68k/kernel/process_mm.c +++ /dev/null @@ -1,369 +0,0 @@ -/* - * linux/arch/m68k/kernel/process.c - * - * Copyright (C) 1995 Hamish Macdonald - * - * 68060 fixes by Jesper Skov - */ - -/* - * This file handles the architecture-dependent parts of process handling.. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - - -asmlinkage void ret_from_fork(void); - - -/* - * Return saved PC from a blocked thread - */ -unsigned long thread_saved_pc(struct task_struct *tsk) -{ - struct switch_stack *sw = (struct switch_stack *)tsk->thread.ksp; - /* Check whether the thread is blocked in resume() */ - if (in_sched_functions(sw->retpc)) - return ((unsigned long *)sw->a6)[1]; - else - return sw->retpc; -} - -/* - * The idle loop on an m68k.. - */ -static void default_idle(void) -{ - if (!need_resched()) -#if defined(MACH_ATARI_ONLY) - /* block out HSYNC on the atari (falcon) */ - __asm__("stop #0x2200" : : : "cc"); -#else - __asm__("stop #0x2000" : : : "cc"); -#endif -} - -void (*idle)(void) = default_idle; - -/* - * The idle thread. There's no useful work to be - * done, so just try to conserve power and have a - * low exit latency (ie sit in a loop waiting for - * somebody to say that they'd like to reschedule) - */ -void cpu_idle(void) -{ - /* endless idle loop with no priority at all */ - while (1) { - while (!need_resched()) - idle(); - preempt_enable_no_resched(); - schedule(); - preempt_disable(); - } -} - -void machine_restart(char * __unused) -{ - if (mach_reset) - mach_reset(); - for (;;); -} - -void machine_halt(void) -{ - if (mach_halt) - mach_halt(); - for (;;); -} - -void machine_power_off(void) -{ - if (mach_power_off) - mach_power_off(); - for (;;); -} - -void (*pm_power_off)(void) = machine_power_off; -EXPORT_SYMBOL(pm_power_off); - -void show_regs(struct pt_regs * regs) -{ - printk("\n"); - printk("Format %02x Vector: %04x PC: %08lx Status: %04x %s\n", - regs->format, regs->vector, regs->pc, regs->sr, print_tainted()); - printk("ORIG_D0: %08lx D0: %08lx A2: %08lx A1: %08lx\n", - regs->orig_d0, regs->d0, regs->a2, regs->a1); - printk("A0: %08lx D5: %08lx D4: %08lx\n", - regs->a0, regs->d5, regs->d4); - printk("D3: %08lx D2: %08lx D1: %08lx\n", - regs->d3, regs->d2, regs->d1); - if (!(regs->sr & PS_S)) - printk("USP: %08lx\n", rdusp()); -} - -/* - * Create a kernel thread - */ -int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags) -{ - int pid; - mm_segment_t fs; - - fs = get_fs(); - set_fs (KERNEL_DS); - - { - register long retval __asm__ ("d0"); - register long clone_arg __asm__ ("d1") = flags | CLONE_VM | CLONE_UNTRACED; - - retval = __NR_clone; - __asm__ __volatile__ - ("clrl %%d2\n\t" - "trap #0\n\t" /* Linux/m68k system call */ - "tstl %0\n\t" /* child or parent */ - "jne 1f\n\t" /* parent - jump */ - "lea %%sp@(%c7),%6\n\t" /* reload current */ - "movel %6@,%6\n\t" - "movel %3,%%sp@-\n\t" /* push argument */ - "jsr %4@\n\t" /* call fn */ - "movel %0,%%d1\n\t" /* pass exit value */ - "movel %2,%%d0\n\t" /* exit */ - "trap #0\n" - "1:" - : "+d" (retval) - : "i" (__NR_clone), "i" (__NR_exit), - "r" (arg), "a" (fn), "d" (clone_arg), "r" (current), - "i" (-THREAD_SIZE) - : "d2"); - - pid = retval; - } - - set_fs (fs); - return pid; -} -EXPORT_SYMBOL(kernel_thread); - -void flush_thread(void) -{ - unsigned long zero = 0; - - current->thread.fs = __USER_DS; - if (!FPU_IS_EMU) - asm volatile("frestore %0": :"m" (zero)); -} - -/* - * "m68k_fork()".. By the time we get here, the - * non-volatile registers have also been saved on the - * stack. We do some ugly pointer stuff here.. (see - * also copy_thread) - */ - -asmlinkage int m68k_fork(struct pt_regs *regs) -{ - return do_fork(SIGCHLD, rdusp(), regs, 0, NULL, NULL); -} - -asmlinkage int m68k_vfork(struct pt_regs *regs) -{ - return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, rdusp(), regs, 0, - NULL, NULL); -} - -asmlinkage int m68k_clone(struct pt_regs *regs) -{ - unsigned long clone_flags; - unsigned long newsp; - int __user *parent_tidptr, *child_tidptr; - - /* syscall2 puts clone_flags in d1 and usp in d2 */ - clone_flags = regs->d1; - newsp = regs->d2; - parent_tidptr = (int __user *)regs->d3; - child_tidptr = (int __user *)regs->d4; - if (!newsp) - newsp = rdusp(); - return do_fork(clone_flags, newsp, regs, 0, - parent_tidptr, child_tidptr); -} - -int copy_thread(unsigned long clone_flags, unsigned long usp, - unsigned long unused, - struct task_struct * p, struct pt_regs * regs) -{ - struct pt_regs * childregs; - struct switch_stack * childstack, *stack; - unsigned long *retp; - - childregs = (struct pt_regs *) (task_stack_page(p) + THREAD_SIZE) - 1; - - *childregs = *regs; - childregs->d0 = 0; - - retp = ((unsigned long *) regs); - stack = ((struct switch_stack *) retp) - 1; - - childstack = ((struct switch_stack *) childregs) - 1; - *childstack = *stack; - childstack->retpc = (unsigned long)ret_from_fork; - - p->thread.usp = usp; - p->thread.ksp = (unsigned long)childstack; - - if (clone_flags & CLONE_SETTLS) - task_thread_info(p)->tp_value = regs->d5; - - /* - * Must save the current SFC/DFC value, NOT the value when - * the parent was last descheduled - RGH 10-08-96 - */ - p->thread.fs = get_fs().seg; - - if (!FPU_IS_EMU) { - /* Copy the current fpu state */ - asm volatile ("fsave %0" : : "m" (p->thread.fpstate[0]) : "memory"); - - if (!CPU_IS_060 ? p->thread.fpstate[0] : p->thread.fpstate[2]) { - if (CPU_IS_COLDFIRE) { - asm volatile ("fmovemd %/fp0-%/fp7,%0\n\t" - "fmovel %/fpiar,%1\n\t" - "fmovel %/fpcr,%2\n\t" - "fmovel %/fpsr,%3" - : - : "m" (p->thread.fp[0]), - "m" (p->thread.fpcntl[0]), - "m" (p->thread.fpcntl[1]), - "m" (p->thread.fpcntl[2]) - : "memory"); - } else { - asm volatile ("fmovemx %/fp0-%/fp7,%0\n\t" - "fmoveml %/fpiar/%/fpcr/%/fpsr,%1" - : - : "m" (p->thread.fp[0]), - "m" (p->thread.fpcntl[0]) - : "memory"); - } - } - - /* Restore the state in case the fpu was busy */ - asm volatile ("frestore %0" : : "m" (p->thread.fpstate[0])); - } - - return 0; -} - -/* Fill in the fpu structure for a core dump. */ - -int dump_fpu (struct pt_regs *regs, struct user_m68kfp_struct *fpu) -{ - char fpustate[216]; - - if (FPU_IS_EMU) { - int i; - - memcpy(fpu->fpcntl, current->thread.fpcntl, 12); - memcpy(fpu->fpregs, current->thread.fp, 96); - /* Convert internal fpu reg representation - * into long double format - */ - for (i = 0; i < 24; i += 3) - fpu->fpregs[i] = ((fpu->fpregs[i] & 0xffff0000) << 15) | - ((fpu->fpregs[i] & 0x0000ffff) << 16); - return 1; - } - - /* First dump the fpu context to avoid protocol violation. */ - asm volatile ("fsave %0" :: "m" (fpustate[0]) : "memory"); - if (!CPU_IS_060 ? !fpustate[0] : !fpustate[2]) - return 0; - - if (CPU_IS_COLDFIRE) { - asm volatile ("fmovel %/fpiar,%0\n\t" - "fmovel %/fpcr,%1\n\t" - "fmovel %/fpsr,%2\n\t" - "fmovemd %/fp0-%/fp7,%3" - : - : "m" (fpu->fpcntl[0]), - "m" (fpu->fpcntl[1]), - "m" (fpu->fpcntl[2]), - "m" (fpu->fpregs[0]) - : "memory"); - } else { - asm volatile ("fmovem %/fpiar/%/fpcr/%/fpsr,%0" - : - : "m" (fpu->fpcntl[0]) - : "memory"); - asm volatile ("fmovemx %/fp0-%/fp7,%0" - : - : "m" (fpu->fpregs[0]) - : "memory"); - } - - return 1; -} -EXPORT_SYMBOL(dump_fpu); - -/* - * sys_execve() executes a new program. - */ -asmlinkage int sys_execve(const char __user *name, - const char __user *const __user *argv, - const char __user *const __user *envp) -{ - int error; - char * filename; - struct pt_regs *regs = (struct pt_regs *) &name; - - filename = getname(name); - error = PTR_ERR(filename); - if (IS_ERR(filename)) - return error; - error = do_execve(filename, argv, envp, regs); - putname(filename); - return error; -} - -unsigned long get_wchan(struct task_struct *p) -{ - unsigned long fp, pc; - unsigned long stack_page; - int count = 0; - if (!p || p == current || p->state == TASK_RUNNING) - return 0; - - stack_page = (unsigned long)task_stack_page(p); - fp = ((struct switch_stack *)p->thread.ksp)->a6; - do { - if (fp < stack_page+sizeof(struct thread_info) || - fp >= 8184+stack_page) - return 0; - pc = ((unsigned long *)fp)[1]; - if (!in_sched_functions(pc)) - return pc; - fp = *(unsigned long *) fp; - } while (count++ < 16); - return 0; -} diff --git a/arch/m68k/kernel/process_no.c b/arch/m68k/kernel/process_no.c deleted file mode 100644 index 5e1078cabe0e..000000000000 --- a/arch/m68k/kernel/process_no.c +++ /dev/null @@ -1,406 +0,0 @@ -/* - * linux/arch/m68knommu/kernel/process.c - * - * Copyright (C) 1995 Hamish Macdonald - * - * 68060 fixes by Jesper Skov - * - * uClinux changes - * Copyright (C) 2000-2002, David McCullough - */ - -/* - * This file handles the architecture-dependent parts of process handling.. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -asmlinkage void ret_from_fork(void); - -/* - * The following aren't currently used. - */ -void (*pm_idle)(void); -EXPORT_SYMBOL(pm_idle); - -void (*pm_power_off)(void); -EXPORT_SYMBOL(pm_power_off); - -/* - * The idle loop on an m68knommu.. - */ -static void default_idle(void) -{ - local_irq_disable(); - while (!need_resched()) { - /* This stop will re-enable interrupts */ - __asm__("stop #0x2000" : : : "cc"); - local_irq_disable(); - } - local_irq_enable(); -} - -void (*idle)(void) = default_idle; - -/* - * The idle thread. There's no useful work to be - * done, so just try to conserve power and have a - * low exit latency (ie sit in a loop waiting for - * somebody to say that they'd like to reschedule) - */ -void cpu_idle(void) -{ - /* endless idle loop with no priority at all */ - while (1) { - idle(); - preempt_enable_no_resched(); - schedule(); - preempt_disable(); - } -} - -void machine_restart(char * __unused) -{ - if (mach_reset) - mach_reset(); - for (;;); -} - -void machine_halt(void) -{ - if (mach_halt) - mach_halt(); - for (;;); -} - -void machine_power_off(void) -{ - if (mach_power_off) - mach_power_off(); - for (;;); -} - -void show_regs(struct pt_regs * regs) -{ - printk(KERN_NOTICE "\n"); - printk(KERN_NOTICE "Format %02x Vector: %04x PC: %08lx Status: %04x %s\n", - regs->format, regs->vector, regs->pc, regs->sr, print_tainted()); - printk(KERN_NOTICE "ORIG_D0: %08lx D0: %08lx A2: %08lx A1: %08lx\n", - regs->orig_d0, regs->d0, regs->a2, regs->a1); - printk(KERN_NOTICE "A0: %08lx D5: %08lx D4: %08lx\n", - regs->a0, regs->d5, regs->d4); - printk(KERN_NOTICE "D3: %08lx D2: %08lx D1: %08lx\n", - regs->d3, regs->d2, regs->d1); - if (!(regs->sr & PS_S)) - printk(KERN_NOTICE "USP: %08lx\n", rdusp()); -} - -/* - * Create a kernel thread - */ -int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags) -{ - int retval; - long clone_arg = flags | CLONE_VM; - mm_segment_t fs; - - fs = get_fs(); - set_fs(KERNEL_DS); - - __asm__ __volatile__ ( - "movel %%sp, %%d2\n\t" - "movel %5, %%d1\n\t" - "movel %1, %%d0\n\t" - "trap #0\n\t" - "cmpl %%sp, %%d2\n\t" - "jeq 1f\n\t" - "movel %3, %%sp@-\n\t" - "jsr %4@\n\t" - "movel %2, %%d0\n\t" - "trap #0\n" - "1:\n\t" - "movel %%d0, %0\n" - : "=d" (retval) - : "i" (__NR_clone), - "i" (__NR_exit), - "a" (arg), - "a" (fn), - "a" (clone_arg) - : "cc", "%d0", "%d1", "%d2"); - - set_fs(fs); - return retval; -} -EXPORT_SYMBOL(kernel_thread); - -void flush_thread(void) -{ -#ifdef CONFIG_FPU - unsigned long zero = 0; -#endif - - current->thread.fs = __USER_DS; -#ifdef CONFIG_FPU - if (!FPU_IS_EMU) - asm volatile (".chip 68k/68881\n\t" - "frestore %0\n\t" - ".chip 68k" : : "m" (zero)); -#endif -} - -/* - * "m68k_fork()".. By the time we get here, the - * non-volatile registers have also been saved on the - * stack. We do some ugly pointer stuff here.. (see - * also copy_thread) - */ - -asmlinkage int m68k_fork(struct pt_regs *regs) -{ - /* fork almost works, enough to trick you into looking elsewhere :-( */ - return(-EINVAL); -} - -asmlinkage int m68k_vfork(struct pt_regs *regs) -{ - return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, rdusp(), regs, 0, NULL, NULL); -} - -asmlinkage int m68k_clone(struct pt_regs *regs) -{ - unsigned long clone_flags; - unsigned long newsp; - - /* syscall2 puts clone_flags in d1 and usp in d2 */ - clone_flags = regs->d1; - newsp = regs->d2; - if (!newsp) - newsp = rdusp(); - return do_fork(clone_flags, newsp, regs, 0, NULL, NULL); -} - -int copy_thread(unsigned long clone_flags, - unsigned long usp, unsigned long topstk, - struct task_struct * p, struct pt_regs * regs) -{ - struct pt_regs * childregs; - struct switch_stack * childstack, *stack; - unsigned long *retp; - - childregs = (struct pt_regs *) (task_stack_page(p) + THREAD_SIZE) - 1; - - *childregs = *regs; - childregs->d0 = 0; - - retp = ((unsigned long *) regs); - stack = ((struct switch_stack *) retp) - 1; - - childstack = ((struct switch_stack *) childregs) - 1; - *childstack = *stack; - childstack->retpc = (unsigned long)ret_from_fork; - - p->thread.usp = usp; - p->thread.ksp = (unsigned long)childstack; - - if (clone_flags & CLONE_SETTLS) - task_thread_info(p)->tp_value = regs->d5; - - /* - * Must save the current SFC/DFC value, NOT the value when - * the parent was last descheduled - RGH 10-08-96 - */ - p->thread.fs = get_fs().seg; - -#ifdef CONFIG_FPU - if (!FPU_IS_EMU) { - /* Copy the current fpu state */ - asm volatile ("fsave %0" : : "m" (p->thread.fpstate[0]) : "memory"); - - if (p->thread.fpstate[0]) - asm volatile ("fmovemx %/fp0-%/fp7,%0\n\t" - "fmoveml %/fpiar/%/fpcr/%/fpsr,%1" - : : "m" (p->thread.fp[0]), "m" (p->thread.fpcntl[0]) - : "memory"); - /* Restore the state in case the fpu was busy */ - asm volatile ("frestore %0" : : "m" (p->thread.fpstate[0])); - } -#endif - - return 0; -} - -/* Fill in the fpu structure for a core dump. */ - -int dump_fpu(struct pt_regs *regs, struct user_m68kfp_struct *fpu) -{ -#ifdef CONFIG_FPU - char fpustate[216]; - - if (FPU_IS_EMU) { - int i; - - memcpy(fpu->fpcntl, current->thread.fpcntl, 12); - memcpy(fpu->fpregs, current->thread.fp, 96); - /* Convert internal fpu reg representation - * into long double format - */ - for (i = 0; i < 24; i += 3) - fpu->fpregs[i] = ((fpu->fpregs[i] & 0xffff0000) << 15) | - ((fpu->fpregs[i] & 0x0000ffff) << 16); - return 1; - } - - /* First dump the fpu context to avoid protocol violation. */ - asm volatile ("fsave %0" :: "m" (fpustate[0]) : "memory"); - if (!fpustate[0]) - return 0; - - asm volatile ("fmovem %/fpiar/%/fpcr/%/fpsr,%0" - :: "m" (fpu->fpcntl[0]) - : "memory"); - asm volatile ("fmovemx %/fp0-%/fp7,%0" - :: "m" (fpu->fpregs[0]) - : "memory"); -#endif - return 1; -} -EXPORT_SYMBOL(dump_fpu); - -/* - * Generic dumping code. Used for panic and debug. - */ -void dump(struct pt_regs *fp) -{ - unsigned long *sp; - unsigned char *tp; - int i; - - printk(KERN_EMERG "\nCURRENT PROCESS:\n\n"); - printk(KERN_EMERG "COMM=%s PID=%d\n", current->comm, current->pid); - - if (current->mm) { - printk(KERN_EMERG "TEXT=%08x-%08x DATA=%08x-%08x BSS=%08x-%08x\n", - (int) current->mm->start_code, - (int) current->mm->end_code, - (int) current->mm->start_data, - (int) current->mm->end_data, - (int) current->mm->end_data, - (int) current->mm->brk); - printk(KERN_EMERG "USER-STACK=%08x KERNEL-STACK=%08x\n\n", - (int) current->mm->start_stack, - (int)(((unsigned long) current) + THREAD_SIZE)); - } - - printk(KERN_EMERG "PC: %08lx\n", fp->pc); - printk(KERN_EMERG "SR: %08lx SP: %08lx\n", (long) fp->sr, (long) fp); - printk(KERN_EMERG "d0: %08lx d1: %08lx d2: %08lx d3: %08lx\n", - fp->d0, fp->d1, fp->d2, fp->d3); - printk(KERN_EMERG "d4: %08lx d5: %08lx a0: %08lx a1: %08lx\n", - fp->d4, fp->d5, fp->a0, fp->a1); - printk(KERN_EMERG "\nUSP: %08x TRAPFRAME: %p\n", - (unsigned int) rdusp(), fp); - - printk(KERN_EMERG "\nCODE:"); - tp = ((unsigned char *) fp->pc) - 0x20; - for (sp = (unsigned long *) tp, i = 0; (i < 0x40); i += 4) { - if ((i % 0x10) == 0) - printk(KERN_EMERG "%p: ", tp + i); - printk("%08x ", (int) *sp++); - } - printk(KERN_EMERG "\n"); - - printk(KERN_EMERG "KERNEL STACK:"); - tp = ((unsigned char *) fp) - 0x40; - for (sp = (unsigned long *) tp, i = 0; (i < 0xc0); i += 4) { - if ((i % 0x10) == 0) - printk(KERN_EMERG "%p: ", tp + i); - printk("%08x ", (int) *sp++); - } - printk(KERN_EMERG "\n"); - - printk(KERN_EMERG "USER STACK:"); - tp = (unsigned char *) (rdusp() - 0x10); - for (sp = (unsigned long *) tp, i = 0; (i < 0x80); i += 4) { - if ((i % 0x10) == 0) - printk(KERN_EMERG "%p: ", tp + i); - printk("%08x ", (int) *sp++); - } - printk(KERN_EMERG "\n"); -} - -/* - * sys_execve() executes a new program. - */ -asmlinkage int sys_execve(const char *name, - const char *const *argv, - const char *const *envp) -{ - int error; - char * filename; - struct pt_regs *regs = (struct pt_regs *) &name; - - filename = getname(name); - error = PTR_ERR(filename); - if (IS_ERR(filename)) - return error; - error = do_execve(filename, argv, envp, regs); - putname(filename); - return error; -} - -unsigned long get_wchan(struct task_struct *p) -{ - unsigned long fp, pc; - unsigned long stack_page; - int count = 0; - if (!p || p == current || p->state == TASK_RUNNING) - return 0; - - stack_page = (unsigned long)p; - fp = ((struct switch_stack *)p->thread.ksp)->a6; - do { - if (fp < stack_page+sizeof(struct thread_info) || - fp >= THREAD_SIZE-8+stack_page) - return 0; - pc = ((unsigned long *)fp)[1]; - if (!in_sched_functions(pc)) - return pc; - fp = *(unsigned long *) fp; - } while (count++ < 16); - return 0; -} - -/* - * Return saved PC of a blocked thread. - */ -unsigned long thread_saved_pc(struct task_struct *tsk) -{ - struct switch_stack *sw = (struct switch_stack *)tsk->thread.ksp; - - /* Check whether the thread is blocked in resume() */ - if (in_sched_functions(sw->retpc)) - return ((unsigned long *)sw->a6)[1]; - else - return sw->retpc; -} - -- cgit v1.2.3-59-g8ed1b From 8400ca322e2fb6771d2adfc05a745b8872af038d Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Sat, 24 Dec 2011 00:10:48 +1000 Subject: m68knommu: make 5206 UART platform addressing consistent If we make all UART addressing consistent across all ColdFire family members then we will be able to remove the duplicated plaform data and use a single setup for all. So modify the ColdFire 5206 UART addressing so that: . UARTs are numbered from 0 up . base addresses are absolute (not relative to MBAR peripheral register) . use a common name for IRQs used Signed-off-by: Greg Ungerer --- arch/m68k/include/asm/m5206sim.h | 10 ++++++---- arch/m68k/platform/5206/config.c | 12 ++++++------ 2 files changed, 12 insertions(+), 10 deletions(-) (limited to 'arch') diff --git a/arch/m68k/include/asm/m5206sim.h b/arch/m68k/include/asm/m5206sim.h index 9015eadd5c00..69722366b084 100644 --- a/arch/m68k/include/asm/m5206sim.h +++ b/arch/m68k/include/asm/m5206sim.h @@ -100,11 +100,11 @@ #define MCFDMA_BASE1 (MCF_MBAR + 0x240) /* Base address DMA 1 */ #if defined(CONFIG_NETtel) -#define MCFUART_BASE1 0x180 /* Base address of UART1 */ -#define MCFUART_BASE2 0x140 /* Base address of UART2 */ +#define MCFUART_BASE0 (MCF_MBAR + 0x180) /* Base address UART0 */ +#define MCFUART_BASE1 (MCF_MBAR + 0x140) /* Base address UART1 */ #else -#define MCFUART_BASE1 0x140 /* Base address of UART1 */ -#define MCFUART_BASE2 0x180 /* Base address of UART2 */ +#define MCFUART_BASE0 (MCF_MBAR + 0x140) /* Base address UART0 */ +#define MCFUART_BASE1 (MCF_MBAR + 0x180) /* Base address UART1 */ #endif /* @@ -112,6 +112,8 @@ */ #define MCF_IRQ_TIMER 30 /* Timer0, Level 6 */ #define MCF_IRQ_PROFILER 31 /* Timer1, Level 7 */ +#define MCF_IRQ_UART0 73 /* UART0 */ +#define MCF_IRQ_UART1 74 /* UART1 */ /* * Generic GPIO diff --git a/arch/m68k/platform/5206/config.c b/arch/m68k/platform/5206/config.c index 7826b70b1741..4eec699b3bc9 100644 --- a/arch/m68k/platform/5206/config.c +++ b/arch/m68k/platform/5206/config.c @@ -22,12 +22,12 @@ static struct mcf_platform_uart m5206_uart_platform[] = { { - .mapbase = MCF_MBAR + MCFUART_BASE1, - .irq = 73, + .mapbase = MCFUART_BASE0, + .irq = MCF_IRQ_UART0, }, { - .mapbase = MCF_MBAR + MCFUART_BASE2, - .irq = 74, + .mapbase = MCFUART_BASE1, + .irq = MCF_IRQ_UART1, }, { }, }; @@ -48,11 +48,11 @@ static void __init m5206_uart_init_line(int line, int irq) { if (line == 0) { writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR); - writeb(irq, MCFUART_BASE1 + MCFUART_UIVR); + writeb(irq, MCFUART_BASE0 + MCFUART_UIVR); mcf_mapirq2imr(irq, MCFINTC_UART0); } else if (line == 1) { writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR); - writeb(irq, MCFUART_BASE2 + MCFUART_UIVR); + writeb(irq, MCFUART_BASE1 + MCFUART_UIVR); mcf_mapirq2imr(irq, MCFINTC_UART1); } } -- cgit v1.2.3-59-g8ed1b From ffc203bc19eda0e58fea1bdf8172f313f26f8722 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Sat, 24 Dec 2011 00:21:18 +1000 Subject: m68knommu: make 520x UART platform addressing consistent If we make all UART addressing consistent across all ColdFire family members then we will be able to remove the duplicated plaform data and use a single setup for all. So modify the ColdFire 520x UART addressing so that: . UARTs are numbered from 0 up . use a common name for IRQs used Signed-off-by: Greg Ungerer --- arch/m68k/include/asm/m520xsim.h | 10 +++++++--- arch/m68k/platform/520x/config.c | 12 ++++++------ 2 files changed, 13 insertions(+), 9 deletions(-) (limited to 'arch') diff --git a/arch/m68k/include/asm/m520xsim.h b/arch/m68k/include/asm/m520xsim.h index eda62de7e607..41ed4dc8d736 100644 --- a/arch/m68k/include/asm/m520xsim.h +++ b/arch/m68k/include/asm/m520xsim.h @@ -50,6 +50,10 @@ #define MCFINT_QSPI 31 /* Interrupt number for QSPI */ #define MCFINT_PIT1 4 /* Interrupt number for PIT1 (PIT0 in processor) */ +#define MCF_IRQ_UART0 (MCFINT_VECBASE + MCFINT_UART0) +#define MCF_IRQ_UART1 (MCFINT_VECBASE + MCFINT_UART1) +#define MCF_IRQ_UART2 (MCFINT_VECBASE + MCFINT_UART2) + /* * SDRAM configuration registers. */ @@ -144,9 +148,9 @@ /* * UART module. */ -#define MCFUART_BASE1 0xFC060000 /* Base address of UART1 */ -#define MCFUART_BASE2 0xFC064000 /* Base address of UART2 */ -#define MCFUART_BASE3 0xFC068000 /* Base address of UART2 */ +#define MCFUART_BASE0 0xFC060000 /* Base address of UART0 */ +#define MCFUART_BASE1 0xFC064000 /* Base address of UART1 */ +#define MCFUART_BASE2 0xFC068000 /* Base address of UART2 */ /* * FEC module. diff --git a/arch/m68k/platform/520x/config.c b/arch/m68k/platform/520x/config.c index 61c25151d221..27c7d056dc1f 100644 --- a/arch/m68k/platform/520x/config.c +++ b/arch/m68k/platform/520x/config.c @@ -27,16 +27,16 @@ static struct mcf_platform_uart m520x_uart_platform[] = { { - .mapbase = MCFUART_BASE1, - .irq = MCFINT_VECBASE + MCFINT_UART0, + .mapbase = MCFUART_BASE0, + .irq = MCF_IRQ_UART0, }, { - .mapbase = MCFUART_BASE2, - .irq = MCFINT_VECBASE + MCFINT_UART1, + .mapbase = MCFUART_BASE1, + .irq = MCF_IRQ_UART1, }, { - .mapbase = MCFUART_BASE3, - .irq = MCFINT_VECBASE + MCFINT_UART2, + .mapbase = MCFUART_BASE2, + .irq = MCF_IRQ_UART2, }, { }, }; -- cgit v1.2.3-59-g8ed1b From 13682af34914b553505cce3e417f76b35a0f8d01 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Sat, 24 Dec 2011 00:25:28 +1000 Subject: m68knommu: make 523x UART platform addressing consistent If we make all UART addressing consistent across all ColdFire family members then we will be able to remove the duplicated plaform data and use a single setup for all. So modify the ColdFire 523x UART addressing so that: . UARTs are numbered from 0 up . use a common name for IRQs used Signed-off-by: Greg Ungerer --- arch/m68k/include/asm/m523xsim.h | 12 +++++++++--- arch/m68k/platform/523x/config.c | 12 ++++++------ 2 files changed, 15 insertions(+), 9 deletions(-) (limited to 'arch') diff --git a/arch/m68k/include/asm/m523xsim.h b/arch/m68k/include/asm/m523xsim.h index 6235921eca4e..919d115bd167 100644 --- a/arch/m68k/include/asm/m523xsim.h +++ b/arch/m68k/include/asm/m523xsim.h @@ -35,9 +35,15 @@ #define MCFINT_VECBASE 64 /* Vector base number */ #define MCFINT_UART0 13 /* Interrupt number for UART0 */ +#define MCFINT_UART1 14 /* Interrupt number for UART1 */ +#define MCFINT_UART2 15 /* Interrupt number for UART2 */ #define MCFINT_PIT1 36 /* Interrupt number for PIT1 */ #define MCFINT_QSPI 18 /* Interrupt number for QSPI */ +#define MCF_IRQ_UART0 (MCFINT_VECBASE + MCFINT_UART0) +#define MCF_IRQ_UART1 (MCFINT_VECBASE + MCFINT_UART1) +#define MCF_IRQ_UART2 (MCFINT_VECBASE + MCFINT_UART2) + /* * SDRAM configuration registers. */ @@ -59,9 +65,9 @@ /* * UART module. */ -#define MCFUART_BASE1 (MCF_IPSBAR + 0x200) -#define MCFUART_BASE2 (MCF_IPSBAR + 0x240) -#define MCFUART_BASE3 (MCF_IPSBAR + 0x280) +#define MCFUART_BASE0 (MCF_IPSBAR + 0x200) +#define MCFUART_BASE1 (MCF_IPSBAR + 0x240) +#define MCFUART_BASE2 (MCF_IPSBAR + 0x280) /* * FEC ethernet module. diff --git a/arch/m68k/platform/523x/config.c b/arch/m68k/platform/523x/config.c index aa28392ca4ce..49502a32efb1 100644 --- a/arch/m68k/platform/523x/config.c +++ b/arch/m68k/platform/523x/config.c @@ -28,16 +28,16 @@ static struct mcf_platform_uart m523x_uart_platform[] = { { - .mapbase = MCFUART_BASE1, - .irq = MCFINT_VECBASE + MCFINT_UART0, + .mapbase = MCFUART_BASE0, + .irq = MCF_IRQ_UART0, }, { - .mapbase = MCFUART_BASE2, - .irq = MCFINT_VECBASE + MCFINT_UART0 + 1, + .mapbase = MCFUART_BASE1, + .irq = MCF_IRQ_UART1, }, { - .mapbase = MCFUART_BASE3, - .irq = MCFINT_VECBASE + MCFINT_UART0 + 2, + .mapbase = MCFUART_BASE2, + .irq = MCF_IRQ_UART2, }, { }, }; -- cgit v1.2.3-59-g8ed1b From e8f69e545e51b9f2870d64082db533557b8d0d09 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Sat, 24 Dec 2011 00:28:18 +1000 Subject: m68knommu: make 5249 UART platform addressing consistent If we make all UART addressing consistent across all ColdFire family members then we will be able to remove the duplicated plaform data and use a single setup for all. So modify the ColdFire 5249 UART addressing so that: . UARTs are numbered from 0 up . base addresses are absolute (not relative to MBAR peripheral register) . use a common name for IRQs used Signed-off-by: Greg Ungerer --- arch/m68k/include/asm/m5249sim.h | 7 +++++-- arch/m68k/platform/5249/config.c | 12 ++++++------ 2 files changed, 11 insertions(+), 8 deletions(-) (limited to 'arch') diff --git a/arch/m68k/include/asm/m5249sim.h b/arch/m68k/include/asm/m5249sim.h index 805714ca8d7d..3e31508619c1 100644 --- a/arch/m68k/include/asm/m5249sim.h +++ b/arch/m68k/include/asm/m5249sim.h @@ -76,8 +76,8 @@ /* * UART module. */ -#define MCFUART_BASE1 0x1c0 /* Base address of UART1 */ -#define MCFUART_BASE2 0x200 /* Base address of UART2 */ +#define MCFUART_BASE0 (MCF_MBAR + 0x1c0) /* Base address UART0 */ +#define MCFUART_BASE1 (MCF_MBAR + 0x200) /* Base address UART1 */ /* * DMA unit base addresses. @@ -108,6 +108,9 @@ #define MCF_IRQ_TIMER 30 /* Timer0, Level 6 */ #define MCF_IRQ_PROFILER 31 /* Timer1, Level 7 */ +#define MCF_IRQ_UART0 73 /* UART0 */ +#define MCF_IRQ_UART1 74 /* UART1 */ + /* * General purpose IO registers (in MBAR2). */ diff --git a/arch/m68k/platform/5249/config.c b/arch/m68k/platform/5249/config.c index 50e2d8f23251..b74092a20d2d 100644 --- a/arch/m68k/platform/5249/config.c +++ b/arch/m68k/platform/5249/config.c @@ -24,12 +24,12 @@ static struct mcf_platform_uart m5249_uart_platform[] = { { - .mapbase = MCF_MBAR + MCFUART_BASE1, - .irq = 73, + .mapbase = MCFUART_BASE0, + .irq = MCF_IRQ_UART0, }, { - .mapbase = MCF_MBAR + MCFUART_BASE2, - .irq = 74, + .mapbase = MCFUART_BASE1, + .irq = MCF_IRQ_UART1, }, { }, }; @@ -238,11 +238,11 @@ static void __init m5249_uart_init_line(int line, int irq) { if (line == 0) { writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR); - writeb(irq, MCF_MBAR + MCFUART_BASE1 + MCFUART_UIVR); + writeb(irq, MCFUART_BASE0 + MCFUART_UIVR); mcf_mapirq2imr(irq, MCFINTC_UART0); } else if (line == 1) { writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR); - writeb(irq, MCF_MBAR + MCFUART_BASE2 + MCFUART_UIVR); + writeb(irq, MCFUART_BASE1 + MCFUART_UIVR); mcf_mapirq2imr(irq, MCFINTC_UART1); } } -- cgit v1.2.3-59-g8ed1b From 023e0555a91988a67868077bf0fb1084d3745293 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Sat, 24 Dec 2011 00:30:37 +1000 Subject: m68knommu: make 5272 UART platform addressing consistent If we make all UART addressing consistent across all ColdFire family members then we will be able to remove the duplicated plaform data and use a single setup for all. So modify the ColdFire 5272 UART addressing so that: . UARTs are numbered from 0 up . base addresses are absolute (not relative to MBAR peripheral register) Signed-off-by: Greg Ungerer --- arch/m68k/include/asm/m5272sim.h | 8 ++++---- arch/m68k/platform/5272/config.c | 8 ++++---- 2 files changed, 8 insertions(+), 8 deletions(-) (limited to 'arch') diff --git a/arch/m68k/include/asm/m5272sim.h b/arch/m68k/include/asm/m5272sim.h index 759c2b07a994..5c71bd4c746d 100644 --- a/arch/m68k/include/asm/m5272sim.h +++ b/arch/m68k/include/asm/m5272sim.h @@ -68,8 +68,8 @@ #define MCFSIM_DCMR1 0x5c /* DRAM 1 Mask reg (r/w) */ #define MCFSIM_DCCR1 0x63 /* DRAM 1 Control reg (r/w) */ -#define MCFUART_BASE1 0x100 /* Base address of UART1 */ -#define MCFUART_BASE2 0x140 /* Base address of UART2 */ +#define MCFUART_BASE0 (MCF_MBAR + 0x100) /* Base address UART0 */ +#define MCFUART_BASE1 (MCF_MBAR + 0x140) /* Base address UART1 */ #define MCFSIM_PACNT (MCF_MBAR + 0x80) /* Port A Control (r/w) */ #define MCFSIM_PADDR (MCF_MBAR + 0x84) /* Port A Direction (r/w) */ @@ -101,8 +101,8 @@ #define MCF_IRQ_TIMER2 70 /* Timer 2 */ #define MCF_IRQ_TIMER3 71 /* Timer 3 */ #define MCF_IRQ_TIMER4 72 /* Timer 4 */ -#define MCF_IRQ_UART1 73 /* UART 1 */ -#define MCF_IRQ_UART2 74 /* UART 2 */ +#define MCF_IRQ_UART0 73 /* UART 0 */ +#define MCF_IRQ_UART1 74 /* UART 1 */ #define MCF_IRQ_PLIP 75 /* PLIC 2Khz Periodic */ #define MCF_IRQ_PLIA 76 /* PLIC Asynchronous */ #define MCF_IRQ_USB0 77 /* USB Endpoint 0 */ diff --git a/arch/m68k/platform/5272/config.c b/arch/m68k/platform/5272/config.c index 426e66c44736..1c99cbae1f97 100644 --- a/arch/m68k/platform/5272/config.c +++ b/arch/m68k/platform/5272/config.c @@ -32,12 +32,12 @@ unsigned char ledbank = 0xff; static struct mcf_platform_uart m5272_uart_platform[] = { { - .mapbase = MCF_MBAR + MCFUART_BASE1, - .irq = MCF_IRQ_UART1, + .mapbase = MCFUART_BASE0, + .irq = MCF_IRQ_UART0, }, { - .mapbase = MCF_MBAR + MCFUART_BASE2, - .irq = MCF_IRQ_UART2, + .mapbase = MCFUART_BASE1, + .irq = MCF_IRQ_UART1, }, { }, }; -- cgit v1.2.3-59-g8ed1b From 20e681fdfa077b6a4e0fb777f10aa3c4bf34ece8 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Sat, 24 Dec 2011 00:33:31 +1000 Subject: m68knommu: make 527x UART platform addressing consistent If we make all UART addressing consistent across all ColdFire family members then we will be able to remove the duplicated plaform data and use a single setup for all. So modify the ColdFire 527x UART addressing so that: . UARTs are numbered from 0 up . use a common name for IRQs used Signed-off-by: Greg Ungerer --- arch/m68k/include/asm/m527xsim.h | 10 +++++++--- arch/m68k/platform/527x/config.c | 12 ++++++------ 2 files changed, 13 insertions(+), 9 deletions(-) (limited to 'arch') diff --git a/arch/m68k/include/asm/m527xsim.h b/arch/m68k/include/asm/m527xsim.h index 758810ef91ec..7399968b2efe 100644 --- a/arch/m68k/include/asm/m527xsim.h +++ b/arch/m68k/include/asm/m527xsim.h @@ -40,6 +40,10 @@ #define MCFINT_QSPI 18 /* Interrupt number for QSPI */ #define MCFINT_PIT1 36 /* Interrupt number for PIT1 */ +#define MCF_IRQ_UART0 (MCFINT_VECBASE + MCFINT_UART0) +#define MCF_IRQ_UART1 (MCFINT_VECBASE + MCFINT_UART1) +#define MCF_IRQ_UART2 (MCFINT_VECBASE + MCFINT_UART2) + /* * SDRAM configuration registers. */ @@ -72,9 +76,9 @@ /* * UART module. */ -#define MCFUART_BASE1 (MCF_IPSBAR + 0x200) -#define MCFUART_BASE2 (MCF_IPSBAR + 0x240) -#define MCFUART_BASE3 (MCF_IPSBAR + 0x280) +#define MCFUART_BASE0 (MCF_IPSBAR + 0x200) +#define MCFUART_BASE1 (MCF_IPSBAR + 0x240) +#define MCFUART_BASE2 (MCF_IPSBAR + 0x280) /* * FEC ethernet module. diff --git a/arch/m68k/platform/527x/config.c b/arch/m68k/platform/527x/config.c index c948a16beea8..56f1ddd3cfdc 100644 --- a/arch/m68k/platform/527x/config.c +++ b/arch/m68k/platform/527x/config.c @@ -28,16 +28,16 @@ static struct mcf_platform_uart m527x_uart_platform[] = { { - .mapbase = MCFUART_BASE1, - .irq = MCFINT_VECBASE + MCFINT_UART0, + .mapbase = MCFUART_BASE0, + .irq = MCF_IRQ_UART0, }, { - .mapbase = MCFUART_BASE2, - .irq = MCFINT_VECBASE + MCFINT_UART1, + .mapbase = MCFUART_BASE1, + .irq = MCF_IRQ_UART1, }, { - .mapbase = MCFUART_BASE3, - .irq = MCFINT_VECBASE + MCFINT_UART2, + .mapbase = MCFUART_BASE2, + .irq = MCF_IRQ_UART2, }, { }, }; -- cgit v1.2.3-59-g8ed1b From 909159feb3415afc6300281c9dfa856aa3875c32 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Sat, 24 Dec 2011 00:36:03 +1000 Subject: m68knommu: make 5307 UART platform addressing consistent If we make all UART addressing consistent across all ColdFire family members then we will be able to remove the duplicated plaform data and use a single setup for all. So modify the ColdFire 5307 UART addressing so that: . UARTs are numbered from 0 up . base addresses are absolute (not relative to MBAR peripheral register) . use a common name for IRQs used Signed-off-by: Greg Ungerer --- arch/m68k/include/asm/m5307sim.h | 10 ++++++---- arch/m68k/platform/5307/config.c | 12 ++++++------ 2 files changed, 12 insertions(+), 10 deletions(-) (limited to 'arch') diff --git a/arch/m68k/include/asm/m5307sim.h b/arch/m68k/include/asm/m5307sim.h index 8f8609fcc9b8..3bc3adaa7ee0 100644 --- a/arch/m68k/include/asm/m5307sim.h +++ b/arch/m68k/include/asm/m5307sim.h @@ -117,11 +117,11 @@ * UART module. */ #if defined(CONFIG_NETtel) || defined(CONFIG_SECUREEDGEMP3) -#define MCFUART_BASE1 0x200 /* Base address of UART1 */ -#define MCFUART_BASE2 0x1c0 /* Base address of UART2 */ +#define MCFUART_BASE0 (MCF_MBAR + 0x200) /* Base address UART0 */ +#define MCFUART_BASE1 (MCF_MBAR + 0x1c0) /* Base address UART1 */ #else -#define MCFUART_BASE1 0x1c0 /* Base address of UART1 */ -#define MCFUART_BASE2 0x200 /* Base address of UART2 */ +#define MCFUART_BASE0 (MCF_MBAR + 0x1c0) /* Base address UART0 */ +#define MCFUART_BASE1 (MCF_MBAR + 0x200) /* Base address UART1 */ #endif /* @@ -176,6 +176,8 @@ */ #define MCF_IRQ_TIMER 30 /* Timer0, Level 6 */ #define MCF_IRQ_PROFILER 31 /* Timer1, Level 7 */ +#define MCF_IRQ_UART0 73 /* UART0 */ +#define MCF_IRQ_UART1 74 /* UART1 */ /****************************************************************************/ #endif /* m5307sim_h */ diff --git a/arch/m68k/platform/5307/config.c b/arch/m68k/platform/5307/config.c index 6bf7c1cca627..dc9ecf07dd07 100644 --- a/arch/m68k/platform/5307/config.c +++ b/arch/m68k/platform/5307/config.c @@ -31,12 +31,12 @@ unsigned char ledbank = 0xff; static struct mcf_platform_uart m5307_uart_platform[] = { { - .mapbase = MCF_MBAR + MCFUART_BASE1, - .irq = 73, + .mapbase = MCFUART_BASE0, + .irq = MCF_IRQ_UART0, }, { - .mapbase = MCF_MBAR + MCFUART_BASE2, - .irq = 74, + .mapbase = MCFUART_BASE1, + .irq = MCF_IRQ_UART1, }, { }, }; @@ -57,11 +57,11 @@ static void __init m5307_uart_init_line(int line, int irq) { if (line == 0) { writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR); - writeb(irq, MCF_MBAR + MCFUART_BASE1 + MCFUART_UIVR); + writeb(irq, MCFUART_BASE0 + MCFUART_UIVR); mcf_mapirq2imr(irq, MCFINTC_UART0); } else if (line == 1) { writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR); - writeb(irq, MCF_MBAR + MCFUART_BASE2 + MCFUART_UIVR); + writeb(irq, MCFUART_BASE1 + MCFUART_UIVR); mcf_mapirq2imr(irq, MCFINTC_UART1); } } -- cgit v1.2.3-59-g8ed1b From f8bb5327a8aae4469563b2e47b6cef1bd2eb3555 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Sat, 24 Dec 2011 00:39:04 +1000 Subject: m68knommu: make 528x UART platform addressing consistent If we make all UART addressing consistent across all ColdFire family members then we will be able to remove the duplicated plaform data and use a single setup for all. So modify the ColdFire 528x UART addressing so that: . UARTs are numbered from 0 up . use a common name for IRQs used Signed-off-by: Greg Ungerer --- arch/m68k/include/asm/m528xsim.h | 12 +++++++++--- arch/m68k/platform/528x/config.c | 12 ++++++------ 2 files changed, 15 insertions(+), 9 deletions(-) (limited to 'arch') diff --git a/arch/m68k/include/asm/m528xsim.h b/arch/m68k/include/asm/m528xsim.h index d798bd5df56c..a5f0c14b47dd 100644 --- a/arch/m68k/include/asm/m528xsim.h +++ b/arch/m68k/include/asm/m528xsim.h @@ -35,9 +35,15 @@ #define MCFINT_VECBASE 64 /* Vector base number */ #define MCFINT_UART0 13 /* Interrupt number for UART0 */ +#define MCFINT_UART1 14 /* Interrupt number for UART1 */ +#define MCFINT_UART2 15 /* Interrupt number for UART2 */ #define MCFINT_QSPI 18 /* Interrupt number for QSPI */ #define MCFINT_PIT1 55 /* Interrupt number for PIT1 */ +#define MCF_IRQ_UART0 (MCFINT_VECBASE + MCFINT_UART0) +#define MCF_IRQ_UART1 (MCFINT_VECBASE + MCFINT_UART1) +#define MCF_IRQ_UART2 (MCFINT_VECBASE + MCFINT_UART2) + /* * SDRAM configuration registers. */ @@ -58,9 +64,9 @@ /* * UART module. */ -#define MCFUART_BASE1 (MCF_IPSBAR + 0x00000200) -#define MCFUART_BASE2 (MCF_IPSBAR + 0x00000240) -#define MCFUART_BASE3 (MCF_IPSBAR + 0x00000280) +#define MCFUART_BASE0 (MCF_IPSBAR + 0x00000200) +#define MCFUART_BASE1 (MCF_IPSBAR + 0x00000240) +#define MCFUART_BASE2 (MCF_IPSBAR + 0x00000280) /* * FEC ethernet module. diff --git a/arch/m68k/platform/528x/config.c b/arch/m68k/platform/528x/config.c index 08f397a382bb..ca848c9bf619 100644 --- a/arch/m68k/platform/528x/config.c +++ b/arch/m68k/platform/528x/config.c @@ -29,16 +29,16 @@ static struct mcf_platform_uart m528x_uart_platform[] = { { - .mapbase = MCFUART_BASE1, - .irq = MCFINT_VECBASE + MCFINT_UART0, + .mapbase = MCFUART_BASE0, + .irq = MCF_IRQ_UART0, }, { - .mapbase = MCFUART_BASE2, - .irq = MCFINT_VECBASE + MCFINT_UART0 + 1, + .mapbase = MCFUART_BASE1, + .irq = MCF_IRQ_UART1, }, { - .mapbase = MCFUART_BASE3, - .irq = MCFINT_VECBASE + MCFINT_UART0 + 2, + .mapbase = MCFUART_BASE2, + .irq = MCF_IRQ_UART2, }, { }, }; -- cgit v1.2.3-59-g8ed1b From 35b7cf22c6b2481f7c425f30898214f73376834d Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Sat, 24 Dec 2011 00:41:07 +1000 Subject: m68knommu: make 532x UART platform addressing consistent If we make all UART addressing consistent across all ColdFire family members then we will be able to remove the duplicated plaform data and use a single setup for all. So modify the ColdFire 532x UART addressing so that: . UARTs are numbered from 0 up . use a common name for IRQs used Signed-off-by: Greg Ungerer --- arch/m68k/include/asm/m532xsim.h | 10 +++++++--- arch/m68k/platform/532x/config.c | 12 ++++++------ 2 files changed, 13 insertions(+), 9 deletions(-) (limited to 'arch') diff --git a/arch/m68k/include/asm/m532xsim.h b/arch/m68k/include/asm/m532xsim.h index ba4cc784f574..f963d64c94e3 100644 --- a/arch/m68k/include/asm/m532xsim.h +++ b/arch/m68k/include/asm/m532xsim.h @@ -25,6 +25,10 @@ #define MCFINT_UART2 28 /* Interrupt number for UART2 */ #define MCFINT_QSPI 31 /* Interrupt number for QSPI */ +#define MCF_IRQ_UART0 (MCFINT_VECBASE + MCFINT_UART0) +#define MCF_IRQ_UART1 (MCFINT_VECBASE + MCFINT_UART1) +#define MCF_IRQ_UART2 (MCFINT_VECBASE + MCFINT_UART2) + #define MCF_WTM_WCR MCF_REG16(0xFC098000) /* @@ -82,9 +86,9 @@ /* * UART module. */ -#define MCFUART_BASE1 0xFC060000 /* Base address of UART1 */ -#define MCFUART_BASE2 0xFC064000 /* Base address of UART2 */ -#define MCFUART_BASE3 0xFC068000 /* Base address of UART3 */ +#define MCFUART_BASE0 0xFC060000 /* Base address of UART1 */ +#define MCFUART_BASE1 0xFC064000 /* Base address of UART2 */ +#define MCFUART_BASE2 0xFC068000 /* Base address of UART3 */ /* * Timer module. diff --git a/arch/m68k/platform/532x/config.c b/arch/m68k/platform/532x/config.c index 3558a620a00c..ac86896c4fa2 100644 --- a/arch/m68k/platform/532x/config.c +++ b/arch/m68k/platform/532x/config.c @@ -35,16 +35,16 @@ static struct mcf_platform_uart m532x_uart_platform[] = { { - .mapbase = MCFUART_BASE1, - .irq = MCFINT_VECBASE + MCFINT_UART0, + .mapbase = MCFUART_BASE0, + .irq = MCF_IRQ_UART0, }, { - .mapbase = MCFUART_BASE2, - .irq = MCFINT_VECBASE + MCFINT_UART1, + .mapbase = MCFUART_BASE1, + .irq = MCF_IRQ_UART1, }, { - .mapbase = MCFUART_BASE3, - .irq = MCFINT_VECBASE + MCFINT_UART2, + .mapbase = MCFUART_BASE2, + .irq = MCF_IRQ_UART2, }, { }, }; -- cgit v1.2.3-59-g8ed1b From 69d23b610a04e269d6a094e6f3e37d85d6b2784a Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Sat, 24 Dec 2011 00:43:13 +1000 Subject: m68knommu: make 5407 UART platform addressing consistent If we make all UART addressing consistent across all ColdFire family members then we will be able to remove the duplicated plaform data and use a single setup for all. So modify the ColdFire 5407 UART addressing so that: . UARTs are numbered from 0 up . base addresses are absolute (not relative to MBAR peripheral register) . use a common name for IRQs used Signed-off-by: Greg Ungerer --- arch/m68k/include/asm/m5407sim.h | 6 ++++-- arch/m68k/platform/5407/config.c | 12 ++++++------ 2 files changed, 10 insertions(+), 8 deletions(-) (limited to 'arch') diff --git a/arch/m68k/include/asm/m5407sim.h b/arch/m68k/include/asm/m5407sim.h index 51e00b00b8a6..79f58dd6a83d 100644 --- a/arch/m68k/include/asm/m5407sim.h +++ b/arch/m68k/include/asm/m5407sim.h @@ -85,8 +85,8 @@ #define MCFTIMER_BASE1 (MCF_MBAR + 0x140) /* Base of TIMER1 */ #define MCFTIMER_BASE2 (MCF_MBAR + 0x180) /* Base of TIMER2 */ -#define MCFUART_BASE1 0x1c0 /* Base address of UART1 */ -#define MCFUART_BASE2 0x200 /* Base address of UART2 */ +#define MCFUART_BASE0 (MCF_MBAR + 0x1c0) /* Base address UART0 */ +#define MCFUART_BASE1 (MCF_MBAR + 0x200) /* Base address UART1 */ #define MCFSIM_PADDR (MCF_MBAR + 0x244) #define MCFSIM_PADAT (MCF_MBAR + 0x248) @@ -139,6 +139,8 @@ */ #define MCF_IRQ_TIMER 30 /* Timer0, Level 6 */ #define MCF_IRQ_PROFILER 31 /* Timer1, Level 7 */ +#define MCF_IRQ_UART0 73 /* UART0 */ +#define MCF_IRQ_UART1 74 /* UART1 */ /****************************************************************************/ #endif /* m5407sim_h */ diff --git a/arch/m68k/platform/5407/config.c b/arch/m68k/platform/5407/config.c index 4861be602dcd..f8ed5856d7cb 100644 --- a/arch/m68k/platform/5407/config.c +++ b/arch/m68k/platform/5407/config.c @@ -22,12 +22,12 @@ static struct mcf_platform_uart m5407_uart_platform[] = { { - .mapbase = MCF_MBAR + MCFUART_BASE1, - .irq = 73, + .mapbase = MCFUART_BASE0, + .irq = MCF_IRQ_UART0, }, { - .mapbase = MCF_MBAR + MCFUART_BASE2, - .irq = 74, + .mapbase = MCFUART_BASE1, + .irq = MCF_IRQ_UART1, }, { }, }; @@ -48,11 +48,11 @@ static void __init m5407_uart_init_line(int line, int irq) { if (line == 0) { writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR); - writeb(irq, MCF_MBAR + MCFUART_BASE1 + MCFUART_UIVR); + writeb(irq, MCFUART_BASE0 + MCFUART_UIVR); mcf_mapirq2imr(irq, MCFINTC_UART0); } else if (line == 1) { writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR); - writeb(irq, MCF_MBAR + MCFUART_BASE2 + MCFUART_UIVR); + writeb(irq, MCFUART_BASE1 + MCFUART_UIVR); mcf_mapirq2imr(irq, MCFINTC_UART1); } } -- cgit v1.2.3-59-g8ed1b From bbbeeaf2f74b634c95af3492e4958e752966eaa5 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Sat, 24 Dec 2011 00:46:37 +1000 Subject: m68knommu: make 54xx UART platform addressing consistent If we make all UART addressing consistent across all ColdFire family members then we will be able to remove the duplicated plaform data and use a single setup for all. So modify the ColdFire 54xx UART addressing so that: . UARTs are numbered from 0 up . base addresses are absolute (not relative to MBAR peripheral register) . use a common name for IRQs used Signed-off-by: Greg Ungerer --- arch/m68k/include/asm/m54xxsim.h | 16 ++++++++++------ arch/m68k/platform/54xx/config.c | 16 ++++++++-------- 2 files changed, 18 insertions(+), 14 deletions(-) (limited to 'arch') diff --git a/arch/m68k/include/asm/m54xxsim.h b/arch/m68k/include/asm/m54xxsim.h index 1ed8bfb02772..ae56b8848a9d 100644 --- a/arch/m68k/include/asm/m54xxsim.h +++ b/arch/m68k/include/asm/m54xxsim.h @@ -31,16 +31,20 @@ /* * UART module. */ -#define MCFUART_BASE1 0x8600 /* Base address of UART1 */ -#define MCFUART_BASE2 0x8700 /* Base address of UART2 */ -#define MCFUART_BASE3 0x8800 /* Base address of UART3 */ -#define MCFUART_BASE4 0x8900 /* Base address of UART4 */ +#define MCFUART_BASE0 (MCF_MBAR + 0x8600) /* Base address UART0 */ +#define MCFUART_BASE1 (MCF_MBAR + 0x8700) /* Base address UART1 */ +#define MCFUART_BASE2 (MCF_MBAR + 0x8800) /* Base address UART2 */ +#define MCFUART_BASE3 (MCF_MBAR + 0x8900) /* Base address UART3 */ /* * Define system peripheral IRQ usage. */ -#define MCF_IRQ_TIMER (64 + 54) /* Slice Timer 0 */ -#define MCF_IRQ_PROFILER (64 + 53) /* Slice Timer 1 */ +#define MCF_IRQ_TIMER (MCFINT_VECBASE + 54) /* Slice Timer 0 */ +#define MCF_IRQ_PROFILER (MCFINT_VECBASE + 53) /* Slice Timer 1 */ +#define MCF_IRQ_UART0 (MCFINT_VECBASE + 35) +#define MCF_IRQ_UART1 (MCFINT_VECBASE + 34) +#define MCF_IRQ_UART2 (MCFINT_VECBASE + 33) +#define MCF_IRQ_UART3 (MCFINT_VECBASE + 32) /* * Generic GPIO support diff --git a/arch/m68k/platform/54xx/config.c b/arch/m68k/platform/54xx/config.c index 8282ef1c783e..fdf6dcf5da52 100644 --- a/arch/m68k/platform/54xx/config.c +++ b/arch/m68k/platform/54xx/config.c @@ -29,20 +29,20 @@ static struct mcf_platform_uart m54xx_uart_platform[] = { { - .mapbase = MCF_MBAR + MCFUART_BASE1, - .irq = 64 + 35, + .mapbase = MCFUART_BASE0, + .irq = MCF_IRQ_UART0, }, { - .mapbase = MCF_MBAR + MCFUART_BASE2, - .irq = 64 + 34, + .mapbase = MCFUART_BASE1, + .irq = MCF_IRQ_UART1, }, { - .mapbase = MCF_MBAR + MCFUART_BASE3, - .irq = 64 + 33, + .mapbase = MCFUART_BASE2, + .irq = MCF_IRQ_UART2, }, { - .mapbase = MCF_MBAR + MCFUART_BASE4, - .irq = 64 + 32, + .mapbase = MCFUART_BASE3, + .irq = MCF_IRQ_UART3, }, }; -- cgit v1.2.3-59-g8ed1b From a579748dc1b5233e13c7b2fdb0f005f93369bb83 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Sat, 24 Dec 2011 00:49:12 +1000 Subject: m68knommu: simplify the 5206 UART setup code Simplify the UART setup code so that it no longer loops for each UART present. Just make it do all the work it needs in a single function. This will make the code easier to share when we move to a single set of platform data for ColdFire UARTs. Signed-off-by: Greg Ungerer --- arch/m68k/platform/5206/config.c | 27 +++++++++------------------ 1 file changed, 9 insertions(+), 18 deletions(-) (limited to 'arch') diff --git a/arch/m68k/platform/5206/config.c b/arch/m68k/platform/5206/config.c index 4eec699b3bc9..a8ba8106cbc8 100644 --- a/arch/m68k/platform/5206/config.c +++ b/arch/m68k/platform/5206/config.c @@ -44,26 +44,17 @@ static struct platform_device *m5206_devices[] __initdata = { /***************************************************************************/ -static void __init m5206_uart_init_line(int line, int irq) -{ - if (line == 0) { - writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR); - writeb(irq, MCFUART_BASE0 + MCFUART_UIVR); - mcf_mapirq2imr(irq, MCFINTC_UART0); - } else if (line == 1) { - writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR); - writeb(irq, MCFUART_BASE1 + MCFUART_UIVR); - mcf_mapirq2imr(irq, MCFINTC_UART1); - } -} - static void __init m5206_uarts_init(void) { - const int nrlines = ARRAY_SIZE(m5206_uart_platform); - int line; - - for (line = 0; (line < nrlines); line++) - m5206_uart_init_line(line, m5206_uart_platform[line].irq); + /* UART0 interrupt setup */ + writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR); + writeb(MCF_IRQ_UART0, MCFUART_BASE0 + MCFUART_UIVR); + mcf_mapirq2imr(MCF_IRQ_UART0, MCFINTC_UART0); + + /* UART1 interrupt setup */ + writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR); + writeb(MCF_IRQ_UART1, MCFUART_BASE1 + MCFUART_UIVR); + mcf_mapirq2imr(MCF_IRQ_UART1, MCFINTC_UART1); } /***************************************************************************/ -- cgit v1.2.3-59-g8ed1b From b92225c7164dd75bca6bb0ebbac1355998fac8ba Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Sat, 24 Dec 2011 00:53:54 +1000 Subject: m68knommu: simplify the 520x UART setup code Simplify the UART setup code so that it no longer loops for each UART present. Just make it do all the work it needs in a single function. This will make the code easier to share when we move to a single set of platform data for ColdFire UARTs. Signed-off-by: Greg Ungerer --- arch/m68k/platform/520x/config.c | 42 ++++++++++++---------------------------- 1 file changed, 12 insertions(+), 30 deletions(-) (limited to 'arch') diff --git a/arch/m68k/platform/520x/config.c b/arch/m68k/platform/520x/config.c index 27c7d056dc1f..fe203bd7a56b 100644 --- a/arch/m68k/platform/520x/config.c +++ b/arch/m68k/platform/520x/config.c @@ -227,41 +227,23 @@ static struct platform_device *m520x_devices[] __initdata = { /***************************************************************************/ -static void __init m520x_uart_init_line(int line, int irq) +static void __init m520x_uarts_init(void) { u16 par; u8 par2; - switch (line) { - case 0: - par = readw(MCF_GPIO_PAR_UART); - par |= MCF_GPIO_PAR_UART_PAR_UTXD0 | - MCF_GPIO_PAR_UART_PAR_URXD0; - writew(par, MCF_GPIO_PAR_UART); - break; - case 1: - par = readw(MCF_GPIO_PAR_UART); - par |= MCF_GPIO_PAR_UART_PAR_UTXD1 | - MCF_GPIO_PAR_UART_PAR_URXD1; - writew(par, MCF_GPIO_PAR_UART); - break; - case 2: - par2 = readb(MCF_GPIO_PAR_FECI2C); - par2 &= ~0x0F; - par2 |= MCF_GPIO_PAR_FECI2C_PAR_SCL_UTXD2 | - MCF_GPIO_PAR_FECI2C_PAR_SDA_URXD2; - writeb(par2, MCF_GPIO_PAR_FECI2C); - break; - } -} - -static void __init m520x_uarts_init(void) -{ - const int nrlines = ARRAY_SIZE(m520x_uart_platform); - int line; + /* UART0 and UART1 GPIO pin setup */ + par = readw(MCF_GPIO_PAR_UART); + par |= MCF_GPIO_PAR_UART_PAR_UTXD0 | MCF_GPIO_PAR_UART_PAR_URXD0; + par |= MCF_GPIO_PAR_UART_PAR_UTXD1 | MCF_GPIO_PAR_UART_PAR_URXD1; + writew(par, MCF_GPIO_PAR_UART); - for (line = 0; (line < nrlines); line++) - m520x_uart_init_line(line, m520x_uart_platform[line].irq); + /* UART1 GPIO pin setup */ + par2 = readb(MCF_GPIO_PAR_FECI2C); + par2 &= ~0x0F; + par2 |= MCF_GPIO_PAR_FECI2C_PAR_SCL_UTXD2 | + MCF_GPIO_PAR_FECI2C_PAR_SDA_URXD2; + writeb(par2, MCF_GPIO_PAR_FECI2C); } /***************************************************************************/ -- cgit v1.2.3-59-g8ed1b From 43d94b7f929aa293e8d4845d0b7f754b534d4575 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Sat, 24 Dec 2011 00:55:49 +1000 Subject: m68knommu: simplify the 5249 UART setup code Simplify the UART setup code so that it no longer loops for each UART present. Just make it do all the work it needs in a single function. This will make the code easier to share when we move to a single set of platform data for ColdFire UARTs. Signed-off-by: Greg Ungerer --- arch/m68k/platform/5249/config.c | 27 +++++++++------------------ 1 file changed, 9 insertions(+), 18 deletions(-) (limited to 'arch') diff --git a/arch/m68k/platform/5249/config.c b/arch/m68k/platform/5249/config.c index b74092a20d2d..913160c3f46c 100644 --- a/arch/m68k/platform/5249/config.c +++ b/arch/m68k/platform/5249/config.c @@ -234,26 +234,17 @@ static struct platform_device *m5249_devices[] __initdata = { /***************************************************************************/ -static void __init m5249_uart_init_line(int line, int irq) -{ - if (line == 0) { - writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR); - writeb(irq, MCFUART_BASE0 + MCFUART_UIVR); - mcf_mapirq2imr(irq, MCFINTC_UART0); - } else if (line == 1) { - writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR); - writeb(irq, MCFUART_BASE1 + MCFUART_UIVR); - mcf_mapirq2imr(irq, MCFINTC_UART1); - } -} - static void __init m5249_uarts_init(void) { - const int nrlines = ARRAY_SIZE(m5249_uart_platform); - int line; - - for (line = 0; (line < nrlines); line++) - m5249_uart_init_line(line, m5249_uart_platform[line].irq); + /* UART0 interrupt setup */ + writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR); + writeb(MCF_IRQ_UART0, MCFUART_BASE0 + MCFUART_UIVR); + mcf_mapirq2imr(MCF_IRQ_UART0, MCFINTC_UART0); + + /* UART1 interrupt setup */ + writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR); + writeb(MCF_IRQ_UART1, MCFUART_BASE1 + MCFUART_UIVR); + mcf_mapirq2imr(MCF_IRQ_UART1, MCFINTC_UART1); } /***************************************************************************/ -- cgit v1.2.3-59-g8ed1b From 6b656e8a74ca81e04b281a135a49df76ada28a41 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Sat, 24 Dec 2011 00:56:52 +1000 Subject: m68knommu: simplify the 5272 UART setup code Simplify the UART setup code so that it no longer loops for each UART present. Just make it do all the work it needs in a single function. This will make the code easier to share when we move to a single set of platform data for ColdFire UARTs. Signed-off-by: Greg Ungerer --- arch/m68k/platform/5272/config.c | 27 ++++++++------------------- 1 file changed, 8 insertions(+), 19 deletions(-) (limited to 'arch') diff --git a/arch/m68k/platform/5272/config.c b/arch/m68k/platform/5272/config.c index 1c99cbae1f97..a99a6893a57a 100644 --- a/arch/m68k/platform/5272/config.c +++ b/arch/m68k/platform/5272/config.c @@ -85,29 +85,18 @@ static struct platform_device *m5272_devices[] __initdata = { /***************************************************************************/ -static void __init m5272_uart_init_line(int line, int irq) +static void __init m5272_uarts_init(void) { u32 v; - if ((line >= 0) && (line < 2)) { - /* Enable the output lines for the serial ports */ - v = readl(MCF_MBAR + MCFSIM_PBCNT); - v = (v & ~0x000000ff) | 0x00000055; - writel(v, MCF_MBAR + MCFSIM_PBCNT); - - v = readl(MCF_MBAR + MCFSIM_PDCNT); - v = (v & ~0x000003fc) | 0x000002a8; - writel(v, MCF_MBAR + MCFSIM_PDCNT); - } -} - -static void __init m5272_uarts_init(void) -{ - const int nrlines = ARRAY_SIZE(m5272_uart_platform); - int line; + /* Enable the output lines for the serial ports */ + v = readl(MCF_MBAR + MCFSIM_PBCNT); + v = (v & ~0x000000ff) | 0x00000055; + writel(v, MCF_MBAR + MCFSIM_PBCNT); - for (line = 0; (line < nrlines); line++) - m5272_uart_init_line(line, m5272_uart_platform[line].irq); + v = readl(MCF_MBAR + MCFSIM_PDCNT); + v = (v & ~0x000003fc) | 0x000002a8; + writel(v, MCF_MBAR + MCFSIM_PDCNT); } /***************************************************************************/ -- cgit v1.2.3-59-g8ed1b From 1eb1391638633cdeb7dcaacd295bfcbec216ea8f Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Sat, 24 Dec 2011 00:59:03 +1000 Subject: m68knommu: simplify the 527x UART setup code Simplify the UART setup code so that it no longer loops for each UART present. Just make it do all the work it needs in a single function. This will make the code easier to share when we move to a single set of platform data for ColdFire UARTs. Signed-off-by: Greg Ungerer --- arch/m68k/platform/527x/config.c | 21 ++------------------- 1 file changed, 2 insertions(+), 19 deletions(-) (limited to 'arch') diff --git a/arch/m68k/platform/527x/config.c b/arch/m68k/platform/527x/config.c index 56f1ddd3cfdc..74dab0248b62 100644 --- a/arch/m68k/platform/527x/config.c +++ b/arch/m68k/platform/527x/config.c @@ -295,35 +295,18 @@ static struct platform_device *m527x_devices[] __initdata = { /***************************************************************************/ -static void __init m527x_uart_init_line(int line, int irq) +static void __init m527x_uarts_init(void) { u16 sepmask; - if ((line < 0) || (line > 2)) - return; - /* * External Pin Mask Setting & Enable External Pin for Interface */ sepmask = readw(MCF_IPSBAR + MCF_GPIO_PAR_UART); - if (line == 0) - sepmask |= UART0_ENABLE_MASK; - else if (line == 1) - sepmask |= UART1_ENABLE_MASK; - else if (line == 2) - sepmask |= UART2_ENABLE_MASK; + sepmask |= UART0_ENABLE_MASK | UART1_ENABLE_MASK | UART2_ENABLE_MASK; writew(sepmask, MCF_IPSBAR + MCF_GPIO_PAR_UART); } -static void __init m527x_uarts_init(void) -{ - const int nrlines = ARRAY_SIZE(m527x_uart_platform); - int line; - - for (line = 0; (line < nrlines); line++) - m527x_uart_init_line(line, m527x_uart_platform[line].irq); -} - /***************************************************************************/ static void __init m527x_fec_init(void) -- cgit v1.2.3-59-g8ed1b From cae82a836de23b611054af9d8a6c9aeb1db639e1 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Sat, 24 Dec 2011 01:00:48 +1000 Subject: m68knommu: simplify the 528x UART setup code Simplify the UART setup code so that it no longer loops for each UART present. Just make it do all the work it needs in a single function. This will make the code easier to share when we move to a single set of platform data for ColdFire UARTs. Signed-off-by: Greg Ungerer --- arch/m68k/platform/528x/config.c | 22 ++++------------------ 1 file changed, 4 insertions(+), 18 deletions(-) (limited to 'arch') diff --git a/arch/m68k/platform/528x/config.c b/arch/m68k/platform/528x/config.c index ca848c9bf619..82af5d883603 100644 --- a/arch/m68k/platform/528x/config.c +++ b/arch/m68k/platform/528x/config.c @@ -218,28 +218,14 @@ static struct platform_device *m528x_devices[] __initdata = { /***************************************************************************/ -static void __init m528x_uart_init_line(int line, int irq) +static void __init m528x_uarts_init(void) { u8 port; - if ((line < 0) || (line > 2)) - return; - /* make sure PUAPAR is set for UART0 and UART1 */ - if (line < 2) { - port = readb(MCF5282_GPIO_PUAPAR); - port |= (0x03 << (line * 2)); - writeb(port, MCF5282_GPIO_PUAPAR); - } -} - -static void __init m528x_uarts_init(void) -{ - const int nrlines = ARRAY_SIZE(m528x_uart_platform); - int line; - - for (line = 0; (line < nrlines); line++) - m528x_uart_init_line(line, m528x_uart_platform[line].irq); + port = readb(MCF5282_GPIO_PUAPAR); + port |= 0x03 | (0x03 << 2); + writeb(port, MCF5282_GPIO_PUAPAR); } /***************************************************************************/ -- cgit v1.2.3-59-g8ed1b From 7bdebba492d92837e7f93e9a6ddfb11a498619b7 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Sat, 24 Dec 2011 01:02:43 +1000 Subject: m68knommu: simplify the 5307 UART setup code Simplify the UART setup code so that it no longer loops for each UART present. Just make it do all the work it needs in a single function. This will make the code easier to share when we move to a single set of platform data for ColdFire UARTs. Signed-off-by: Greg Ungerer --- arch/m68k/platform/5307/config.c | 27 +++++++++------------------ 1 file changed, 9 insertions(+), 18 deletions(-) (limited to 'arch') diff --git a/arch/m68k/platform/5307/config.c b/arch/m68k/platform/5307/config.c index dc9ecf07dd07..bad3c27a8a4e 100644 --- a/arch/m68k/platform/5307/config.c +++ b/arch/m68k/platform/5307/config.c @@ -53,26 +53,17 @@ static struct platform_device *m5307_devices[] __initdata = { /***************************************************************************/ -static void __init m5307_uart_init_line(int line, int irq) -{ - if (line == 0) { - writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR); - writeb(irq, MCFUART_BASE0 + MCFUART_UIVR); - mcf_mapirq2imr(irq, MCFINTC_UART0); - } else if (line == 1) { - writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR); - writeb(irq, MCFUART_BASE1 + MCFUART_UIVR); - mcf_mapirq2imr(irq, MCFINTC_UART1); - } -} - static void __init m5307_uarts_init(void) { - const int nrlines = ARRAY_SIZE(m5307_uart_platform); - int line; - - for (line = 0; (line < nrlines); line++) - m5307_uart_init_line(line, m5307_uart_platform[line].irq); + /* UART0 interrupt setup */ + writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR); + writeb(MCF_IRQ_UART0, MCFUART_BASE0 + MCFUART_UIVR); + mcf_mapirq2imr(MCF_IRQ_UART0, MCFINTC_UART0); + + /* UART1 interrupt setup */ + writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR); + writeb(MCF_IRQ_UART1, MCFUART_BASE1 + MCFUART_UIVR); + mcf_mapirq2imr(MCF_IRQ_UART1, MCFINTC_UART1); } /***************************************************************************/ -- cgit v1.2.3-59-g8ed1b From a75bc61952fdc903a7434acb25b20ec703c23803 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Sat, 24 Dec 2011 01:04:22 +1000 Subject: m68knommu: simplify the 532x UART setup code Simplify the UART setup code so that it no longer loops for each UART present. Just make it do all the work it needs in a single function. This will make the code easier to share when we move to a single set of platform data for ColdFire UARTs. Signed-off-by: Greg Ungerer --- arch/m68k/platform/532x/config.c | 19 +++---------------- 1 file changed, 3 insertions(+), 16 deletions(-) (limited to 'arch') diff --git a/arch/m68k/platform/532x/config.c b/arch/m68k/platform/532x/config.c index ac86896c4fa2..5b106839f9b6 100644 --- a/arch/m68k/platform/532x/config.c +++ b/arch/m68k/platform/532x/config.c @@ -210,25 +210,12 @@ static struct platform_device *m532x_devices[] __initdata = { /***************************************************************************/ -static void __init m532x_uart_init_line(int line, int irq) -{ - if (line == 0) { - /* GPIO initialization */ - MCF_GPIO_PAR_UART |= 0x000F; - } else if (line == 1) { - /* GPIO initialization */ - MCF_GPIO_PAR_UART |= 0x0FF0; - } -} - static void __init m532x_uarts_init(void) { - const int nrlines = ARRAY_SIZE(m532x_uart_platform); - int line; - - for (line = 0; (line < nrlines); line++) - m532x_uart_init_line(line, m532x_uart_platform[line].irq); + /* UART GPIO initialization */ + MCF_GPIO_PAR_UART |= 0x0FFF; } + /***************************************************************************/ static void __init m532x_fec_init(void) -- cgit v1.2.3-59-g8ed1b From b77fb7faa9c80021e885749f8e4cf84a4981c8ba Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Sat, 24 Dec 2011 01:06:06 +1000 Subject: m68knommu: simplify the 5407 UART setup code Simplify the UART setup code so that it no longer loops for each UART present. Just make it do all the work it needs in a single function. This will make the code easier to share when we move to a single set of platform data for ColdFire UARTs. Signed-off-by: Greg Ungerer --- arch/m68k/platform/5407/config.c | 27 +++++++++------------------ 1 file changed, 9 insertions(+), 18 deletions(-) (limited to 'arch') diff --git a/arch/m68k/platform/5407/config.c b/arch/m68k/platform/5407/config.c index f8ed5856d7cb..ae2689d246e3 100644 --- a/arch/m68k/platform/5407/config.c +++ b/arch/m68k/platform/5407/config.c @@ -44,26 +44,17 @@ static struct platform_device *m5407_devices[] __initdata = { /***************************************************************************/ -static void __init m5407_uart_init_line(int line, int irq) -{ - if (line == 0) { - writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR); - writeb(irq, MCFUART_BASE0 + MCFUART_UIVR); - mcf_mapirq2imr(irq, MCFINTC_UART0); - } else if (line == 1) { - writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR); - writeb(irq, MCFUART_BASE1 + MCFUART_UIVR); - mcf_mapirq2imr(irq, MCFINTC_UART1); - } -} - static void __init m5407_uarts_init(void) { - const int nrlines = ARRAY_SIZE(m5407_uart_platform); - int line; - - for (line = 0; (line < nrlines); line++) - m5407_uart_init_line(line, m5407_uart_platform[line].irq); + /* UART0 interrupt setup */ + writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR); + writeb(MCF_IRQ_UART0, MCFUART_BASE0 + MCFUART_UIVR); + mcf_mapirq2imr(MCF_IRQ_UART0, MCFINTC_UART0); + + /* UART1 interrupt setup */ + writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR); + writeb(MCF_IRQ_UART1, MCFUART_BASE1 + MCFUART_UIVR); + mcf_mapirq2imr(MCF_IRQ_UART1, MCFINTC_UART1); } /***************************************************************************/ -- cgit v1.2.3-59-g8ed1b From b9a0c3f88ef6163f56662d0121d4932b457568bb Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Sat, 24 Dec 2011 01:08:47 +1000 Subject: m68knommu: simplify the 54xx UART setup code Simplify the UART setup code so that it no longer loops for each UART present. Just make it do all the work it needs in a single function. This will make the code easier to share when we move to a single set of platform data for ColdFire UARTs. Signed-off-by: Greg Ungerer --- arch/m68k/platform/54xx/config.c | 33 +++++++++------------------------ 1 file changed, 9 insertions(+), 24 deletions(-) (limited to 'arch') diff --git a/arch/m68k/platform/54xx/config.c b/arch/m68k/platform/54xx/config.c index fdf6dcf5da52..4083f50682c6 100644 --- a/arch/m68k/platform/54xx/config.c +++ b/arch/m68k/platform/54xx/config.c @@ -59,32 +59,17 @@ static struct platform_device *m54xx_devices[] __initdata = { /***************************************************************************/ -static void __init m54xx_uart_init_line(int line, int irq) -{ - int rts_cts; - - /* enable io pins */ - switch (line) { - case 0: - rts_cts = 0; break; - case 1: - rts_cts = MCF_PAR_PSC_RTS_RTS; break; - case 2: - rts_cts = MCF_PAR_PSC_RTS_RTS | MCF_PAR_PSC_CTS_CTS; break; - case 3: - rts_cts = 0; break; - } - __raw_writeb(MCF_PAR_PSC_TXD | rts_cts | MCF_PAR_PSC_RXD, - MCF_MBAR + MCF_PAR_PSC(line)); -} - static void __init m54xx_uarts_init(void) { - const int nrlines = ARRAY_SIZE(m54xx_uart_platform); - int line; - - for (line = 0; (line < nrlines); line++) - m54xx_uart_init_line(line, m54xx_uart_platform[line].irq); + /* enable io pins */ + __raw_writeb(MCF_PAR_PSC_TXD | MCF_PAR_PSC_RXD, + MCF_MBAR + MCF_PAR_PSC(0)); + __raw_writeb(MCF_PAR_PSC_TXD | MCF_PAR_PSC_RXD | MCF_PAR_PSC_RTS_RTS, + MCF_MBAR + MCF_PAR_PSC(1)); + __raw_writeb(MCF_PAR_PSC_TXD | MCF_PAR_PSC_RXD | MCF_PAR_PSC_RTS_RTS | + MCF_PAR_PSC_CTS_CTS, MCF_MBAR + MCF_PAR_PSC(2)); + __raw_writeb(MCF_PAR_PSC_TXD | MCF_PAR_PSC_RXD, + MCF_MBAR + MCF_PAR_PSC(3)); } /***************************************************************************/ -- cgit v1.2.3-59-g8ed1b From 0d2fe946474196e586e492d9e9b381e184c774ea Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Sat, 24 Dec 2011 01:17:10 +1000 Subject: m68knommu: merge common ColdFire UART platform setup code The ColdFire UART is common to all ColdFire CPU's. No need to duplicate its platform setup code for every CPU family member. Merge all the setup code into a single shared file. Signed-off-by: Greg Ungerer --- arch/m68k/platform/5206/config.c | 34 -------------------- arch/m68k/platform/520x/config.c | 23 -------------- arch/m68k/platform/523x/config.c | 23 -------------- arch/m68k/platform/5249/config.c | 19 ------------ arch/m68k/platform/5272/config.c | 19 ------------ arch/m68k/platform/527x/config.c | 23 -------------- arch/m68k/platform/528x/config.c | 23 -------------- arch/m68k/platform/5307/config.c | 34 -------------------- arch/m68k/platform/532x/config.c | 23 -------------- arch/m68k/platform/5407/config.c | 34 -------------------- arch/m68k/platform/54xx/config.c | 43 -------------------------- arch/m68k/platform/coldfire/Makefile | 2 +- arch/m68k/platform/coldfire/device.c | 60 ++++++++++++++++++++++++++++++++++++ 13 files changed, 61 insertions(+), 299 deletions(-) create mode 100644 arch/m68k/platform/coldfire/device.c (limited to 'arch') diff --git a/arch/m68k/platform/5206/config.c b/arch/m68k/platform/5206/config.c index a8ba8106cbc8..fdef300a152c 100644 --- a/arch/m68k/platform/5206/config.c +++ b/arch/m68k/platform/5206/config.c @@ -20,30 +20,6 @@ /***************************************************************************/ -static struct mcf_platform_uart m5206_uart_platform[] = { - { - .mapbase = MCFUART_BASE0, - .irq = MCF_IRQ_UART0, - }, - { - .mapbase = MCFUART_BASE1, - .irq = MCF_IRQ_UART1, - }, - { }, -}; - -static struct platform_device m5206_uart = { - .name = "mcfuart", - .id = 0, - .dev.platform_data = m5206_uart_platform, -}; - -static struct platform_device *m5206_devices[] __initdata = { - &m5206_uart, -}; - -/***************************************************************************/ - static void __init m5206_uarts_init(void) { /* UART0 interrupt setup */ @@ -107,13 +83,3 @@ void __init config_BSP(char *commandp, int size) } /***************************************************************************/ - -static int __init init_BSP(void) -{ - platform_add_devices(m5206_devices, ARRAY_SIZE(m5206_devices)); - return 0; -} - -arch_initcall(init_BSP); - -/***************************************************************************/ diff --git a/arch/m68k/platform/520x/config.c b/arch/m68k/platform/520x/config.c index fe203bd7a56b..3af397262115 100644 --- a/arch/m68k/platform/520x/config.c +++ b/arch/m68k/platform/520x/config.c @@ -25,28 +25,6 @@ /***************************************************************************/ -static struct mcf_platform_uart m520x_uart_platform[] = { - { - .mapbase = MCFUART_BASE0, - .irq = MCF_IRQ_UART0, - }, - { - .mapbase = MCFUART_BASE1, - .irq = MCF_IRQ_UART1, - }, - { - .mapbase = MCFUART_BASE2, - .irq = MCF_IRQ_UART2, - }, - { }, -}; - -static struct platform_device m520x_uart = { - .name = "mcfuart", - .id = 0, - .dev.platform_data = m520x_uart_platform, -}; - static struct resource m520x_fec_resources[] = { { .start = MCFFEC_BASE, @@ -218,7 +196,6 @@ static void __init m520x_qspi_init(void) static struct platform_device *m520x_devices[] __initdata = { - &m520x_uart, &m520x_fec, #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) &m520x_qspi, diff --git a/arch/m68k/platform/523x/config.c b/arch/m68k/platform/523x/config.c index 49502a32efb1..ef46009540e5 100644 --- a/arch/m68k/platform/523x/config.c +++ b/arch/m68k/platform/523x/config.c @@ -26,28 +26,6 @@ /***************************************************************************/ -static struct mcf_platform_uart m523x_uart_platform[] = { - { - .mapbase = MCFUART_BASE0, - .irq = MCF_IRQ_UART0, - }, - { - .mapbase = MCFUART_BASE1, - .irq = MCF_IRQ_UART1, - }, - { - .mapbase = MCFUART_BASE2, - .irq = MCF_IRQ_UART2, - }, - { }, -}; - -static struct platform_device m523x_uart = { - .name = "mcfuart", - .id = 0, - .dev.platform_data = m523x_uart_platform, -}; - static struct resource m523x_fec_resources[] = { { .start = MCFFEC_BASE, @@ -240,7 +218,6 @@ static void __init m523x_qspi_init(void) #endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */ static struct platform_device *m523x_devices[] __initdata = { - &m523x_uart, &m523x_fec, #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) &m523x_qspi, diff --git a/arch/m68k/platform/5249/config.c b/arch/m68k/platform/5249/config.c index 913160c3f46c..afcdbfc6edaf 100644 --- a/arch/m68k/platform/5249/config.c +++ b/arch/m68k/platform/5249/config.c @@ -22,24 +22,6 @@ /***************************************************************************/ -static struct mcf_platform_uart m5249_uart_platform[] = { - { - .mapbase = MCFUART_BASE0, - .irq = MCF_IRQ_UART0, - }, - { - .mapbase = MCFUART_BASE1, - .irq = MCF_IRQ_UART1, - }, - { }, -}; - -static struct platform_device m5249_uart = { - .name = "mcfuart", - .id = 0, - .dev.platform_data = m5249_uart_platform, -}; - #ifdef CONFIG_M5249C3 static struct resource m5249_smc91x_resources[] = { @@ -223,7 +205,6 @@ static void __init m5249_qspi_init(void) static struct platform_device *m5249_devices[] __initdata = { - &m5249_uart, #ifdef CONFIG_M5249C3 &m5249_smc91x, #endif diff --git a/arch/m68k/platform/5272/config.c b/arch/m68k/platform/5272/config.c index a99a6893a57a..c7c2c422a1fc 100644 --- a/arch/m68k/platform/5272/config.c +++ b/arch/m68k/platform/5272/config.c @@ -30,24 +30,6 @@ unsigned char ledbank = 0xff; /***************************************************************************/ -static struct mcf_platform_uart m5272_uart_platform[] = { - { - .mapbase = MCFUART_BASE0, - .irq = MCF_IRQ_UART0, - }, - { - .mapbase = MCFUART_BASE1, - .irq = MCF_IRQ_UART1, - }, - { }, -}; - -static struct platform_device m5272_uart = { - .name = "mcfuart", - .id = 0, - .dev.platform_data = m5272_uart_platform, -}; - static struct resource m5272_fec_resources[] = { { .start = MCF_MBAR + 0x840, @@ -79,7 +61,6 @@ static struct platform_device m5272_fec = { }; static struct platform_device *m5272_devices[] __initdata = { - &m5272_uart, &m5272_fec, }; diff --git a/arch/m68k/platform/527x/config.c b/arch/m68k/platform/527x/config.c index 74dab0248b62..f05fbe01e740 100644 --- a/arch/m68k/platform/527x/config.c +++ b/arch/m68k/platform/527x/config.c @@ -26,28 +26,6 @@ /***************************************************************************/ -static struct mcf_platform_uart m527x_uart_platform[] = { - { - .mapbase = MCFUART_BASE0, - .irq = MCF_IRQ_UART0, - }, - { - .mapbase = MCFUART_BASE1, - .irq = MCF_IRQ_UART1, - }, - { - .mapbase = MCFUART_BASE2, - .irq = MCF_IRQ_UART2, - }, - { }, -}; - -static struct platform_device m527x_uart = { - .name = "mcfuart", - .id = 0, - .dev.platform_data = m527x_uart_platform, -}; - static struct resource m527x_fec0_resources[] = { { .start = MCFFEC_BASE0, @@ -283,7 +261,6 @@ static void __init m527x_qspi_init(void) #endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */ static struct platform_device *m527x_devices[] __initdata = { - &m527x_uart, &m527x_fec[0], #ifdef CONFIG_FEC2 &m527x_fec[1], diff --git a/arch/m68k/platform/528x/config.c b/arch/m68k/platform/528x/config.c index 82af5d883603..f75ee8bf5e35 100644 --- a/arch/m68k/platform/528x/config.c +++ b/arch/m68k/platform/528x/config.c @@ -27,28 +27,6 @@ /***************************************************************************/ -static struct mcf_platform_uart m528x_uart_platform[] = { - { - .mapbase = MCFUART_BASE0, - .irq = MCF_IRQ_UART0, - }, - { - .mapbase = MCFUART_BASE1, - .irq = MCF_IRQ_UART1, - }, - { - .mapbase = MCFUART_BASE2, - .irq = MCF_IRQ_UART2, - }, - { }, -}; - -static struct platform_device m528x_uart = { - .name = "mcfuart", - .id = 0, - .dev.platform_data = m528x_uart_platform, -}; - static struct resource m528x_fec_resources[] = { { .start = MCFFEC_BASE, @@ -209,7 +187,6 @@ static void __init m528x_qspi_init(void) #endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */ static struct platform_device *m528x_devices[] __initdata = { - &m528x_uart, &m528x_fec, #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) &m528x_qspi, diff --git a/arch/m68k/platform/5307/config.c b/arch/m68k/platform/5307/config.c index bad3c27a8a4e..74852a3dadf9 100644 --- a/arch/m68k/platform/5307/config.c +++ b/arch/m68k/platform/5307/config.c @@ -29,30 +29,6 @@ unsigned char ledbank = 0xff; /***************************************************************************/ -static struct mcf_platform_uart m5307_uart_platform[] = { - { - .mapbase = MCFUART_BASE0, - .irq = MCF_IRQ_UART0, - }, - { - .mapbase = MCFUART_BASE1, - .irq = MCF_IRQ_UART1, - }, - { }, -}; - -static struct platform_device m5307_uart = { - .name = "mcfuart", - .id = 0, - .dev.platform_data = m5307_uart_platform, -}; - -static struct platform_device *m5307_devices[] __initdata = { - &m5307_uart, -}; - -/***************************************************************************/ - static void __init m5307_uarts_init(void) { /* UART0 interrupt setup */ @@ -127,13 +103,3 @@ void __init config_BSP(char *commandp, int size) } /***************************************************************************/ - -static int __init init_BSP(void) -{ - platform_add_devices(m5307_devices, ARRAY_SIZE(m5307_devices)); - return 0; -} - -arch_initcall(init_BSP); - -/***************************************************************************/ diff --git a/arch/m68k/platform/532x/config.c b/arch/m68k/platform/532x/config.c index 5b106839f9b6..24b4c0de628b 100644 --- a/arch/m68k/platform/532x/config.c +++ b/arch/m68k/platform/532x/config.c @@ -33,28 +33,6 @@ /***************************************************************************/ -static struct mcf_platform_uart m532x_uart_platform[] = { - { - .mapbase = MCFUART_BASE0, - .irq = MCF_IRQ_UART0, - }, - { - .mapbase = MCFUART_BASE1, - .irq = MCF_IRQ_UART1, - }, - { - .mapbase = MCFUART_BASE2, - .irq = MCF_IRQ_UART2, - }, - { }, -}; - -static struct platform_device m532x_uart = { - .name = "mcfuart", - .id = 0, - .dev.platform_data = m532x_uart_platform, -}; - static struct resource m532x_fec_resources[] = { { .start = 0xfc030000, @@ -201,7 +179,6 @@ static void __init m532x_qspi_init(void) static struct platform_device *m532x_devices[] __initdata = { - &m532x_uart, &m532x_fec, #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) &m532x_qspi, diff --git a/arch/m68k/platform/5407/config.c b/arch/m68k/platform/5407/config.c index ae2689d246e3..e66ef8563717 100644 --- a/arch/m68k/platform/5407/config.c +++ b/arch/m68k/platform/5407/config.c @@ -20,30 +20,6 @@ /***************************************************************************/ -static struct mcf_platform_uart m5407_uart_platform[] = { - { - .mapbase = MCFUART_BASE0, - .irq = MCF_IRQ_UART0, - }, - { - .mapbase = MCFUART_BASE1, - .irq = MCF_IRQ_UART1, - }, - { }, -}; - -static struct platform_device m5407_uart = { - .name = "mcfuart", - .id = 0, - .dev.platform_data = m5407_uart_platform, -}; - -static struct platform_device *m5407_devices[] __initdata = { - &m5407_uart, -}; - -/***************************************************************************/ - static void __init m5407_uarts_init(void) { /* UART0 interrupt setup */ @@ -102,13 +78,3 @@ void __init config_BSP(char *commandp, int size) } /***************************************************************************/ - -static int __init init_BSP(void) -{ - platform_add_devices(m5407_devices, ARRAY_SIZE(m5407_devices)); - return 0; -} - -arch_initcall(init_BSP); - -/***************************************************************************/ diff --git a/arch/m68k/platform/54xx/config.c b/arch/m68k/platform/54xx/config.c index 4083f50682c6..2081c6cbb3de 100644 --- a/arch/m68k/platform/54xx/config.c +++ b/arch/m68k/platform/54xx/config.c @@ -25,38 +25,6 @@ #include #endif -/***************************************************************************/ - -static struct mcf_platform_uart m54xx_uart_platform[] = { - { - .mapbase = MCFUART_BASE0, - .irq = MCF_IRQ_UART0, - }, - { - .mapbase = MCFUART_BASE1, - .irq = MCF_IRQ_UART1, - }, - { - .mapbase = MCFUART_BASE2, - .irq = MCF_IRQ_UART2, - }, - { - .mapbase = MCFUART_BASE3, - .irq = MCF_IRQ_UART3, - }, -}; - -static struct platform_device m54xx_uart = { - .name = "mcfuart", - .id = 0, - .dev.platform_data = m54xx_uart_platform, -}; - -static struct platform_device *m54xx_devices[] __initdata = { - &m54xx_uart, -}; - - /***************************************************************************/ static void __init m54xx_uarts_init(void) @@ -135,14 +103,3 @@ void __init config_BSP(char *commandp, int size) } /***************************************************************************/ - -static int __init init_BSP(void) -{ - - platform_add_devices(m54xx_devices, ARRAY_SIZE(m54xx_devices)); - return 0; -} - -arch_initcall(init_BSP); - -/***************************************************************************/ diff --git a/arch/m68k/platform/coldfire/Makefile b/arch/m68k/platform/coldfire/Makefile index a8967baabd72..4572af29b6b7 100644 --- a/arch/m68k/platform/coldfire/Makefile +++ b/arch/m68k/platform/coldfire/Makefile @@ -14,7 +14,7 @@ asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1 -obj-$(CONFIG_COLDFIRE) += cache.o clk.o dma.o entry.o vectors.o +obj-$(CONFIG_COLDFIRE) += cache.o clk.o device.o dma.o entry.o vectors.o obj-$(CONFIG_M5206) += timers.o intc.o obj-$(CONFIG_M5206e) += timers.o intc.o obj-$(CONFIG_M520x) += pit.o intc-simr.o diff --git a/arch/m68k/platform/coldfire/device.c b/arch/m68k/platform/coldfire/device.c new file mode 100644 index 000000000000..c9506907872f --- /dev/null +++ b/arch/m68k/platform/coldfire/device.c @@ -0,0 +1,60 @@ +/* + * device.c -- common ColdFire SoC device support + * + * (C) Copyright 2011, Greg Ungerer + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file COPYING in the main directory of this archive + * for more details. + */ + +#include +#include +#include +#include +#include +#include +#include + +static struct mcf_platform_uart mcf_uart_platform_data[] = { + { + .mapbase = MCFUART_BASE0, + .irq = MCF_IRQ_UART0, + }, + { + .mapbase = MCFUART_BASE1, + .irq = MCF_IRQ_UART1, + }, +#ifdef MCFUART_BASE2 + { + .mapbase = MCFUART_BASE2, + .irq = MCF_IRQ_UART2, + }, +#endif +#ifdef MCFUART_BASE3 + { + .mapbase = MCFUART_BASE3, + .irq = MCF_IRQ_UART3, + }, +#endif + { }, +}; + +static struct platform_device mcf_uart = { + .name = "mcfuart", + .id = 0, + .dev.platform_data = mcf_uart_platform_data, +}; + +static struct platform_device *mcf_devices[] __initdata = { + &mcf_uart, +}; + +static int __init mcf_init_devices(void) +{ + platform_add_devices(mcf_devices, ARRAY_SIZE(mcf_devices)); + return 0; +} + +arch_initcall(mcf_init_devices); + -- cgit v1.2.3-59-g8ed1b From 55148f6f886a1b77dba1a5c3169208606827b9db Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Sat, 24 Dec 2011 01:23:35 +1000 Subject: m68knommu: merge common ColdFire UART IRQ setup Some ColdFire CPU UART hardware modules can configure the IRQ they use. Currently the same setup code is duplicated in the init code for each of these ColdFire CPUs. Merge all this code to a single instance. Signed-off-by: Greg Ungerer --- arch/m68k/include/asm/mcfuart.h | 5 ++++- arch/m68k/platform/5206/config.c | 17 ----------------- arch/m68k/platform/5249/config.c | 17 ----------------- arch/m68k/platform/5307/config.c | 17 ----------------- arch/m68k/platform/5407/config.c | 17 ----------------- arch/m68k/platform/coldfire/device.c | 20 ++++++++++++++++++++ 6 files changed, 24 insertions(+), 69 deletions(-) (limited to 'arch') diff --git a/arch/m68k/include/asm/mcfuart.h b/arch/m68k/include/asm/mcfuart.h index 2abedff0a694..2d3bc774b3c5 100644 --- a/arch/m68k/include/asm/mcfuart.h +++ b/arch/m68k/include/asm/mcfuart.h @@ -41,7 +41,10 @@ struct mcf_platform_uart { #define MCFUART_UTF 0x28 /* Transmitter FIFO (r/w) */ #define MCFUART_URF 0x2c /* Receiver FIFO (r/w) */ #define MCFUART_UFPD 0x30 /* Frac Prec. Divider (r/w) */ -#else +#endif +#if defined(CONFIG_M5206) || defined(CONFIG_M5206e) || \ + defined(CONFIG_M5249) || defined(CONFIG_M5307) || \ + defined(CONFIG_M5407) #define MCFUART_UIVR 0x30 /* Interrupt Vector (r/w) */ #endif #define MCFUART_UIPR 0x34 /* Input Port (r) */ diff --git a/arch/m68k/platform/5206/config.c b/arch/m68k/platform/5206/config.c index fdef300a152c..aca6253191f7 100644 --- a/arch/m68k/platform/5206/config.c +++ b/arch/m68k/platform/5206/config.c @@ -16,22 +16,6 @@ #include #include #include -#include - -/***************************************************************************/ - -static void __init m5206_uarts_init(void) -{ - /* UART0 interrupt setup */ - writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR); - writeb(MCF_IRQ_UART0, MCFUART_BASE0 + MCFUART_UIVR); - mcf_mapirq2imr(MCF_IRQ_UART0, MCFINTC_UART0); - - /* UART1 interrupt setup */ - writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR); - writeb(MCF_IRQ_UART1, MCFUART_BASE1 + MCFUART_UIVR); - mcf_mapirq2imr(MCF_IRQ_UART1, MCFINTC_UART1); -} /***************************************************************************/ @@ -74,7 +58,6 @@ void __init config_BSP(char *commandp, int size) mach_reset = m5206_cpu_reset; mach_sched_init = hw_timer_init; m5206_timers_init(); - m5206_uarts_init(); /* Only support the external interrupts on their primary level */ mcf_mapirq2imr(25, MCFINTC_EINT1); diff --git a/arch/m68k/platform/5249/config.c b/arch/m68k/platform/5249/config.c index afcdbfc6edaf..58dc2c9c186d 100644 --- a/arch/m68k/platform/5249/config.c +++ b/arch/m68k/platform/5249/config.c @@ -17,7 +17,6 @@ #include #include #include -#include #include /***************************************************************************/ @@ -215,21 +214,6 @@ static struct platform_device *m5249_devices[] __initdata = { /***************************************************************************/ -static void __init m5249_uarts_init(void) -{ - /* UART0 interrupt setup */ - writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR); - writeb(MCF_IRQ_UART0, MCFUART_BASE0 + MCFUART_UIVR); - mcf_mapirq2imr(MCF_IRQ_UART0, MCFINTC_UART0); - - /* UART1 interrupt setup */ - writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR); - writeb(MCF_IRQ_UART1, MCFUART_BASE1 + MCFUART_UIVR); - mcf_mapirq2imr(MCF_IRQ_UART1, MCFINTC_UART1); -} - -/***************************************************************************/ - #ifdef CONFIG_M5249C3 static void __init m5249_smc91x_init(void) @@ -281,7 +265,6 @@ void __init config_BSP(char *commandp, int size) mach_reset = m5249_cpu_reset; mach_sched_init = hw_timer_init; m5249_timers_init(); - m5249_uarts_init(); #ifdef CONFIG_M5249C3 m5249_smc91x_init(); #endif diff --git a/arch/m68k/platform/5307/config.c b/arch/m68k/platform/5307/config.c index 74852a3dadf9..89722cdbd026 100644 --- a/arch/m68k/platform/5307/config.c +++ b/arch/m68k/platform/5307/config.c @@ -16,7 +16,6 @@ #include #include #include -#include #include /***************************************************************************/ @@ -29,21 +28,6 @@ unsigned char ledbank = 0xff; /***************************************************************************/ -static void __init m5307_uarts_init(void) -{ - /* UART0 interrupt setup */ - writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR); - writeb(MCF_IRQ_UART0, MCFUART_BASE0 + MCFUART_UIVR); - mcf_mapirq2imr(MCF_IRQ_UART0, MCFINTC_UART0); - - /* UART1 interrupt setup */ - writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR); - writeb(MCF_IRQ_UART1, MCFUART_BASE1 + MCFUART_UIVR); - mcf_mapirq2imr(MCF_IRQ_UART1, MCFINTC_UART1); -} - -/***************************************************************************/ - static void __init m5307_timers_init(void) { /* Timer1 is always used as system timer */ @@ -84,7 +68,6 @@ void __init config_BSP(char *commandp, int size) mach_reset = m5307_cpu_reset; mach_sched_init = hw_timer_init; m5307_timers_init(); - m5307_uarts_init(); /* Only support the external interrupts on their primary level */ mcf_mapirq2imr(25, MCFINTC_EINT1); diff --git a/arch/m68k/platform/5407/config.c b/arch/m68k/platform/5407/config.c index e66ef8563717..e3b4cab0feb3 100644 --- a/arch/m68k/platform/5407/config.c +++ b/arch/m68k/platform/5407/config.c @@ -16,22 +16,6 @@ #include #include #include -#include - -/***************************************************************************/ - -static void __init m5407_uarts_init(void) -{ - /* UART0 interrupt setup */ - writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR); - writeb(MCF_IRQ_UART0, MCFUART_BASE0 + MCFUART_UIVR); - mcf_mapirq2imr(MCF_IRQ_UART0, MCFINTC_UART0); - - /* UART1 interrupt setup */ - writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR); - writeb(MCF_IRQ_UART1, MCFUART_BASE1 + MCFUART_UIVR); - mcf_mapirq2imr(MCF_IRQ_UART1, MCFINTC_UART1); -} /***************************************************************************/ @@ -68,7 +52,6 @@ void __init config_BSP(char *commandp, int size) mach_reset = m5407_cpu_reset; mach_sched_init = hw_timer_init; m5407_timers_init(); - m5407_uarts_init(); /* Only support the external interrupts on their primary level */ mcf_mapirq2imr(25, MCFINTC_EINT1); diff --git a/arch/m68k/platform/coldfire/device.c b/arch/m68k/platform/coldfire/device.c index c9506907872f..b9301920afbf 100644 --- a/arch/m68k/platform/coldfire/device.c +++ b/arch/m68k/platform/coldfire/device.c @@ -50,8 +50,28 @@ static struct platform_device *mcf_devices[] __initdata = { &mcf_uart, }; + +/* + * Some ColdFire UARTs let you set the IRQ line to use. + */ +static void __init mcf_uart_set_irq(void) +{ +#ifdef MCFUART_UIVR + /* UART0 interrupt setup */ + writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR); + writeb(MCF_IRQ_UART0, MCFUART_BASE0 + MCFUART_UIVR); + mcf_mapirq2imr(MCF_IRQ_UART0, MCFINTC_UART0); + + /* UART1 interrupt setup */ + writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR); + writeb(MCF_IRQ_UART1, MCFUART_BASE1 + MCFUART_UIVR); + mcf_mapirq2imr(MCF_IRQ_UART1, MCFINTC_UART1); +#endif +} + static int __init mcf_init_devices(void) { + mcf_uart_set_irq(); platform_add_devices(mcf_devices, ARRAY_SIZE(mcf_devices)); return 0; } -- cgit v1.2.3-59-g8ed1b From d4e08372e385169fdd3cb8cccd1f37892fd216d9 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Sat, 24 Dec 2011 10:05:34 +1000 Subject: m68knommu: make 520x FEC platform addressing consistent If we make all FEC (ethernet) addressing consistent across all ColdFire family members then we will be able to remove the duplicated plaform data and use a single setup for all. So modify the ColdFire 520x FEC addressing so that: . FECs are numbered from 0 up . base addresses are absolute (not relative to MBAR peripheral register) . use a common name for IRQs used Signed-off-by: Greg Ungerer --- arch/m68k/include/asm/m520xsim.h | 11 +++++++++-- arch/m68k/platform/520x/config.c | 16 ++++++++-------- 2 files changed, 17 insertions(+), 10 deletions(-) (limited to 'arch') diff --git a/arch/m68k/include/asm/m520xsim.h b/arch/m68k/include/asm/m520xsim.h index 41ed4dc8d736..b83cee2dfdac 100644 --- a/arch/m68k/include/asm/m520xsim.h +++ b/arch/m68k/include/asm/m520xsim.h @@ -48,12 +48,19 @@ #define MCFINT_UART1 27 /* Interrupt number for UART1 */ #define MCFINT_UART2 28 /* Interrupt number for UART2 */ #define MCFINT_QSPI 31 /* Interrupt number for QSPI */ +#define MCFINT_FECRX0 36 /* Interrupt number for FEC RX */ +#define MCFINT_FECTX0 40 /* Interrupt number for FEC RX */ +#define MCFINT_FECENTC0 42 /* Interrupt number for FEC RX */ #define MCFINT_PIT1 4 /* Interrupt number for PIT1 (PIT0 in processor) */ #define MCF_IRQ_UART0 (MCFINT_VECBASE + MCFINT_UART0) #define MCF_IRQ_UART1 (MCFINT_VECBASE + MCFINT_UART1) #define MCF_IRQ_UART2 (MCFINT_VECBASE + MCFINT_UART2) +#define MCF_IRQ_FECRX0 (MCFINT_VECBASE + MCFINT_FECRX0) +#define MCF_IRQ_FECTX0 (MCFINT_VECBASE + MCFINT_FECTX0) +#define MCF_IRQ_FECENTC0 (MCFINT_VECBASE + MCFINT_FECENTC0) + /* * SDRAM configuration registers. */ @@ -155,8 +162,8 @@ /* * FEC module. */ -#define MCFFEC_BASE 0xFC030000 /* Base of FEC ethernet */ -#define MCFFEC_SIZE 0x800 /* Register set size */ +#define MCFFEC_BASE0 0xFC030000 /* Base of FEC ethernet */ +#define MCFFEC_SIZE0 0x800 /* Register set size */ /* * Reset Control Unit. diff --git a/arch/m68k/platform/520x/config.c b/arch/m68k/platform/520x/config.c index 3af397262115..5111902cb274 100644 --- a/arch/m68k/platform/520x/config.c +++ b/arch/m68k/platform/520x/config.c @@ -27,23 +27,23 @@ static struct resource m520x_fec_resources[] = { { - .start = MCFFEC_BASE, - .end = MCFFEC_BASE + MCFFEC_SIZE - 1, + .start = MCFFEC_BASE0, + .end = MCFFEC_BASE0 + MCFFEC_SIZE0 - 1, .flags = IORESOURCE_MEM, }, { - .start = 64 + 36, - .end = 64 + 36, + .start = MCF_IRQ_FEXRX0, + .end = MCF_IRQ_FECRX0, .flags = IORESOURCE_IRQ, }, { - .start = 64 + 40, - .end = 64 + 40, + .start = MCF_IRQ_FECTX0, + .end = MCF_IRQ_FECTX0, .flags = IORESOURCE_IRQ, }, { - .start = 64 + 42, - .end = 64 + 42, + .start = MCF_IRQ_FECENTC0, + .end = MCF_IRQ_FECENTC0, .flags = IORESOURCE_IRQ, }, }; -- cgit v1.2.3-59-g8ed1b From 21634593b42308631788359cba9d7671383ae762 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Sat, 24 Dec 2011 10:10:13 +1000 Subject: m68knommu: make 523x FEC platform addressing consistent If we make all FEC (ethernet) addressing consistent across all ColdFire family members then we will be able to remove the duplicated plaform data and use a single setup for all. So modify the ColdFire 523x FEC addressing so that: . FECs are numbered from 0 up . base addresses are absolute (not relative to MBAR peripheral register) . use a common name for IRQs used Signed-off-by: Greg Ungerer --- arch/m68k/include/asm/m523xsim.h | 13 ++++++++++--- arch/m68k/platform/523x/config.c | 16 ++++++++-------- 2 files changed, 18 insertions(+), 11 deletions(-) (limited to 'arch') diff --git a/arch/m68k/include/asm/m523xsim.h b/arch/m68k/include/asm/m523xsim.h index 919d115bd167..e1988dd372fe 100644 --- a/arch/m68k/include/asm/m523xsim.h +++ b/arch/m68k/include/asm/m523xsim.h @@ -37,13 +37,20 @@ #define MCFINT_UART0 13 /* Interrupt number for UART0 */ #define MCFINT_UART1 14 /* Interrupt number for UART1 */ #define MCFINT_UART2 15 /* Interrupt number for UART2 */ -#define MCFINT_PIT1 36 /* Interrupt number for PIT1 */ #define MCFINT_QSPI 18 /* Interrupt number for QSPI */ +#define MCFINT_FECRX0 23 /* Interrupt number for FEC */ +#define MCFINT_FECTX0 27 /* Interrupt number for FEC */ +#define MCFINT_FECENTC0 29 /* Interrupt number for FEC */ +#define MCFINT_PIT1 36 /* Interrupt number for PIT1 */ #define MCF_IRQ_UART0 (MCFINT_VECBASE + MCFINT_UART0) #define MCF_IRQ_UART1 (MCFINT_VECBASE + MCFINT_UART1) #define MCF_IRQ_UART2 (MCFINT_VECBASE + MCFINT_UART2) +#define MCF_IRQ_FECRX0 (MCFINT_VECBASE + MCFINT_FECRX0) +#define MCF_IRQ_FECTX0 (MCFINT_VECBASE + MCFINT_FECTX0) +#define MCF_IRQ_FECENTC0 (MCFINT_VECBASE + MCFINT_FECENTC0) + /* * SDRAM configuration registers. */ @@ -72,8 +79,8 @@ /* * FEC ethernet module. */ -#define MCFFEC_BASE (MCF_IPSBAR + 0x1000) -#define MCFFEC_SIZE 0x800 +#define MCFFEC_BASE0 (MCF_IPSBAR + 0x1000) +#define MCFFEC_SIZE0 0x800 /* * GPIO module. diff --git a/arch/m68k/platform/523x/config.c b/arch/m68k/platform/523x/config.c index ef46009540e5..2a1dcade0c02 100644 --- a/arch/m68k/platform/523x/config.c +++ b/arch/m68k/platform/523x/config.c @@ -28,23 +28,23 @@ static struct resource m523x_fec_resources[] = { { - .start = MCFFEC_BASE, - .end = MCFFEC_BASE + MCFFEC_SIZE - 1, + .start = MCFFEC_BASE0, + .end = MCFFEC_BASE0 + MCFFEC_SIZE0 - 1, .flags = IORESOURCE_MEM, }, { - .start = 64 + 23, - .end = 64 + 23, + .start = MCF_IRQ_FECRX0, + .end = MCF_IRQ_FECRX0, .flags = IORESOURCE_IRQ, }, { - .start = 64 + 27, - .end = 64 + 27, + .start = MCF_IRQ_FECTX0, + .end = MCF_IRQ_FECTX0, .flags = IORESOURCE_IRQ, }, { - .start = 64 + 29, - .end = 64 + 29, + .start = MCF_IRQ_FECENTC0, + .end = MCF_IRQ_FECENTC0, .flags = IORESOURCE_IRQ, }, }; -- cgit v1.2.3-59-g8ed1b From 9a11b493edcc4b740bac5ccbe9167e4ef12e4668 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Sat, 24 Dec 2011 10:13:36 +1000 Subject: m68knommu: make 5272 FEC platform addressing consistent If we make all FEC (ethernet) addressing consistent across all ColdFire family members then we will be able to remove the duplicated plaform data and use a single setup for all. So modify the ColdFire 5272 FEC addressing so that: . FECs are numbered from 0 up . base addresses are absolute (not relative to MBAR peripheral register) . use a common name for IRQs used Signed-off-by: Greg Ungerer --- arch/m68k/include/asm/m5272sim.h | 9 ++++++--- arch/m68k/platform/5272/config.c | 16 ++++++++-------- 2 files changed, 14 insertions(+), 11 deletions(-) (limited to 'arch') diff --git a/arch/m68k/include/asm/m5272sim.h b/arch/m68k/include/asm/m5272sim.h index 5c71bd4c746d..a58f1760d858 100644 --- a/arch/m68k/include/asm/m5272sim.h +++ b/arch/m68k/include/asm/m5272sim.h @@ -88,6 +88,9 @@ #define MCFTIMER_BASE3 (MCF_MBAR + 0x240) /* Base address TIMER4 */ #define MCFTIMER_BASE4 (MCF_MBAR + 0x260) /* Base address TIMER3 */ +#define MCFFEC_BASE0 (MCF_MBAR + 0x840) /* Base FEC ethernet */ +#define MCFFEC_SIZE0 0x1d0 + /* * Define system peripheral IRQ usage. */ @@ -114,9 +117,9 @@ #define MCF_IRQ_USB6 83 /* USB Endpoint 6 */ #define MCF_IRQ_USB7 84 /* USB Endpoint 7 */ #define MCF_IRQ_DMA 85 /* DMA Controller */ -#define MCF_IRQ_ERX 86 /* Ethernet Receiver */ -#define MCF_IRQ_ETX 87 /* Ethernet Transmitter */ -#define MCF_IRQ_ENTC 88 /* Ethernet Non-Time Critical */ +#define MCF_IRQ_FECRX0 86 /* Ethernet Receiver */ +#define MCF_IRQ_FECTX0 87 /* Ethernet Transmitter */ +#define MCF_IRQ_FECENTC0 88 /* Ethernet Non-Time Critical */ #define MCF_IRQ_QSPI 89 /* Queued Serial Interface */ #define MCF_IRQ_EINT5 90 /* External Interrupt 5 */ #define MCF_IRQ_EINT6 91 /* External Interrupt 6 */ diff --git a/arch/m68k/platform/5272/config.c b/arch/m68k/platform/5272/config.c index c7c2c422a1fc..4b6bc60baee3 100644 --- a/arch/m68k/platform/5272/config.c +++ b/arch/m68k/platform/5272/config.c @@ -32,23 +32,23 @@ unsigned char ledbank = 0xff; static struct resource m5272_fec_resources[] = { { - .start = MCF_MBAR + 0x840, - .end = MCF_MBAR + 0x840 + 0x1cf, + .start = MCFFEC_BASE0, + .end = MCFFEC_BASE0 + MCFFEC_SIZE0 - 1, .flags = IORESOURCE_MEM, }, { - .start = MCF_IRQ_ERX, - .end = MCF_IRQ_ERX, + .start = MCF_IRQ_FECRX0, + .end = MCF_IRQ_FECRX0, .flags = IORESOURCE_IRQ, }, { - .start = MCF_IRQ_ETX, - .end = MCF_IRQ_ETX, + .start = MCF_IRQ_FECTX0, + .end = MCF_IRQ_FECTX0, .flags = IORESOURCE_IRQ, }, { - .start = MCF_IRQ_ENTC, - .end = MCF_IRQ_ENTC, + .start = MCF_IRQ_FECENTC0, + .end = MCF_IRQ_FECENTC0, .flags = IORESOURCE_IRQ, }, }; -- cgit v1.2.3-59-g8ed1b From 308bfc12ddfd6b812a13d784b012e5d04fba9394 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Sat, 24 Dec 2011 10:17:42 +1000 Subject: m68knommu: make 527x FEC platform addressing consistent If we make all FEC (ethernet) addressing consistent across all ColdFire family members then we will be able to remove the duplicated plaform data and use a single setup for all. So modify the ColdFire 527x FEC addressing so that: . FECs are numbered from 0 up . base addresses are absolute (not relative to MBAR peripheral register) . use a common name for IRQs used Signed-off-by: Greg Ungerer --- arch/m68k/include/asm/m527xsim.h | 15 +++++++++++++++ arch/m68k/platform/527x/config.c | 24 ++++++++++++------------ 2 files changed, 27 insertions(+), 12 deletions(-) (limited to 'arch') diff --git a/arch/m68k/include/asm/m527xsim.h b/arch/m68k/include/asm/m527xsim.h index 7399968b2efe..59bb776a5e3c 100644 --- a/arch/m68k/include/asm/m527xsim.h +++ b/arch/m68k/include/asm/m527xsim.h @@ -38,12 +38,27 @@ #define MCFINT_UART1 14 /* Interrupt number for UART1 */ #define MCFINT_UART2 15 /* Interrupt number for UART2 */ #define MCFINT_QSPI 18 /* Interrupt number for QSPI */ +#define MCFINT_FECRX0 23 /* Interrupt number for FEC0 */ +#define MCFINT_FECTX0 27 /* Interrupt number for FEC0 */ +#define MCFINT_FECENTC0 29 /* Interrupt number for FEC0 */ #define MCFINT_PIT1 36 /* Interrupt number for PIT1 */ +#define MCFINT2_VECBASE 128 /* Vector base number 2 */ +#define MCFINT2_FECRX1 23 /* Interrupt number for FEC1 */ +#define MCFINT2_FECTX1 27 /* Interrupt number for FEC1 */ +#define MCFINT2_FECENTC1 29 /* Interrupt number for FEC1 */ + #define MCF_IRQ_UART0 (MCFINT_VECBASE + MCFINT_UART0) #define MCF_IRQ_UART1 (MCFINT_VECBASE + MCFINT_UART1) #define MCF_IRQ_UART2 (MCFINT_VECBASE + MCFINT_UART2) +#define MCF_IRQ_FECRX0 (MCFINT_VECBASE + MCFINT_FECRX0) +#define MCF_IRQ_FECTX0 (MCFINT_VECBASE + MCFINT_FECTX0) +#define MCF_IRQ_FECENTC0 (MCFINT_VECBASE + MCFINT_FECENTC0) +#define MCF_IRQ_FECRX1 (MCFINT2_VECBASE + MCFINT2_FECRX1) +#define MCF_IRQ_FECTX1 (MCFINT2_VECBASE + MCFINT2_FECTX1) +#define MCF_IRQ_FECENTC1 (MCFINT2_VECBASE + MCFINT2_FECENTC1) + /* * SDRAM configuration registers. */ diff --git a/arch/m68k/platform/527x/config.c b/arch/m68k/platform/527x/config.c index f05fbe01e740..461325a3af94 100644 --- a/arch/m68k/platform/527x/config.c +++ b/arch/m68k/platform/527x/config.c @@ -33,18 +33,18 @@ static struct resource m527x_fec0_resources[] = { .flags = IORESOURCE_MEM, }, { - .start = 64 + 23, - .end = 64 + 23, + .start = MCF_IRQ_FECRX0, + .end = MCF_IRQ_FECRX0, .flags = IORESOURCE_IRQ, }, { - .start = 64 + 27, - .end = 64 + 27, + .start = MCF_IRQ_FECTX0, + .end = MCF_IRQ_FECTX0, .flags = IORESOURCE_IRQ, }, { - .start = 64 + 29, - .end = 64 + 29, + .start = MCF_IRQ_FECENTC0, + .end = MCF_IRQ_FECENTC0, .flags = IORESOURCE_IRQ, }, }; @@ -56,18 +56,18 @@ static struct resource m527x_fec1_resources[] = { .flags = IORESOURCE_MEM, }, { - .start = 128 + 23, - .end = 128 + 23, + .start = MCF_IRQ_FECRX1, + .end = MCF_IRQ_FECRX1, .flags = IORESOURCE_IRQ, }, { - .start = 128 + 27, - .end = 128 + 27, + .start = MCF_IRQ_FECTX1, + .end = MCF_IRQ_FECTX1, .flags = IORESOURCE_IRQ, }, { - .start = 128 + 29, - .end = 128 + 29, + .start = MCF_IRQ_FECENTC1, + .end = MCF_IRQ_FECENTC1, .flags = IORESOURCE_IRQ, }, }; -- cgit v1.2.3-59-g8ed1b From 4f8f9fb8cbb759207ff2437b904c77565180ee5a Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Sat, 24 Dec 2011 10:20:02 +1000 Subject: m68knommu: make 528x FEC platform addressing consistent If we make all FEC (ethernet) addressing consistent across all ColdFire family members then we will be able to remove the duplicated plaform data and use a single setup for all. So modify the ColdFire 528x FEC addressing so that: . FECs are numbered from 0 up . base addresses are absolute (not relative to MBAR peripheral register) . use a common name for IRQs used Signed-off-by: Greg Ungerer --- arch/m68k/include/asm/m528xsim.h | 11 +++++++++-- arch/m68k/platform/528x/config.c | 16 ++++++++-------- 2 files changed, 17 insertions(+), 10 deletions(-) (limited to 'arch') diff --git a/arch/m68k/include/asm/m528xsim.h b/arch/m68k/include/asm/m528xsim.h index a5f0c14b47dd..a363c648b97b 100644 --- a/arch/m68k/include/asm/m528xsim.h +++ b/arch/m68k/include/asm/m528xsim.h @@ -38,12 +38,19 @@ #define MCFINT_UART1 14 /* Interrupt number for UART1 */ #define MCFINT_UART2 15 /* Interrupt number for UART2 */ #define MCFINT_QSPI 18 /* Interrupt number for QSPI */ +#define MCFINT_FECRX0 23 /* Interrupt number for FEC */ +#define MCFINT_FECTX0 27 /* Interrupt number for FEC */ +#define MCFINT_FECENTC0 29 /* Interrupt number for FEC */ #define MCFINT_PIT1 55 /* Interrupt number for PIT1 */ #define MCF_IRQ_UART0 (MCFINT_VECBASE + MCFINT_UART0) #define MCF_IRQ_UART1 (MCFINT_VECBASE + MCFINT_UART1) #define MCF_IRQ_UART2 (MCFINT_VECBASE + MCFINT_UART2) +#define MCF_IRQ_FECRX0 (MCFINT_VECBASE + MCFINT_FECRX0) +#define MCF_IRQ_FECTX0 (MCFINT_VECBASE + MCFINT_FECTX0) +#define MCF_IRQ_FECENTC0 (MCFINT_VECBASE + MCFINT_FECENTC0) + /* * SDRAM configuration registers. */ @@ -71,8 +78,8 @@ /* * FEC ethernet module. */ -#define MCFFEC_BASE (MCF_IPSBAR + 0x00001000) -#define MCFFEC_SIZE 0x800 +#define MCFFEC_BASE0 (MCF_IPSBAR + 0x00001000) +#define MCFFEC_SIZE0 0x800 /* * GPIO registers diff --git a/arch/m68k/platform/528x/config.c b/arch/m68k/platform/528x/config.c index f75ee8bf5e35..39fc3c16388d 100644 --- a/arch/m68k/platform/528x/config.c +++ b/arch/m68k/platform/528x/config.c @@ -29,23 +29,23 @@ static struct resource m528x_fec_resources[] = { { - .start = MCFFEC_BASE, - .end = MCFFEC_BASE + MCFFEC_SIZE - 1, + .start = MCFFEC_BASE0, + .end = MCFFEC_BASE0 + MCFFEC_SIZE0 - 1, .flags = IORESOURCE_MEM, }, { - .start = 64 + 23, - .end = 64 + 23, + .start = MCF_IRQ_FECRX0, + .end = MCF_IRQ_FECRX0, .flags = IORESOURCE_IRQ, }, { - .start = 64 + 27, - .end = 64 + 27, + .start = MCF_IRQ_FECTX0, + .end = MCF_IRQ_FECTX0, .flags = IORESOURCE_IRQ, }, { - .start = 64 + 29, - .end = 64 + 29, + .start = MCF_IRQ_FECENTC0, + .end = MCF_IRQ_FECENTC0, .flags = IORESOURCE_IRQ, }, }; -- cgit v1.2.3-59-g8ed1b From 504695479ecce2a89955b52c332b0eeec75be8e8 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Sat, 24 Dec 2011 10:23:01 +1000 Subject: m68knommu: make 532x FEC platform addressing consistent If we make all FEC (ethernet) addressing consistent across all ColdFire family members then we will be able to remove the duplicated plaform data and use a single setup for all. So modify the ColdFire 532x FEC addressing so that: . FECs are numbered from 0 up . base addresses are absolute (not relative to MBAR peripheral register) . use a common name for IRQs used Signed-off-by: Greg Ungerer --- arch/m68k/include/asm/m532xsim.h | 13 +++++++++++++ arch/m68k/platform/532x/config.c | 16 ++++++++-------- 2 files changed, 21 insertions(+), 8 deletions(-) (limited to 'arch') diff --git a/arch/m68k/include/asm/m532xsim.h b/arch/m68k/include/asm/m532xsim.h index f963d64c94e3..f1c4fa80657d 100644 --- a/arch/m68k/include/asm/m532xsim.h +++ b/arch/m68k/include/asm/m532xsim.h @@ -24,11 +24,18 @@ #define MCFINT_UART1 27 /* Interrupt number for UART1 */ #define MCFINT_UART2 28 /* Interrupt number for UART2 */ #define MCFINT_QSPI 31 /* Interrupt number for QSPI */ +#define MCFINT_FECRX0 36 /* Interrupt number for FEC */ +#define MCFINT_FECTX0 40 /* Interrupt number for FEC */ +#define MCFINT_FECENTC0 42 /* Interrupt number for FEC */ #define MCF_IRQ_UART0 (MCFINT_VECBASE + MCFINT_UART0) #define MCF_IRQ_UART1 (MCFINT_VECBASE + MCFINT_UART1) #define MCF_IRQ_UART2 (MCFINT_VECBASE + MCFINT_UART2) +#define MCF_IRQ_FECRX0 (MCFINT_VECBASE + MCFINT_FECRX0) +#define MCF_IRQ_FECTX0 (MCFINT_VECBASE + MCFINT_FECTX0) +#define MCF_IRQ_FECENTC0 (MCFINT_VECBASE + MCFINT_FECENTC0) + #define MCF_WTM_WCR MCF_REG16(0xFC098000) /* @@ -90,6 +97,12 @@ #define MCFUART_BASE1 0xFC064000 /* Base address of UART2 */ #define MCFUART_BASE2 0xFC068000 /* Base address of UART3 */ +/* + * FEC module. + */ +#define MCFFEC_BASE0 0xFC030000 /* Base address of FEC0 */ +#define MCFFEC_SIZE0 0x800 /* Size of FEC0 region */ + /* * Timer module. */ diff --git a/arch/m68k/platform/532x/config.c b/arch/m68k/platform/532x/config.c index 24b4c0de628b..4831f7a6b8dc 100644 --- a/arch/m68k/platform/532x/config.c +++ b/arch/m68k/platform/532x/config.c @@ -35,23 +35,23 @@ static struct resource m532x_fec_resources[] = { { - .start = 0xfc030000, - .end = 0xfc0307ff, + .start = MCFFEC_BASE0, + .end = MCFFEC_BASE0 + MCFFEC_SIZE0 - 1, .flags = IORESOURCE_MEM, }, { - .start = 64 + 36, - .end = 64 + 36, + .start = MCF_IRQ_FECRX0, + .end = MCF_IRQ_FECRX0, .flags = IORESOURCE_IRQ, }, { - .start = 64 + 40, - .end = 64 + 40, + .start = MCF_IRQ_FECTX0, + .end = MCF_IRQ_FECTX0, .flags = IORESOURCE_IRQ, }, { - .start = 64 + 42, - .end = 64 + 42, + .start = MCF_IRQ_FECENTC0, + .end = MCF_IRQ_FECENTC0, .flags = IORESOURCE_IRQ, }, }; -- cgit v1.2.3-59-g8ed1b From b7ce7f0d0efc1a95154fa6872d5d7c970d281c71 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Sat, 24 Dec 2011 10:30:36 +1000 Subject: m68knommu: merge common ColdFire FEC platform setup code The ColdFire FEC is common to quite a few ColdFire CPUs. No need to duplicate its platform setup code for every CPU family member that has it. Merge all the setup code into a single shared file. Signed-off-by: Greg Ungerer --- arch/m68k/platform/520x/config.c | 31 -------------- arch/m68k/platform/523x/config.c | 31 -------------- arch/m68k/platform/5272/config.c | 37 ----------------- arch/m68k/platform/527x/config.c | 65 ------------------------------ arch/m68k/platform/528x/config.c | 31 -------------- arch/m68k/platform/532x/config.c | 31 -------------- arch/m68k/platform/coldfire/device.c | 78 ++++++++++++++++++++++++++++++++++++ 7 files changed, 78 insertions(+), 226 deletions(-) (limited to 'arch') diff --git a/arch/m68k/platform/520x/config.c b/arch/m68k/platform/520x/config.c index 5111902cb274..5746fa52ed56 100644 --- a/arch/m68k/platform/520x/config.c +++ b/arch/m68k/platform/520x/config.c @@ -25,36 +25,6 @@ /***************************************************************************/ -static struct resource m520x_fec_resources[] = { - { - .start = MCFFEC_BASE0, - .end = MCFFEC_BASE0 + MCFFEC_SIZE0 - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = MCF_IRQ_FEXRX0, - .end = MCF_IRQ_FECRX0, - .flags = IORESOURCE_IRQ, - }, - { - .start = MCF_IRQ_FECTX0, - .end = MCF_IRQ_FECTX0, - .flags = IORESOURCE_IRQ, - }, - { - .start = MCF_IRQ_FECENTC0, - .end = MCF_IRQ_FECENTC0, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device m520x_fec = { - .name = "fec", - .id = 0, - .num_resources = ARRAY_SIZE(m520x_fec_resources), - .resource = m520x_fec_resources, -}; - #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) static struct resource m520x_qspi_resources[] = { { @@ -196,7 +166,6 @@ static void __init m520x_qspi_init(void) static struct platform_device *m520x_devices[] __initdata = { - &m520x_fec, #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) &m520x_qspi, #endif diff --git a/arch/m68k/platform/523x/config.c b/arch/m68k/platform/523x/config.c index 2a1dcade0c02..900d35c49ebf 100644 --- a/arch/m68k/platform/523x/config.c +++ b/arch/m68k/platform/523x/config.c @@ -26,36 +26,6 @@ /***************************************************************************/ -static struct resource m523x_fec_resources[] = { - { - .start = MCFFEC_BASE0, - .end = MCFFEC_BASE0 + MCFFEC_SIZE0 - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = MCF_IRQ_FECRX0, - .end = MCF_IRQ_FECRX0, - .flags = IORESOURCE_IRQ, - }, - { - .start = MCF_IRQ_FECTX0, - .end = MCF_IRQ_FECTX0, - .flags = IORESOURCE_IRQ, - }, - { - .start = MCF_IRQ_FECENTC0, - .end = MCF_IRQ_FECENTC0, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device m523x_fec = { - .name = "fec", - .id = 0, - .num_resources = ARRAY_SIZE(m523x_fec_resources), - .resource = m523x_fec_resources, -}; - #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) static struct resource m523x_qspi_resources[] = { { @@ -258,7 +228,6 @@ void __init config_BSP(char *commandp, int size) static int __init init_BSP(void) { - m523x_fec_init(); #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) m523x_qspi_init(); #endif diff --git a/arch/m68k/platform/5272/config.c b/arch/m68k/platform/5272/config.c index 4b6bc60baee3..e68bc7a148eb 100644 --- a/arch/m68k/platform/5272/config.c +++ b/arch/m68k/platform/5272/config.c @@ -30,42 +30,6 @@ unsigned char ledbank = 0xff; /***************************************************************************/ -static struct resource m5272_fec_resources[] = { - { - .start = MCFFEC_BASE0, - .end = MCFFEC_BASE0 + MCFFEC_SIZE0 - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = MCF_IRQ_FECRX0, - .end = MCF_IRQ_FECRX0, - .flags = IORESOURCE_IRQ, - }, - { - .start = MCF_IRQ_FECTX0, - .end = MCF_IRQ_FECTX0, - .flags = IORESOURCE_IRQ, - }, - { - .start = MCF_IRQ_FECENTC0, - .end = MCF_IRQ_FECENTC0, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device m5272_fec = { - .name = "fec", - .id = 0, - .num_resources = ARRAY_SIZE(m5272_fec_resources), - .resource = m5272_fec_resources, -}; - -static struct platform_device *m5272_devices[] __initdata = { - &m5272_fec, -}; - -/***************************************************************************/ - static void __init m5272_uarts_init(void) { u32 v; @@ -138,7 +102,6 @@ static int __init init_BSP(void) { m5272_uarts_init(); fixed_phy_add(PHY_POLL, 0, &nettel_fixed_phy_status); - platform_add_devices(m5272_devices, ARRAY_SIZE(m5272_devices)); return 0; } diff --git a/arch/m68k/platform/527x/config.c b/arch/m68k/platform/527x/config.c index 461325a3af94..018ac69ef242 100644 --- a/arch/m68k/platform/527x/config.c +++ b/arch/m68k/platform/527x/config.c @@ -26,67 +26,6 @@ /***************************************************************************/ -static struct resource m527x_fec0_resources[] = { - { - .start = MCFFEC_BASE0, - .end = MCFFEC_BASE0 + MCFFEC_SIZE0 - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = MCF_IRQ_FECRX0, - .end = MCF_IRQ_FECRX0, - .flags = IORESOURCE_IRQ, - }, - { - .start = MCF_IRQ_FECTX0, - .end = MCF_IRQ_FECTX0, - .flags = IORESOURCE_IRQ, - }, - { - .start = MCF_IRQ_FECENTC0, - .end = MCF_IRQ_FECENTC0, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct resource m527x_fec1_resources[] = { - { - .start = MCFFEC_BASE1, - .end = MCFFEC_BASE1 + MCFFEC_SIZE1 - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = MCF_IRQ_FECRX1, - .end = MCF_IRQ_FECRX1, - .flags = IORESOURCE_IRQ, - }, - { - .start = MCF_IRQ_FECTX1, - .end = MCF_IRQ_FECTX1, - .flags = IORESOURCE_IRQ, - }, - { - .start = MCF_IRQ_FECENTC1, - .end = MCF_IRQ_FECENTC1, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device m527x_fec[] = { - { - .name = "fec", - .id = 0, - .num_resources = ARRAY_SIZE(m527x_fec0_resources), - .resource = m527x_fec0_resources, - }, - { - .name = "fec", - .id = 1, - .num_resources = ARRAY_SIZE(m527x_fec1_resources), - .resource = m527x_fec1_resources, - }, -}; - #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) static struct resource m527x_qspi_resources[] = { { @@ -261,10 +200,6 @@ static void __init m527x_qspi_init(void) #endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */ static struct platform_device *m527x_devices[] __initdata = { - &m527x_fec[0], -#ifdef CONFIG_FEC2 - &m527x_fec[1], -#endif #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) &m527x_qspi, #endif diff --git a/arch/m68k/platform/528x/config.c b/arch/m68k/platform/528x/config.c index 39fc3c16388d..3e015dc00c8e 100644 --- a/arch/m68k/platform/528x/config.c +++ b/arch/m68k/platform/528x/config.c @@ -27,36 +27,6 @@ /***************************************************************************/ -static struct resource m528x_fec_resources[] = { - { - .start = MCFFEC_BASE0, - .end = MCFFEC_BASE0 + MCFFEC_SIZE0 - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = MCF_IRQ_FECRX0, - .end = MCF_IRQ_FECRX0, - .flags = IORESOURCE_IRQ, - }, - { - .start = MCF_IRQ_FECTX0, - .end = MCF_IRQ_FECTX0, - .flags = IORESOURCE_IRQ, - }, - { - .start = MCF_IRQ_FECENTC0, - .end = MCF_IRQ_FECENTC0, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device m528x_fec = { - .name = "fec", - .id = 0, - .num_resources = ARRAY_SIZE(m528x_fec_resources), - .resource = m528x_fec_resources, -}; - #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) static struct resource m528x_qspi_resources[] = { { @@ -187,7 +157,6 @@ static void __init m528x_qspi_init(void) #endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */ static struct platform_device *m528x_devices[] __initdata = { - &m528x_fec, #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) &m528x_qspi, #endif diff --git a/arch/m68k/platform/532x/config.c b/arch/m68k/platform/532x/config.c index 4831f7a6b8dc..13157ae31905 100644 --- a/arch/m68k/platform/532x/config.c +++ b/arch/m68k/platform/532x/config.c @@ -33,36 +33,6 @@ /***************************************************************************/ -static struct resource m532x_fec_resources[] = { - { - .start = MCFFEC_BASE0, - .end = MCFFEC_BASE0 + MCFFEC_SIZE0 - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = MCF_IRQ_FECRX0, - .end = MCF_IRQ_FECRX0, - .flags = IORESOURCE_IRQ, - }, - { - .start = MCF_IRQ_FECTX0, - .end = MCF_IRQ_FECTX0, - .flags = IORESOURCE_IRQ, - }, - { - .start = MCF_IRQ_FECENTC0, - .end = MCF_IRQ_FECENTC0, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device m532x_fec = { - .name = "fec", - .id = 0, - .num_resources = ARRAY_SIZE(m532x_fec_resources), - .resource = m532x_fec_resources, -}; - #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) static struct resource m532x_qspi_resources[] = { { @@ -179,7 +149,6 @@ static void __init m532x_qspi_init(void) static struct platform_device *m532x_devices[] __initdata = { - &m532x_fec, #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) &m532x_qspi, #endif diff --git a/arch/m68k/platform/coldfire/device.c b/arch/m68k/platform/coldfire/device.c index b9301920afbf..24b0d5e5350a 100644 --- a/arch/m68k/platform/coldfire/device.c +++ b/arch/m68k/platform/coldfire/device.c @@ -16,6 +16,9 @@ #include #include +/* + * All current ColdFire parts contain from 2, 3 or 4 UARTS. + */ static struct mcf_platform_uart mcf_uart_platform_data[] = { { .mapbase = MCFUART_BASE0, @@ -46,8 +49,83 @@ static struct platform_device mcf_uart = { .dev.platform_data = mcf_uart_platform_data, }; +#ifdef CONFIG_FEC +/* + * Some ColdFire cores contain the Fast Ethernet Controller (FEC) + * block. It is Freescale's own hardware block. Some ColdFires + * have 2 of these. + */ +static struct resource mcf_fec0_resources[] = { + { + .start = MCFFEC_BASE0, + .end = MCFFEC_BASE0 + MCFFEC_SIZE0 - 1, + .flags = IORESOURCE_MEM, + }, + { + .start = MCF_IRQ_FECRX0, + .end = MCF_IRQ_FECRX0, + .flags = IORESOURCE_IRQ, + }, + { + .start = MCF_IRQ_FECTX0, + .end = MCF_IRQ_FECTX0, + .flags = IORESOURCE_IRQ, + }, + { + .start = MCF_IRQ_FECENTC0, + .end = MCF_IRQ_FECENTC0, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device mcf_fec0 = { + .name = "fec", + .id = 0, + .num_resources = ARRAY_SIZE(mcf_fec0_resources), + .resource = mcf_fec0_resources, +}; + +#ifdef MCFFEC_BASE1 +static struct resource mcf_fec1_resources[] = { + { + .start = MCFFEC_BASE1, + .end = MCFFEC_BASE1 + MCFFEC_SIZE1 - 1, + .flags = IORESOURCE_MEM, + }, + { + .start = MCF_IRQ_FECRX1, + .end = MCF_IRQ_FECRX1, + .flags = IORESOURCE_IRQ, + }, + { + .start = MCF_IRQ_FECTX1, + .end = MCF_IRQ_FECTX1, + .flags = IORESOURCE_IRQ, + }, + { + .start = MCF_IRQ_FECENTC1, + .end = MCF_IRQ_FECENTC1, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device mcf_fec1 = { + .name = "fec", + .id = 0, + .num_resources = ARRAY_SIZE(mcf_fec1_resources), + .resource = mcf_fec1_resources, +}; +#endif /* MCFFEC_BASE1 */ +#endif /* CONFIG_FEC */ + static struct platform_device *mcf_devices[] __initdata = { &mcf_uart, +#ifdef CONFIG_FEC + &mcf_fec0, +#ifdef MCFFEC_BASE1 + &mcf_fec1, +#endif +#endif }; -- cgit v1.2.3-59-g8ed1b From a4e2e2ac08f73dedeabecb9e1141a05889591b7b Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Sat, 24 Dec 2011 12:32:52 +1000 Subject: m68knommu: make 520x QSPI platform addressing consistent If we make all QSPI (SPI protocol) addressing consistent across all ColdFire family members then we will be able to remove the duplicated plaform data and code and use a single setup for all. So modify the ColdFire 520x QSPI addressing so that: . base addresses are absolute (not relative to MBAR peripheral register) . use a common name for IRQs used . move chip select definitions (CS) to appropriate header Signed-off-by: Greg Ungerer --- arch/m68k/include/asm/m520xsim.h | 12 ++++++++++++ arch/m68k/include/asm/mcfqspi.h | 2 -- arch/m68k/platform/520x/config.c | 12 ++++-------- 3 files changed, 16 insertions(+), 10 deletions(-) (limited to 'arch') diff --git a/arch/m68k/include/asm/m520xsim.h b/arch/m68k/include/asm/m520xsim.h index b83cee2dfdac..17f2aab9cf97 100644 --- a/arch/m68k/include/asm/m520xsim.h +++ b/arch/m68k/include/asm/m520xsim.h @@ -61,6 +61,8 @@ #define MCF_IRQ_FECTX0 (MCFINT_VECBASE + MCFINT_FECTX0) #define MCF_IRQ_FECENTC0 (MCFINT_VECBASE + MCFINT_FECENTC0) +#define MCF_IRQ_QSPI (MCFINT_VECBASE + MCFINT_QSPI) + /* * SDRAM configuration registers. */ @@ -165,6 +167,16 @@ #define MCFFEC_BASE0 0xFC030000 /* Base of FEC ethernet */ #define MCFFEC_SIZE0 0x800 /* Register set size */ +/* + * QSPI module. + */ +#define MCFQSPI_BASE 0xFC05C000 /* Base of QSPI module */ +#define MCFQSPI_SIZE 0x40 /* Register set size */ + +#define MCFQSPI_CS0 46 +#define MCFQSPI_CS1 47 +#define MCFQSPI_CS2 27 + /* * Reset Control Unit. */ diff --git a/arch/m68k/include/asm/mcfqspi.h b/arch/m68k/include/asm/mcfqspi.h index 7fe631972f1f..34a531ed2bd1 100644 --- a/arch/m68k/include/asm/mcfqspi.h +++ b/arch/m68k/include/asm/mcfqspi.h @@ -25,8 +25,6 @@ #define MCFQSPI_IOBASE (MCF_IPSBAR + 0x340) #elif defined(CONFIG_M5249) #define MCFQSPI_IOBASE (MCF_MBAR + 0x300) -#elif defined(CONFIG_M520x) -#define MCFQSPI_IOBASE 0xFC05C000 #elif defined(CONFIG_M532x) #define MCFQSPI_IOBASE 0xFC058000 #endif diff --git a/arch/m68k/platform/520x/config.c b/arch/m68k/platform/520x/config.c index 5746fa52ed56..c83fd1a3d47c 100644 --- a/arch/m68k/platform/520x/config.c +++ b/arch/m68k/platform/520x/config.c @@ -28,21 +28,17 @@ #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) static struct resource m520x_qspi_resources[] = { { - .start = MCFQSPI_IOBASE, - .end = MCFQSPI_IOBASE + MCFQSPI_IOSIZE - 1, + .start = MCFQSPI_BASE, + .end = MCFQSPI_BASE + MCFQSPI_SIZE - 1, .flags = IORESOURCE_MEM, }, { - .start = MCFINT_VECBASE + MCFINT_QSPI, - .end = MCFINT_VECBASE + MCFINT_QSPI, + .start = MCF_IRQ_QSPI, + .end = MCF_IRQ_QSPI, .flags = IORESOURCE_IRQ, }, }; -#define MCFQSPI_CS0 46 -#define MCFQSPI_CS1 47 -#define MCFQSPI_CS2 27 - static int m520x_cs_setup(struct mcfqspi_cs_control *cs_control) { int status; -- cgit v1.2.3-59-g8ed1b From 36d175a4b249235927d75fb681484bd97cc4ea41 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Sat, 24 Dec 2011 12:36:38 +1000 Subject: m68knommu: make 523x QSPI platform addressing consistent If we make all QSPI (SPI protocol) addressing consistent across all ColdFire family members then we will be able to remove the duplicated plaform data and code and use a single setup for all. So modify the ColdFire 523x QSPI addressing so that: . base addresses are absolute (not relative to MBAR peripheral register) . use a common name for IRQs used . move chip select definitions (CS) to appropriate header Signed-off-by: Greg Ungerer --- arch/m68k/include/asm/m523xsim.h | 13 +++++++++++++ arch/m68k/include/asm/mcfqspi.h | 2 +- arch/m68k/platform/523x/config.c | 13 ++++--------- 3 files changed, 18 insertions(+), 10 deletions(-) (limited to 'arch') diff --git a/arch/m68k/include/asm/m523xsim.h b/arch/m68k/include/asm/m523xsim.h index e1988dd372fe..f2d21cef094c 100644 --- a/arch/m68k/include/asm/m523xsim.h +++ b/arch/m68k/include/asm/m523xsim.h @@ -51,6 +51,8 @@ #define MCF_IRQ_FECTX0 (MCFINT_VECBASE + MCFINT_FECTX0) #define MCF_IRQ_FECENTC0 (MCFINT_VECBASE + MCFINT_FECENTC0) +#define MCF_IRQ_QSPI (MCFINT_VECBASE + MCFINT_QSPI) + /* * SDRAM configuration registers. */ @@ -82,6 +84,17 @@ #define MCFFEC_BASE0 (MCF_IPSBAR + 0x1000) #define MCFFEC_SIZE0 0x800 +/* + * QSPI module. + */ +#define MCFQSPI_BASE (MCF_IPSBAR + 0x340) +#define MCFQSPI_SIZE 0x40 + +#define MCFQSPI_CS0 91 +#define MCFQSPI_CS1 92 +#define MCFQSPI_CS2 103 +#define MCFQSPI_CS3 99 + /* * GPIO module. */ diff --git a/arch/m68k/include/asm/mcfqspi.h b/arch/m68k/include/asm/mcfqspi.h index 34a531ed2bd1..62148b72825e 100644 --- a/arch/m68k/include/asm/mcfqspi.h +++ b/arch/m68k/include/asm/mcfqspi.h @@ -21,7 +21,7 @@ #ifndef mcfqspi_h #define mcfqspi_h -#if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) +#if defined(CONFIG_M527x) || defined(CONFIG_M528x) #define MCFQSPI_IOBASE (MCF_IPSBAR + 0x340) #elif defined(CONFIG_M5249) #define MCFQSPI_IOBASE (MCF_MBAR + 0x300) diff --git a/arch/m68k/platform/523x/config.c b/arch/m68k/platform/523x/config.c index 900d35c49ebf..bd8a6fd4e993 100644 --- a/arch/m68k/platform/523x/config.c +++ b/arch/m68k/platform/523x/config.c @@ -29,22 +29,17 @@ #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) static struct resource m523x_qspi_resources[] = { { - .start = MCFQSPI_IOBASE, - .end = MCFQSPI_IOBASE + MCFQSPI_IOSIZE - 1, + .start = MCFQSPI_BASE, + .end = MCFQSPI_BASE + MCFQSPI_SIZE - 1, .flags = IORESOURCE_MEM, }, { - .start = MCFINT_VECBASE + MCFINT_QSPI, - .end = MCFINT_VECBASE + MCFINT_QSPI, + .start = MCF_IRQ_QSPI, + .end = MCF_IRQ_QSPI, .flags = IORESOURCE_IRQ, }, }; -#define MCFQSPI_CS0 91 -#define MCFQSPI_CS1 92 -#define MCFQSPI_CS2 103 -#define MCFQSPI_CS3 99 - static int m523x_cs_setup(struct mcfqspi_cs_control *cs_control) { int status; -- cgit v1.2.3-59-g8ed1b From 2424f549020b6f87ea3b6e89fd7bd26ddf1f717b Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Sat, 24 Dec 2011 12:38:40 +1000 Subject: m68knommu: make 5249 QSPI platform addressing consistent If we make all QSPI (SPI protocol) addressing consistent across all ColdFire family members then we will be able to remove the duplicated plaform data and code and use a single setup for all. So modify the ColdFire 5249 QSPI addressing so that: . base addresses are absolute (not relative to MBAR peripheral register) . use a common name for IRQs used . move chip select definitions (CS) to appropriate header Signed-off-by: Greg Ungerer --- arch/m68k/include/asm/m5249sim.h | 11 +++++++++++ arch/m68k/include/asm/mcfqspi.h | 2 -- arch/m68k/platform/5249/config.c | 9 ++------- 3 files changed, 13 insertions(+), 9 deletions(-) (limited to 'arch') diff --git a/arch/m68k/include/asm/m5249sim.h b/arch/m68k/include/asm/m5249sim.h index 3e31508619c1..7f0c2c3660fd 100644 --- a/arch/m68k/include/asm/m5249sim.h +++ b/arch/m68k/include/asm/m5249sim.h @@ -79,6 +79,17 @@ #define MCFUART_BASE0 (MCF_MBAR + 0x1c0) /* Base address UART0 */ #define MCFUART_BASE1 (MCF_MBAR + 0x200) /* Base address UART1 */ +/* + * QSPI module. + */ +#define MCFQSPI_BASE (MCF_MBAR + 0x300) /* Base address QSPI */ +#define MCFQSPI_SIZE 0x40 /* Register set size */ + +#define MCFQSPI_CS0 29 +#define MCFQSPI_CS1 24 +#define MCFQSPI_CS2 21 +#define MCFQSPI_CS3 22 + /* * DMA unit base addresses. */ diff --git a/arch/m68k/include/asm/mcfqspi.h b/arch/m68k/include/asm/mcfqspi.h index 62148b72825e..e9a7e1a2c995 100644 --- a/arch/m68k/include/asm/mcfqspi.h +++ b/arch/m68k/include/asm/mcfqspi.h @@ -23,8 +23,6 @@ #if defined(CONFIG_M527x) || defined(CONFIG_M528x) #define MCFQSPI_IOBASE (MCF_IPSBAR + 0x340) -#elif defined(CONFIG_M5249) -#define MCFQSPI_IOBASE (MCF_MBAR + 0x300) #elif defined(CONFIG_M532x) #define MCFQSPI_IOBASE 0xFC058000 #endif diff --git a/arch/m68k/platform/5249/config.c b/arch/m68k/platform/5249/config.c index 58dc2c9c186d..1e176376010b 100644 --- a/arch/m68k/platform/5249/config.c +++ b/arch/m68k/platform/5249/config.c @@ -48,8 +48,8 @@ static struct platform_device m5249_smc91x = { #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) static struct resource m5249_qspi_resources[] = { { - .start = MCFQSPI_IOBASE, - .end = MCFQSPI_IOBASE + MCFQSPI_IOSIZE - 1, + .start = MCFQSPI_BASE, + .end = MCFQSPI_BASE + MCFQSPI_SIZE - 1, .flags = IORESOURCE_MEM, }, { @@ -59,11 +59,6 @@ static struct resource m5249_qspi_resources[] = { }, }; -#define MCFQSPI_CS0 29 -#define MCFQSPI_CS1 24 -#define MCFQSPI_CS2 21 -#define MCFQSPI_CS3 22 - static int m5249_cs_setup(struct mcfqspi_cs_control *cs_control) { int status; -- cgit v1.2.3-59-g8ed1b From 6c84a60eb98911cb376cf0a340f811401f3b29a4 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Sat, 24 Dec 2011 12:40:37 +1000 Subject: m68knommu: make 527x QSPI platform addressing consistent If we make all QSPI (SPI protocol) addressing consistent across all ColdFire family members then we will be able to remove the duplicated plaform data and code and use a single setup for all. So modify the ColdFire 527x QSPI addressing so that: . base addresses are absolute (not relative to MBAR peripheral register) . use a common name for IRQs used . move chip select definitions (CS) to appropriate header Signed-off-by: Greg Ungerer --- arch/m68k/include/asm/m527xsim.h | 24 ++++++++++++++++++++++++ arch/m68k/include/asm/mcfqspi.h | 2 +- arch/m68k/platform/527x/config.c | 20 ++++---------------- 3 files changed, 29 insertions(+), 17 deletions(-) (limited to 'arch') diff --git a/arch/m68k/include/asm/m527xsim.h b/arch/m68k/include/asm/m527xsim.h index 59bb776a5e3c..f1c5b2c8d447 100644 --- a/arch/m68k/include/asm/m527xsim.h +++ b/arch/m68k/include/asm/m527xsim.h @@ -59,6 +59,8 @@ #define MCF_IRQ_FECTX1 (MCFINT2_VECBASE + MCFINT2_FECTX1) #define MCF_IRQ_FECENTC1 (MCFINT2_VECBASE + MCFINT2_FECENTC1) +#define MCF_IRQ_QSPI (MCFINT_VECBASE + MCFINT_QSPI) + /* * SDRAM configuration registers. */ @@ -103,6 +105,28 @@ #define MCFFEC_BASE1 (MCF_IPSBAR + 0x1800) #define MCFFEC_SIZE1 0x800 +/* + * QSPI module. + */ +#define MCFQSPI_BASE (MCF_IPSBAR + 0x340) +#define MCFQSPI_SIZE 0x40 + +#ifdef CONFIG_M5271 +#define MCFQSPI_CS0 91 +#define MCFQSPI_CS1 92 +#define MCFQSPI_CS2 99 +#define MCFQSPI_CS3 103 +#endif +#ifdef CONFIG_M5275 +#define MCFQSPI_CS0 59 +#define MCFQSPI_CS1 60 +#define MCFQSPI_CS2 61 +#define MCFQSPI_CS3 62 +#endif + +/* + * GPIO module. + */ #ifdef CONFIG_M5271 #define MCFGPIO_PODR_ADDR (MCF_IPSBAR + 0x100000) #define MCFGPIO_PODR_DATAH (MCF_IPSBAR + 0x100001) diff --git a/arch/m68k/include/asm/mcfqspi.h b/arch/m68k/include/asm/mcfqspi.h index e9a7e1a2c995..57fcbc2c0dac 100644 --- a/arch/m68k/include/asm/mcfqspi.h +++ b/arch/m68k/include/asm/mcfqspi.h @@ -21,7 +21,7 @@ #ifndef mcfqspi_h #define mcfqspi_h -#if defined(CONFIG_M527x) || defined(CONFIG_M528x) +#if defined(CONFIG_M528x) #define MCFQSPI_IOBASE (MCF_IPSBAR + 0x340) #elif defined(CONFIG_M532x) #define MCFQSPI_IOBASE 0xFC058000 diff --git a/arch/m68k/platform/527x/config.c b/arch/m68k/platform/527x/config.c index 018ac69ef242..e86ff3a0ba15 100644 --- a/arch/m68k/platform/527x/config.c +++ b/arch/m68k/platform/527x/config.c @@ -29,29 +29,17 @@ #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) static struct resource m527x_qspi_resources[] = { { - .start = MCFQSPI_IOBASE, - .end = MCFQSPI_IOBASE + MCFQSPI_IOSIZE - 1, + .start = MCFQSPI_BASE, + .end = MCFQSPI_BASE + MCFQSPI_SIZE - 1, .flags = IORESOURCE_MEM, }, { - .start = MCFINT_VECBASE + MCFINT_QSPI, - .end = MCFINT_VECBASE + MCFINT_QSPI, + .start = MCF_IRQ_QSPI, + .end = MCF_IRQ_QSPI, .flags = IORESOURCE_IRQ, }, }; -#if defined(CONFIG_M5271) -#define MCFQSPI_CS0 91 -#define MCFQSPI_CS1 92 -#define MCFQSPI_CS2 99 -#define MCFQSPI_CS3 103 -#elif defined(CONFIG_M5275) -#define MCFQSPI_CS0 59 -#define MCFQSPI_CS1 60 -#define MCFQSPI_CS2 61 -#define MCFQSPI_CS3 62 -#endif - static int m527x_cs_setup(struct mcfqspi_cs_control *cs_control) { int status; -- cgit v1.2.3-59-g8ed1b From 3b2039b26619745a736b896caf8df05a2a15df3a Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Sat, 24 Dec 2011 12:42:30 +1000 Subject: m68knommu: make 528x QSPI platform addressing consistent If we make all QSPI (SPI protocol) addressing consistent across all ColdFire family members then we will be able to remove the duplicated plaform data and code and use a single setup for all. So modify the ColdFire 528x QSPI addressing so that: . base addresses are absolute (not relative to MBAR peripheral register) . use a common name for IRQs used . move chip select definitions (CS) to appropriate header Signed-off-by: Greg Ungerer --- arch/m68k/include/asm/m528xsim.h | 13 +++++++++++++ arch/m68k/include/asm/mcfqspi.h | 4 +--- arch/m68k/platform/528x/config.c | 13 ++++--------- 3 files changed, 18 insertions(+), 12 deletions(-) (limited to 'arch') diff --git a/arch/m68k/include/asm/m528xsim.h b/arch/m68k/include/asm/m528xsim.h index a363c648b97b..e4581a4a1035 100644 --- a/arch/m68k/include/asm/m528xsim.h +++ b/arch/m68k/include/asm/m528xsim.h @@ -51,6 +51,8 @@ #define MCF_IRQ_FECTX0 (MCFINT_VECBASE + MCFINT_FECTX0) #define MCF_IRQ_FECENTC0 (MCFINT_VECBASE + MCFINT_FECENTC0) +#define MCF_IRQ_QSPI (MCFINT_VECBASE + MCFINT_QSPI) + /* * SDRAM configuration registers. */ @@ -81,6 +83,17 @@ #define MCFFEC_BASE0 (MCF_IPSBAR + 0x00001000) #define MCFFEC_SIZE0 0x800 +/* + * QSPI module. + */ +#define MCFQSPI_IOBASE (MCF_IPSBAR + 0x340) +#define MCFQSPI_SIZE 0x40 + +#define MCFQSPI_CS0 147 +#define MCFQSPI_CS1 148 +#define MCFQSPI_CS2 149 +#define MCFQSPI_CS3 150 + /* * GPIO registers */ diff --git a/arch/m68k/include/asm/mcfqspi.h b/arch/m68k/include/asm/mcfqspi.h index 57fcbc2c0dac..f3d9640f788d 100644 --- a/arch/m68k/include/asm/mcfqspi.h +++ b/arch/m68k/include/asm/mcfqspi.h @@ -21,9 +21,7 @@ #ifndef mcfqspi_h #define mcfqspi_h -#if defined(CONFIG_M528x) -#define MCFQSPI_IOBASE (MCF_IPSBAR + 0x340) -#elif defined(CONFIG_M532x) +#if defined(CONFIG_M532x) #define MCFQSPI_IOBASE 0xFC058000 #endif #define MCFQSPI_IOSIZE 0x40 diff --git a/arch/m68k/platform/528x/config.c b/arch/m68k/platform/528x/config.c index 3e015dc00c8e..24f5afcf0082 100644 --- a/arch/m68k/platform/528x/config.c +++ b/arch/m68k/platform/528x/config.c @@ -30,22 +30,17 @@ #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) static struct resource m528x_qspi_resources[] = { { - .start = MCFQSPI_IOBASE, - .end = MCFQSPI_IOBASE + MCFQSPI_IOSIZE - 1, + .start = MCFQSPI_BASE, + .end = MCFQSPI_BASE + MCFQSPI_SIZE - 1, .flags = IORESOURCE_MEM, }, { - .start = MCFINT_VECBASE + MCFINT_QSPI, - .end = MCFINT_VECBASE + MCFINT_QSPI, + .start = MCF_IRQ_QSPI, + .end = MCF_IRQ_QSPI, .flags = IORESOURCE_IRQ, }, }; -#define MCFQSPI_CS0 147 -#define MCFQSPI_CS1 148 -#define MCFQSPI_CS2 149 -#define MCFQSPI_CS3 150 - static int m528x_cs_setup(struct mcfqspi_cs_control *cs_control) { int status; -- cgit v1.2.3-59-g8ed1b From ed8a2798f6cff0dc68ca7d5800279525aa310fd0 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Sat, 24 Dec 2011 12:44:45 +1000 Subject: m68knommu: make 532x QSPI platform addressing consistent If we make all QSPI (SPI protocol) addressing consistent across all ColdFire family members then we will be able to remove the duplicated plaform data and code and use a single setup for all. So modify the ColdFire 532x QSPI addressing so that: . base addresses are absolute (not relative to MBAR peripheral register) . use a common name for IRQs used . move chip select definitions (CS) to appropriate header Signed-off-by: Greg Ungerer --- arch/m68k/include/asm/m532xsim.h | 12 ++++++++++++ arch/m68k/include/asm/mcfqspi.h | 5 ----- arch/m68k/platform/532x/config.c | 12 ++++-------- 3 files changed, 16 insertions(+), 13 deletions(-) (limited to 'arch') diff --git a/arch/m68k/include/asm/m532xsim.h b/arch/m68k/include/asm/m532xsim.h index f1c4fa80657d..29b66e21413a 100644 --- a/arch/m68k/include/asm/m532xsim.h +++ b/arch/m68k/include/asm/m532xsim.h @@ -36,6 +36,8 @@ #define MCF_IRQ_FECTX0 (MCFINT_VECBASE + MCFINT_FECTX0) #define MCF_IRQ_FECENTC0 (MCFINT_VECBASE + MCFINT_FECENTC0) +#define MCF_IRQ_QSPI (MCFINT_VECBASE + MCFINT_QSPI) + #define MCF_WTM_WCR MCF_REG16(0xFC098000) /* @@ -103,6 +105,16 @@ #define MCFFEC_BASE0 0xFC030000 /* Base address of FEC0 */ #define MCFFEC_SIZE0 0x800 /* Size of FEC0 region */ +/* + * QSPI module. + */ +#define MCFQSPI_BASE 0xFC058000 /* Base address of QSPI */ +#define MCFQSPI_SIZE 0x40 /* Size of QSPI region */ + +#define MCFQSPI_CS0 84 +#define MCFQSPI_CS1 85 +#define MCFQSPI_CS2 86 + /* * Timer module. */ diff --git a/arch/m68k/include/asm/mcfqspi.h b/arch/m68k/include/asm/mcfqspi.h index f3d9640f788d..7b51416ccae2 100644 --- a/arch/m68k/include/asm/mcfqspi.h +++ b/arch/m68k/include/asm/mcfqspi.h @@ -21,11 +21,6 @@ #ifndef mcfqspi_h #define mcfqspi_h -#if defined(CONFIG_M532x) -#define MCFQSPI_IOBASE 0xFC058000 -#endif -#define MCFQSPI_IOSIZE 0x40 - /** * struct mcfqspi_cs_control - chip select control for the coldfire qspi driver * @setup: setup the control; allocate gpio's, etc. May be NULL. diff --git a/arch/m68k/platform/532x/config.c b/arch/m68k/platform/532x/config.c index 13157ae31905..c8e1395e9344 100644 --- a/arch/m68k/platform/532x/config.c +++ b/arch/m68k/platform/532x/config.c @@ -36,21 +36,17 @@ #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) static struct resource m532x_qspi_resources[] = { { - .start = MCFQSPI_IOBASE, - .end = MCFQSPI_IOBASE + MCFQSPI_IOSIZE - 1, + .start = MCFQSPI_BASE, + .end = MCFQSPI_BASE + MCFQSPI_SIZE - 1, .flags = IORESOURCE_MEM, }, { - .start = MCFINT_VECBASE + MCFINT_QSPI, - .end = MCFINT_VECBASE + MCFINT_QSPI, + .start = MCF_IRQ_QSPI, + .end = MCF_IRQ_QSPI, .flags = IORESOURCE_IRQ, }, }; -#define MCFQSPI_CS0 84 -#define MCFQSPI_CS1 85 -#define MCFQSPI_CS2 86 - static int m532x_cs_setup(struct mcfqspi_cs_control *cs_control) { int status; -- cgit v1.2.3-59-g8ed1b From fa1fc24662d57170259948314b0759376eb75777 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Sat, 24 Dec 2011 12:56:10 +1000 Subject: m68knommu: merge common ColdFire QSPI platform setup code The ColdFire QSPI is common to quite a few ColdFire CPUs. No need to duplicate its platform setup code for every CPU family member that has it. Merge all the setup code into a single shared file. This also results in few platforms no longer needing any local platform setup code. In those cases remove the empty devices array and initcall code as well. Signed-off-by: Greg Ungerer --- arch/m68k/platform/520x/config.c | 146 +------------------------------ arch/m68k/platform/523x/config.c | 157 +-------------------------------- arch/m68k/platform/5249/config.c | 162 ++-------------------------------- arch/m68k/platform/527x/config.c | 165 +---------------------------------- arch/m68k/platform/528x/config.c | 130 +-------------------------- arch/m68k/platform/532x/config.c | 117 +------------------------ arch/m68k/platform/coldfire/device.c | 162 +++++++++++++++++++++++++++++++++- 7 files changed, 185 insertions(+), 854 deletions(-) (limited to 'arch') diff --git a/arch/m68k/platform/520x/config.c b/arch/m68k/platform/520x/config.c index c83fd1a3d47c..6c318dbe158a 100644 --- a/arch/m68k/platform/520x/config.c +++ b/arch/m68k/platform/520x/config.c @@ -15,138 +15,14 @@ #include #include #include -#include -#include #include #include #include #include -#include /***************************************************************************/ -#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) -static struct resource m520x_qspi_resources[] = { - { - .start = MCFQSPI_BASE, - .end = MCFQSPI_BASE + MCFQSPI_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = MCF_IRQ_QSPI, - .end = MCF_IRQ_QSPI, - .flags = IORESOURCE_IRQ, - }, -}; - -static int m520x_cs_setup(struct mcfqspi_cs_control *cs_control) -{ - int status; - - status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0"); - if (status) { - pr_debug("gpio_request for MCFQSPI_CS0 failed\n"); - goto fail0; - } - status = gpio_direction_output(MCFQSPI_CS0, 1); - if (status) { - pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n"); - goto fail1; - } - - status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1"); - if (status) { - pr_debug("gpio_request for MCFQSPI_CS1 failed\n"); - goto fail1; - } - status = gpio_direction_output(MCFQSPI_CS1, 1); - if (status) { - pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n"); - goto fail2; - } - - status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2"); - if (status) { - pr_debug("gpio_request for MCFQSPI_CS2 failed\n"); - goto fail2; - } - status = gpio_direction_output(MCFQSPI_CS2, 1); - if (status) { - pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n"); - goto fail3; - } - - return 0; - -fail3: - gpio_free(MCFQSPI_CS2); -fail2: - gpio_free(MCFQSPI_CS1); -fail1: - gpio_free(MCFQSPI_CS0); -fail0: - return status; -} - -static void m520x_cs_teardown(struct mcfqspi_cs_control *cs_control) -{ - gpio_free(MCFQSPI_CS2); - gpio_free(MCFQSPI_CS1); - gpio_free(MCFQSPI_CS0); -} - -static void m520x_cs_select(struct mcfqspi_cs_control *cs_control, - u8 chip_select, bool cs_high) -{ - switch (chip_select) { - case 0: - gpio_set_value(MCFQSPI_CS0, cs_high); - break; - case 1: - gpio_set_value(MCFQSPI_CS1, cs_high); - break; - case 2: - gpio_set_value(MCFQSPI_CS2, cs_high); - break; - } -} - -static void m520x_cs_deselect(struct mcfqspi_cs_control *cs_control, - u8 chip_select, bool cs_high) -{ - switch (chip_select) { - case 0: - gpio_set_value(MCFQSPI_CS0, !cs_high); - break; - case 1: - gpio_set_value(MCFQSPI_CS1, !cs_high); - break; - case 2: - gpio_set_value(MCFQSPI_CS2, !cs_high); - break; - } -} - -static struct mcfqspi_cs_control m520x_cs_control = { - .setup = m520x_cs_setup, - .teardown = m520x_cs_teardown, - .select = m520x_cs_select, - .deselect = m520x_cs_deselect, -}; - -static struct mcfqspi_platform_data m520x_qspi_data = { - .bus_num = 0, - .num_chipselect = 3, - .cs_control = &m520x_cs_control, -}; - -static struct platform_device m520x_qspi = { - .name = "mcfqspi", - .id = 0, - .num_resources = ARRAY_SIZE(m520x_qspi_resources), - .resource = m520x_qspi_resources, - .dev.platform_data = &m520x_qspi_data, -}; +#ifdef CONFIG_SPI_COLDFIRE_QSPI static void __init m520x_qspi_init(void) { @@ -158,14 +34,8 @@ static void __init m520x_qspi_init(void) par &= 0x00ff; writew(par, MCF_GPIO_PAR_UART); } -#endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */ - -static struct platform_device *m520x_devices[] __initdata = { -#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) - &m520x_qspi, -#endif -}; +#endif /* CONFIG_SPI_COLDFIRE_QSPI */ /***************************************************************************/ @@ -218,19 +88,9 @@ void __init config_BSP(char *commandp, int size) mach_sched_init = hw_timer_init; m520x_uarts_init(); m520x_fec_init(); -#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) +#ifdef CONFIG_SPI_COLDFIRE_QSPI m520x_qspi_init(); #endif } /***************************************************************************/ - -static int __init init_BSP(void) -{ - platform_add_devices(m520x_devices, ARRAY_SIZE(m520x_devices)); - return 0; -} - -arch_initcall(init_BSP); - -/***************************************************************************/ diff --git a/arch/m68k/platform/523x/config.c b/arch/m68k/platform/523x/config.c index bd8a6fd4e993..94e93943cbf8 100644 --- a/arch/m68k/platform/523x/config.c +++ b/arch/m68k/platform/523x/config.c @@ -16,158 +16,14 @@ #include #include #include -#include -#include #include #include #include #include -#include /***************************************************************************/ -#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) -static struct resource m523x_qspi_resources[] = { - { - .start = MCFQSPI_BASE, - .end = MCFQSPI_BASE + MCFQSPI_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = MCF_IRQ_QSPI, - .end = MCF_IRQ_QSPI, - .flags = IORESOURCE_IRQ, - }, -}; - -static int m523x_cs_setup(struct mcfqspi_cs_control *cs_control) -{ - int status; - - status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0"); - if (status) { - pr_debug("gpio_request for MCFQSPI_CS0 failed\n"); - goto fail0; - } - status = gpio_direction_output(MCFQSPI_CS0, 1); - if (status) { - pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n"); - goto fail1; - } - - status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1"); - if (status) { - pr_debug("gpio_request for MCFQSPI_CS1 failed\n"); - goto fail1; - } - status = gpio_direction_output(MCFQSPI_CS1, 1); - if (status) { - pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n"); - goto fail2; - } - - status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2"); - if (status) { - pr_debug("gpio_request for MCFQSPI_CS2 failed\n"); - goto fail2; - } - status = gpio_direction_output(MCFQSPI_CS2, 1); - if (status) { - pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n"); - goto fail3; - } - - status = gpio_request(MCFQSPI_CS3, "MCFQSPI_CS3"); - if (status) { - pr_debug("gpio_request for MCFQSPI_CS3 failed\n"); - goto fail3; - } - status = gpio_direction_output(MCFQSPI_CS3, 1); - if (status) { - pr_debug("gpio_direction_output for MCFQSPI_CS3 failed\n"); - goto fail4; - } - - return 0; - -fail4: - gpio_free(MCFQSPI_CS3); -fail3: - gpio_free(MCFQSPI_CS2); -fail2: - gpio_free(MCFQSPI_CS1); -fail1: - gpio_free(MCFQSPI_CS0); -fail0: - return status; -} - -static void m523x_cs_teardown(struct mcfqspi_cs_control *cs_control) -{ - gpio_free(MCFQSPI_CS3); - gpio_free(MCFQSPI_CS2); - gpio_free(MCFQSPI_CS1); - gpio_free(MCFQSPI_CS0); -} - -static void m523x_cs_select(struct mcfqspi_cs_control *cs_control, - u8 chip_select, bool cs_high) -{ - switch (chip_select) { - case 0: - gpio_set_value(MCFQSPI_CS0, cs_high); - break; - case 1: - gpio_set_value(MCFQSPI_CS1, cs_high); - break; - case 2: - gpio_set_value(MCFQSPI_CS2, cs_high); - break; - case 3: - gpio_set_value(MCFQSPI_CS3, cs_high); - break; - } -} - -static void m523x_cs_deselect(struct mcfqspi_cs_control *cs_control, - u8 chip_select, bool cs_high) -{ - switch (chip_select) { - case 0: - gpio_set_value(MCFQSPI_CS0, !cs_high); - break; - case 1: - gpio_set_value(MCFQSPI_CS1, !cs_high); - break; - case 2: - gpio_set_value(MCFQSPI_CS2, !cs_high); - break; - case 3: - gpio_set_value(MCFQSPI_CS3, !cs_high); - break; - } -} - -static struct mcfqspi_cs_control m523x_cs_control = { - .setup = m523x_cs_setup, - .teardown = m523x_cs_teardown, - .select = m523x_cs_select, - .deselect = m523x_cs_deselect, -}; - -static struct mcfqspi_platform_data m523x_qspi_data = { - .bus_num = 0, - .num_chipselect = 4, - .cs_control = &m523x_cs_control, -}; - -static struct platform_device m523x_qspi = { - .name = "mcfqspi", - .id = 0, - .num_resources = ARRAY_SIZE(m523x_qspi_resources), - .resource = m523x_qspi_resources, - .dev.platform_data = &m523x_qspi_data, -}; +#ifdef CONFIG_SPI_COLDFIRE_QSPI static void __init m523x_qspi_init(void) { @@ -180,14 +36,8 @@ static void __init m523x_qspi_init(void) par &= 0x3f3f; writew(par, MCFGPIO_PAR_TIMER); } -#endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */ -static struct platform_device *m523x_devices[] __initdata = { - &m523x_fec, -#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) - &m523x_qspi, -#endif -}; +#endif /* CONFIG_SPI_COLDFIRE_QSPI */ /***************************************************************************/ @@ -223,10 +73,9 @@ void __init config_BSP(char *commandp, int size) static int __init init_BSP(void) { -#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) +#ifdef CONFIG_SPI_COLDFIRE_QSPI m523x_qspi_init(); #endif - platform_add_devices(m523x_devices, ARRAY_SIZE(m523x_devices)); return 0; } diff --git a/arch/m68k/platform/5249/config.c b/arch/m68k/platform/5249/config.c index 1e176376010b..d00e12a378cc 100644 --- a/arch/m68k/platform/5249/config.c +++ b/arch/m68k/platform/5249/config.c @@ -12,12 +12,10 @@ #include #include #include -#include -#include +#include #include #include #include -#include /***************************************************************************/ @@ -45,148 +43,15 @@ static struct platform_device m5249_smc91x = { #endif /* CONFIG_M5249C3 */ -#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) -static struct resource m5249_qspi_resources[] = { - { - .start = MCFQSPI_BASE, - .end = MCFQSPI_BASE + MCFQSPI_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = MCF_IRQ_QSPI, - .end = MCF_IRQ_QSPI, - .flags = IORESOURCE_IRQ, - }, -}; - -static int m5249_cs_setup(struct mcfqspi_cs_control *cs_control) -{ - int status; - - status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0"); - if (status) { - pr_debug("gpio_request for MCFQSPI_CS0 failed\n"); - goto fail0; - } - status = gpio_direction_output(MCFQSPI_CS0, 1); - if (status) { - pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n"); - goto fail1; - } - - status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1"); - if (status) { - pr_debug("gpio_request for MCFQSPI_CS1 failed\n"); - goto fail1; - } - status = gpio_direction_output(MCFQSPI_CS1, 1); - if (status) { - pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n"); - goto fail2; - } - - status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2"); - if (status) { - pr_debug("gpio_request for MCFQSPI_CS2 failed\n"); - goto fail2; - } - status = gpio_direction_output(MCFQSPI_CS2, 1); - if (status) { - pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n"); - goto fail3; - } - - status = gpio_request(MCFQSPI_CS3, "MCFQSPI_CS3"); - if (status) { - pr_debug("gpio_request for MCFQSPI_CS3 failed\n"); - goto fail3; - } - status = gpio_direction_output(MCFQSPI_CS3, 1); - if (status) { - pr_debug("gpio_direction_output for MCFQSPI_CS3 failed\n"); - goto fail4; - } - - return 0; - -fail4: - gpio_free(MCFQSPI_CS3); -fail3: - gpio_free(MCFQSPI_CS2); -fail2: - gpio_free(MCFQSPI_CS1); -fail1: - gpio_free(MCFQSPI_CS0); -fail0: - return status; -} - -static void m5249_cs_teardown(struct mcfqspi_cs_control *cs_control) -{ - gpio_free(MCFQSPI_CS3); - gpio_free(MCFQSPI_CS2); - gpio_free(MCFQSPI_CS1); - gpio_free(MCFQSPI_CS0); -} - -static void m5249_cs_select(struct mcfqspi_cs_control *cs_control, - u8 chip_select, bool cs_high) -{ - switch (chip_select) { - case 0: - gpio_set_value(MCFQSPI_CS0, cs_high); - break; - case 1: - gpio_set_value(MCFQSPI_CS1, cs_high); - break; - case 2: - gpio_set_value(MCFQSPI_CS2, cs_high); - break; - case 3: - gpio_set_value(MCFQSPI_CS3, cs_high); - break; - } -} - -static void m5249_cs_deselect(struct mcfqspi_cs_control *cs_control, - u8 chip_select, bool cs_high) -{ - switch (chip_select) { - case 0: - gpio_set_value(MCFQSPI_CS0, !cs_high); - break; - case 1: - gpio_set_value(MCFQSPI_CS1, !cs_high); - break; - case 2: - gpio_set_value(MCFQSPI_CS2, !cs_high); - break; - case 3: - gpio_set_value(MCFQSPI_CS3, !cs_high); - break; - } -} - -static struct mcfqspi_cs_control m5249_cs_control = { - .setup = m5249_cs_setup, - .teardown = m5249_cs_teardown, - .select = m5249_cs_select, - .deselect = m5249_cs_deselect, +static struct platform_device *m5249_devices[] __initdata = { +#ifdef CONFIG_M5249C3 + &m5249_smc91x, +#endif }; -static struct mcfqspi_platform_data m5249_qspi_data = { - .bus_num = 0, - .num_chipselect = 4, - .cs_control = &m5249_cs_control, -}; +/***************************************************************************/ -static struct platform_device m5249_qspi = { - .name = "mcfqspi", - .id = 0, - .num_resources = ARRAY_SIZE(m5249_qspi_resources), - .resource = m5249_qspi_resources, - .dev.platform_data = &m5249_qspi_data, -}; +#ifdef CONFIG_SPI_COLDFIRE_QSPI static void __init m5249_qspi_init(void) { @@ -195,17 +60,8 @@ static void __init m5249_qspi_init(void) MCF_MBAR + MCFSIM_QSPIICR); mcf_mapirq2imr(MCF_IRQ_QSPI, MCFINTC_QSPI); } -#endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */ - -static struct platform_device *m5249_devices[] __initdata = { -#ifdef CONFIG_M5249C3 - &m5249_smc91x, -#endif -#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) - &m5249_qspi, -#endif -}; +#endif /* CONFIG_SPI_COLDFIRE_QSPI */ /***************************************************************************/ @@ -263,7 +119,7 @@ void __init config_BSP(char *commandp, int size) #ifdef CONFIG_M5249C3 m5249_smc91x_init(); #endif -#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) +#ifdef CONFIG_SPI_COLDFIRE_QSPI m5249_qspi_init(); #endif } diff --git a/arch/m68k/platform/527x/config.c b/arch/m68k/platform/527x/config.c index e86ff3a0ba15..9bdf522d9f08 100644 --- a/arch/m68k/platform/527x/config.c +++ b/arch/m68k/platform/527x/config.c @@ -16,158 +16,14 @@ #include #include #include -#include -#include #include #include #include #include -#include /***************************************************************************/ -#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) -static struct resource m527x_qspi_resources[] = { - { - .start = MCFQSPI_BASE, - .end = MCFQSPI_BASE + MCFQSPI_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = MCF_IRQ_QSPI, - .end = MCF_IRQ_QSPI, - .flags = IORESOURCE_IRQ, - }, -}; - -static int m527x_cs_setup(struct mcfqspi_cs_control *cs_control) -{ - int status; - - status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0"); - if (status) { - pr_debug("gpio_request for MCFQSPI_CS0 failed\n"); - goto fail0; - } - status = gpio_direction_output(MCFQSPI_CS0, 1); - if (status) { - pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n"); - goto fail1; - } - - status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1"); - if (status) { - pr_debug("gpio_request for MCFQSPI_CS1 failed\n"); - goto fail1; - } - status = gpio_direction_output(MCFQSPI_CS1, 1); - if (status) { - pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n"); - goto fail2; - } - - status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2"); - if (status) { - pr_debug("gpio_request for MCFQSPI_CS2 failed\n"); - goto fail2; - } - status = gpio_direction_output(MCFQSPI_CS2, 1); - if (status) { - pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n"); - goto fail3; - } - - status = gpio_request(MCFQSPI_CS3, "MCFQSPI_CS3"); - if (status) { - pr_debug("gpio_request for MCFQSPI_CS3 failed\n"); - goto fail3; - } - status = gpio_direction_output(MCFQSPI_CS3, 1); - if (status) { - pr_debug("gpio_direction_output for MCFQSPI_CS3 failed\n"); - goto fail4; - } - - return 0; - -fail4: - gpio_free(MCFQSPI_CS3); -fail3: - gpio_free(MCFQSPI_CS2); -fail2: - gpio_free(MCFQSPI_CS1); -fail1: - gpio_free(MCFQSPI_CS0); -fail0: - return status; -} - -static void m527x_cs_teardown(struct mcfqspi_cs_control *cs_control) -{ - gpio_free(MCFQSPI_CS3); - gpio_free(MCFQSPI_CS2); - gpio_free(MCFQSPI_CS1); - gpio_free(MCFQSPI_CS0); -} - -static void m527x_cs_select(struct mcfqspi_cs_control *cs_control, - u8 chip_select, bool cs_high) -{ - switch (chip_select) { - case 0: - gpio_set_value(MCFQSPI_CS0, cs_high); - break; - case 1: - gpio_set_value(MCFQSPI_CS1, cs_high); - break; - case 2: - gpio_set_value(MCFQSPI_CS2, cs_high); - break; - case 3: - gpio_set_value(MCFQSPI_CS3, cs_high); - break; - } -} - -static void m527x_cs_deselect(struct mcfqspi_cs_control *cs_control, - u8 chip_select, bool cs_high) -{ - switch (chip_select) { - case 0: - gpio_set_value(MCFQSPI_CS0, !cs_high); - break; - case 1: - gpio_set_value(MCFQSPI_CS1, !cs_high); - break; - case 2: - gpio_set_value(MCFQSPI_CS2, !cs_high); - break; - case 3: - gpio_set_value(MCFQSPI_CS3, !cs_high); - break; - } -} - -static struct mcfqspi_cs_control m527x_cs_control = { - .setup = m527x_cs_setup, - .teardown = m527x_cs_teardown, - .select = m527x_cs_select, - .deselect = m527x_cs_deselect, -}; - -static struct mcfqspi_platform_data m527x_qspi_data = { - .bus_num = 0, - .num_chipselect = 4, - .cs_control = &m527x_cs_control, -}; - -static struct platform_device m527x_qspi = { - .name = "mcfqspi", - .id = 0, - .num_resources = ARRAY_SIZE(m527x_qspi_resources), - .resource = m527x_qspi_resources, - .dev.platform_data = &m527x_qspi_data, -}; +#ifdef CONFIG_SPI_COLDFIRE_QSPI static void __init m527x_qspi_init(void) { @@ -185,13 +41,8 @@ static void __init m527x_qspi_init(void) writew(0x003e, MCFGPIO_PAR_QSPI); #endif } -#endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */ -static struct platform_device *m527x_devices[] __initdata = { -#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) - &m527x_qspi, -#endif -}; +#endif /* CONFIG_SPI_COLDFIRE_QSPI */ /***************************************************************************/ @@ -250,19 +101,9 @@ void __init config_BSP(char *commandp, int size) mach_sched_init = hw_timer_init; m527x_uarts_init(); m527x_fec_init(); -#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) +#ifdef CONFIG_SPI_COLDFIRE_QSPI m527x_qspi_init(); #endif } /***************************************************************************/ - -static int __init init_BSP(void) -{ - platform_add_devices(m527x_devices, ARRAY_SIZE(m527x_devices)); - return 0; -} - -arch_initcall(init_BSP); - -/***************************************************************************/ diff --git a/arch/m68k/platform/528x/config.c b/arch/m68k/platform/528x/config.c index 24f5afcf0082..264456ce45dc 100644 --- a/arch/m68k/platform/528x/config.c +++ b/arch/m68k/platform/528x/config.c @@ -17,145 +17,22 @@ #include #include #include -#include -#include #include #include #include #include -#include /***************************************************************************/ -#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) -static struct resource m528x_qspi_resources[] = { - { - .start = MCFQSPI_BASE, - .end = MCFQSPI_BASE + MCFQSPI_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = MCF_IRQ_QSPI, - .end = MCF_IRQ_QSPI, - .flags = IORESOURCE_IRQ, - }, -}; - -static int m528x_cs_setup(struct mcfqspi_cs_control *cs_control) -{ - int status; - - status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0"); - if (status) { - pr_debug("gpio_request for MCFQSPI_CS0 failed\n"); - goto fail0; - } - status = gpio_direction_output(MCFQSPI_CS0, 1); - if (status) { - pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n"); - goto fail1; - } - - status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1"); - if (status) { - pr_debug("gpio_request for MCFQSPI_CS1 failed\n"); - goto fail1; - } - status = gpio_direction_output(MCFQSPI_CS1, 1); - if (status) { - pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n"); - goto fail2; - } - - status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2"); - if (status) { - pr_debug("gpio_request for MCFQSPI_CS2 failed\n"); - goto fail2; - } - status = gpio_direction_output(MCFQSPI_CS2, 1); - if (status) { - pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n"); - goto fail3; - } - - status = gpio_request(MCFQSPI_CS3, "MCFQSPI_CS3"); - if (status) { - pr_debug("gpio_request for MCFQSPI_CS3 failed\n"); - goto fail3; - } - status = gpio_direction_output(MCFQSPI_CS3, 1); - if (status) { - pr_debug("gpio_direction_output for MCFQSPI_CS3 failed\n"); - goto fail4; - } - - return 0; - -fail4: - gpio_free(MCFQSPI_CS3); -fail3: - gpio_free(MCFQSPI_CS2); -fail2: - gpio_free(MCFQSPI_CS1); -fail1: - gpio_free(MCFQSPI_CS0); -fail0: - return status; -} - -static void m528x_cs_teardown(struct mcfqspi_cs_control *cs_control) -{ - gpio_free(MCFQSPI_CS3); - gpio_free(MCFQSPI_CS2); - gpio_free(MCFQSPI_CS1); - gpio_free(MCFQSPI_CS0); -} - -static void m528x_cs_select(struct mcfqspi_cs_control *cs_control, - u8 chip_select, bool cs_high) -{ - gpio_set_value(MCFQSPI_CS0 + chip_select, cs_high); -} - -static void m528x_cs_deselect(struct mcfqspi_cs_control *cs_control, - u8 chip_select, bool cs_high) -{ - gpio_set_value(MCFQSPI_CS0 + chip_select, !cs_high); -} - -static struct mcfqspi_cs_control m528x_cs_control = { - .setup = m528x_cs_setup, - .teardown = m528x_cs_teardown, - .select = m528x_cs_select, - .deselect = m528x_cs_deselect, -}; - -static struct mcfqspi_platform_data m528x_qspi_data = { - .bus_num = 0, - .num_chipselect = 4, - .cs_control = &m528x_cs_control, -}; - -static struct platform_device m528x_qspi = { - .name = "mcfqspi", - .id = 0, - .num_resources = ARRAY_SIZE(m528x_qspi_resources), - .resource = m528x_qspi_resources, - .dev.platform_data = &m528x_qspi_data, -}; +#ifdef CONFIG_SPI_COLDFIRE_QSPI static void __init m528x_qspi_init(void) { /* setup Port QS for QSPI with gpio CS control */ __raw_writeb(0x07, MCFGPIO_PQSPAR); } -#endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */ -static struct platform_device *m528x_devices[] __initdata = { -#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) - &m528x_qspi, -#endif -}; +#endif /* CONFIG_SPI_COLDFIRE_QSPI */ /***************************************************************************/ @@ -236,10 +113,9 @@ static int __init init_BSP(void) mach_sched_init = hw_timer_init; m528x_uarts_init(); m528x_fec_init(); -#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) +#ifdef CONFIG_SPI_COLDFIRE_QSPI m528x_qspi_init(); #endif - platform_add_devices(m528x_devices, ARRAY_SIZE(m528x_devices)); return 0; } diff --git a/arch/m68k/platform/532x/config.c b/arch/m68k/platform/532x/config.c index c8e1395e9344..8c0dd5caae97 100644 --- a/arch/m68k/platform/532x/config.c +++ b/arch/m68k/platform/532x/config.c @@ -21,134 +21,24 @@ #include #include #include -#include -#include #include #include #include #include #include #include -#include /***************************************************************************/ -#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) -static struct resource m532x_qspi_resources[] = { - { - .start = MCFQSPI_BASE, - .end = MCFQSPI_BASE + MCFQSPI_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = MCF_IRQ_QSPI, - .end = MCF_IRQ_QSPI, - .flags = IORESOURCE_IRQ, - }, -}; - -static int m532x_cs_setup(struct mcfqspi_cs_control *cs_control) -{ - int status; - - status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0"); - if (status) { - pr_debug("gpio_request for MCFQSPI_CS0 failed\n"); - goto fail0; - } - status = gpio_direction_output(MCFQSPI_CS0, 1); - if (status) { - pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n"); - goto fail1; - } - - status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1"); - if (status) { - pr_debug("gpio_request for MCFQSPI_CS1 failed\n"); - goto fail1; - } - status = gpio_direction_output(MCFQSPI_CS1, 1); - if (status) { - pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n"); - goto fail2; - } - - status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2"); - if (status) { - pr_debug("gpio_request for MCFQSPI_CS2 failed\n"); - goto fail2; - } - status = gpio_direction_output(MCFQSPI_CS2, 1); - if (status) { - pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n"); - goto fail3; - } - - return 0; - -fail3: - gpio_free(MCFQSPI_CS2); -fail2: - gpio_free(MCFQSPI_CS1); -fail1: - gpio_free(MCFQSPI_CS0); -fail0: - return status; -} - -static void m532x_cs_teardown(struct mcfqspi_cs_control *cs_control) -{ - gpio_free(MCFQSPI_CS2); - gpio_free(MCFQSPI_CS1); - gpio_free(MCFQSPI_CS0); -} - -static void m532x_cs_select(struct mcfqspi_cs_control *cs_control, - u8 chip_select, bool cs_high) -{ - gpio_set_value(MCFQSPI_CS0 + chip_select, cs_high); -} - -static void m532x_cs_deselect(struct mcfqspi_cs_control *cs_control, - u8 chip_select, bool cs_high) -{ - gpio_set_value(MCFQSPI_CS0 + chip_select, !cs_high); -} - -static struct mcfqspi_cs_control m532x_cs_control = { - .setup = m532x_cs_setup, - .teardown = m532x_cs_teardown, - .select = m532x_cs_select, - .deselect = m532x_cs_deselect, -}; - -static struct mcfqspi_platform_data m532x_qspi_data = { - .bus_num = 0, - .num_chipselect = 3, - .cs_control = &m532x_cs_control, -}; - -static struct platform_device m532x_qspi = { - .name = "mcfqspi", - .id = 0, - .num_resources = ARRAY_SIZE(m532x_qspi_resources), - .resource = m532x_qspi_resources, - .dev.platform_data = &m532x_qspi_data, -}; +#ifdef CONFIG_SPI_COLDFIRE_QSPI static void __init m532x_qspi_init(void) { /* setup QSPS pins for QSPI with gpio CS control */ writew(0x01f0, MCF_GPIO_PAR_QSPI); } -#endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */ - -static struct platform_device *m532x_devices[] __initdata = { -#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) - &m532x_qspi, -#endif -}; +#endif /* CONFIG_SPI_COLDFIRE_QSPI */ /***************************************************************************/ @@ -210,10 +100,9 @@ static int __init init_BSP(void) { m532x_uarts_init(); m532x_fec_init(); -#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) +#ifdef CONFIG_SPI_COLDFIRE_QSPI m532x_qspi_init(); #endif - platform_add_devices(m532x_devices, ARRAY_SIZE(m532x_devices)); return 0; } diff --git a/arch/m68k/platform/coldfire/device.c b/arch/m68k/platform/coldfire/device.c index 24b0d5e5350a..fa50c48292ff 100644 --- a/arch/m68k/platform/coldfire/device.c +++ b/arch/m68k/platform/coldfire/device.c @@ -11,10 +11,13 @@ #include #include #include +#include +#include #include #include #include #include +#include /* * All current ColdFire parts contain from 2, 3 or 4 UARTS. @@ -118,6 +121,161 @@ static struct platform_device mcf_fec1 = { #endif /* MCFFEC_BASE1 */ #endif /* CONFIG_FEC */ +#ifdef CONFIG_SPI_COLDFIRE_QSPI +/* + * The ColdFire QSPI module is an SPI protocol hardware block used + * on a number of different ColdFire CPUs. + */ +static struct resource mcf_qspi_resources[] = { + { + .start = MCFQSPI_BASE, + .end = MCFQSPI_BASE + MCFQSPI_SIZE - 1, + .flags = IORESOURCE_MEM, + }, + { + .start = MCF_IRQ_QSPI, + .end = MCF_IRQ_QSPI, + .flags = IORESOURCE_IRQ, + }, +}; + +static int mcf_cs_setup(struct mcfqspi_cs_control *cs_control) +{ + int status; + + status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0"); + if (status) { + pr_debug("gpio_request for MCFQSPI_CS0 failed\n"); + goto fail0; + } + status = gpio_direction_output(MCFQSPI_CS0, 1); + if (status) { + pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n"); + goto fail1; + } + + status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1"); + if (status) { + pr_debug("gpio_request for MCFQSPI_CS1 failed\n"); + goto fail1; + } + status = gpio_direction_output(MCFQSPI_CS1, 1); + if (status) { + pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n"); + goto fail2; + } + + status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2"); + if (status) { + pr_debug("gpio_request for MCFQSPI_CS2 failed\n"); + goto fail2; + } + status = gpio_direction_output(MCFQSPI_CS2, 1); + if (status) { + pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n"); + goto fail3; + } + +#ifdef MCFQSPI_CS3 + status = gpio_request(MCFQSPI_CS3, "MCFQSPI_CS3"); + if (status) { + pr_debug("gpio_request for MCFQSPI_CS3 failed\n"); + goto fail3; + } + status = gpio_direction_output(MCFQSPI_CS3, 1); + if (status) { + pr_debug("gpio_direction_output for MCFQSPI_CS3 failed\n"); + gpio_free(MCFQSPI_CS3); + goto fail3; + } +#endif + + return 0; + +fail3: + gpio_free(MCFQSPI_CS2); +fail2: + gpio_free(MCFQSPI_CS1); +fail1: + gpio_free(MCFQSPI_CS0); +fail0: + return status; +} + +static void mcf_cs_teardown(struct mcfqspi_cs_control *cs_control) +{ +#ifdef MCFQSPI_CS3 + gpio_free(MCFQSPI_CS3); +#endif + gpio_free(MCFQSPI_CS2); + gpio_free(MCFQSPI_CS1); + gpio_free(MCFQSPI_CS0); +} + +static void mcf_cs_select(struct mcfqspi_cs_control *cs_control, + u8 chip_select, bool cs_high) +{ + switch (chip_select) { + case 0: + gpio_set_value(MCFQSPI_CS0, cs_high); + break; + case 1: + gpio_set_value(MCFQSPI_CS1, cs_high); + break; + case 2: + gpio_set_value(MCFQSPI_CS2, cs_high); + break; +#ifdef MCFQSPI_CS3 + case 3: + gpio_set_value(MCFQSPI_CS3, cs_high); + break; +#endif + } +} + +static void mcf_cs_deselect(struct mcfqspi_cs_control *cs_control, + u8 chip_select, bool cs_high) +{ + switch (chip_select) { + case 0: + gpio_set_value(MCFQSPI_CS0, !cs_high); + break; + case 1: + gpio_set_value(MCFQSPI_CS1, !cs_high); + break; + case 2: + gpio_set_value(MCFQSPI_CS2, !cs_high); + break; +#ifdef MCFQSPI_CS3 + case 3: + gpio_set_value(MCFQSPI_CS3, !cs_high); + break; +#endif + } +} + +static struct mcfqspi_cs_control mcf_cs_control = { + .setup = mcf_cs_setup, + .teardown = mcf_cs_teardown, + .select = mcf_cs_select, + .deselect = mcf_cs_deselect, +}; + +static struct mcfqspi_platform_data mcf_qspi_data = { + .bus_num = 0, + .num_chipselect = 4, + .cs_control = &mcf_cs_control, +}; + +static struct platform_device mcf_qspi = { + .name = "mcfqspi", + .id = 0, + .num_resources = ARRAY_SIZE(mcf_qspi_resources), + .resource = mcf_qspi_resources, + .dev.platform_data = &mcf_qspi_data, +}; +#endif /* CONFIG_SPI_COLDFIRE_QSPI */ + static struct platform_device *mcf_devices[] __initdata = { &mcf_uart, #ifdef CONFIG_FEC @@ -126,9 +284,11 @@ static struct platform_device *mcf_devices[] __initdata = { &mcf_fec1, #endif #endif +#ifdef CONFIG_SPI_COLDFIRE_QSPI + &mcf_qspi, +#endif }; - /* * Some ColdFire UARTs let you set the IRQ line to use. */ -- cgit v1.2.3-59-g8ed1b From 2ba168a913192ebe44ca1da06d46f4e13037392f Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Sat, 24 Dec 2011 13:00:02 +1000 Subject: m68knommu: clean up init code in ColdFire 523x startup We can move the QSPI init call to the more general config_BSP() code on the 523x platorm setup code. Then we can remove the initcall code all together. We can also remove the un-needed include of mcfuart.h while we are cleaning up here too. Also I noticed that we are not calling the fec_init() code here, and we should be doing that. Put that back in too. Signed-off-by: Greg Ungerer --- arch/m68k/platform/523x/config.c | 11 +---------- 1 file changed, 1 insertion(+), 10 deletions(-) (limited to 'arch') diff --git a/arch/m68k/platform/523x/config.c b/arch/m68k/platform/523x/config.c index 94e93943cbf8..b47a6886b8ae 100644 --- a/arch/m68k/platform/523x/config.c +++ b/arch/m68k/platform/523x/config.c @@ -19,7 +19,6 @@ #include #include #include -#include /***************************************************************************/ @@ -67,18 +66,10 @@ void __init config_BSP(char *commandp, int size) { mach_reset = m523x_cpu_reset; mach_sched_init = hw_timer_init; -} - -/***************************************************************************/ - -static int __init init_BSP(void) -{ + m523x_fec_init(); #ifdef CONFIG_SPI_COLDFIRE_QSPI m523x_qspi_init(); #endif - return 0; } -arch_initcall(init_BSP); - /***************************************************************************/ -- cgit v1.2.3-59-g8ed1b From 9773be5f5fcbabb688bf05f85d594261a53a5ac0 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Sat, 24 Dec 2011 13:04:05 +1000 Subject: m68knommu: clean up init code in ColdFire 528x startup We can move all the init calls in the initcall code into the more general arch setup code (which is config_BSP() here). That makes the 528x consistent with other ColdFire CPUs setup cod. It means we can get rif of the initcall setup here all together. Signed-off-by: Greg Ungerer --- arch/m68k/platform/528x/config.c | 9 --------- 1 file changed, 9 deletions(-) (limited to 'arch') diff --git a/arch/m68k/platform/528x/config.c b/arch/m68k/platform/528x/config.c index 264456ce45dc..98decc6beb34 100644 --- a/arch/m68k/platform/528x/config.c +++ b/arch/m68k/platform/528x/config.c @@ -103,12 +103,6 @@ void __init config_BSP(char *commandp, int size) #ifdef CONFIG_WILDFIREMOD mach_halt = wildfiremod_halt; #endif -} - -/***************************************************************************/ - -static int __init init_BSP(void) -{ mach_reset = m528x_cpu_reset; mach_sched_init = hw_timer_init; m528x_uarts_init(); @@ -116,9 +110,6 @@ static int __init init_BSP(void) #ifdef CONFIG_SPI_COLDFIRE_QSPI m528x_qspi_init(); #endif - return 0; } -arch_initcall(init_BSP); - /***************************************************************************/ -- cgit v1.2.3-59-g8ed1b From c05793c7332d0f4179068bc6a6120e67b73a09ef Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Sat, 24 Dec 2011 13:06:33 +1000 Subject: m68knommu: clean up init code in ColdFire 532x startup We can move all the init calls in the initcall code into the more general arch setup code (which is config_BSP() here). That makes the 532x consistent with other ColdFire CPUs setup code. It means we can get rid of the initcall setup here all together. Also make sure we set the arch mach_reset function pointer to get the local arch reset code called on reset. Signed-off-by: Greg Ungerer --- arch/m68k/platform/532x/config.c | 20 ++++++-------------- 1 file changed, 6 insertions(+), 14 deletions(-) (limited to 'arch') diff --git a/arch/m68k/platform/532x/config.c b/arch/m68k/platform/532x/config.c index 8c0dd5caae97..56b21fd84b3f 100644 --- a/arch/m68k/platform/532x/config.c +++ b/arch/m68k/platform/532x/config.c @@ -83,6 +83,12 @@ void __init config_BSP(char *commandp, int size) #endif mach_sched_init = hw_timer_init; + mach_reset = m532x_cpu_reset; + m532x_uarts_init(); + m532x_fec_init(); +#ifdef CONFIG_SPI_COLDFIRE_QSPI + m532x_qspi_init(); +#endif #ifdef CONFIG_BDM_DISABLE /* @@ -94,20 +100,6 @@ void __init config_BSP(char *commandp, int size) #endif } -/***************************************************************************/ - -static int __init init_BSP(void) -{ - m532x_uarts_init(); - m532x_fec_init(); -#ifdef CONFIG_SPI_COLDFIRE_QSPI - m532x_qspi_init(); -#endif - return 0; -} - -arch_initcall(init_BSP); - /***************************************************************************/ /* Board initialization */ /***************************************************************************/ -- cgit v1.2.3-59-g8ed1b From 440f6ffc061a84e81386a093c07af8a429c18702 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Sat, 24 Dec 2011 14:36:27 +1000 Subject: m68knommu: move old ColdFire timers init from CPU init to timers code The original ColdFire timer interrupt setup is used by most of the users of the original ColdFire timer code. But the code is currently duplicated in each of the ColdFire CPU specific init files. Move it to the timers code that it is really part of. It is strait forward to make it conditional on also having the original interrupt engine that it needs. Signed-off-by: Greg Ungerer --- arch/m68k/platform/5206/config.c | 18 ------------------ arch/m68k/platform/5249/config.c | 18 ------------------ arch/m68k/platform/5307/config.c | 18 ------------------ arch/m68k/platform/5407/config.c | 18 ------------------ arch/m68k/platform/coldfire/timers.c | 20 ++++++++++++++++++++ 5 files changed, 20 insertions(+), 72 deletions(-) (limited to 'arch') diff --git a/arch/m68k/platform/5206/config.c b/arch/m68k/platform/5206/config.c index aca6253191f7..c81dd51ff758 100644 --- a/arch/m68k/platform/5206/config.c +++ b/arch/m68k/platform/5206/config.c @@ -19,23 +19,6 @@ /***************************************************************************/ -static void __init m5206_timers_init(void) -{ - /* Timer1 is always used as system timer */ - writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3, - MCF_MBAR + MCFSIM_TIMER1ICR); - mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1); - -#ifdef CONFIG_HIGHPROFILE - /* Timer2 is to be used as a high speed profile timer */ - writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3, - MCF_MBAR + MCFSIM_TIMER2ICR); - mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2); -#endif -} - -/***************************************************************************/ - void m5206_cpu_reset(void) { local_irq_disable(); @@ -57,7 +40,6 @@ void __init config_BSP(char *commandp, int size) mach_reset = m5206_cpu_reset; mach_sched_init = hw_timer_init; - m5206_timers_init(); /* Only support the external interrupts on their primary level */ mcf_mapirq2imr(25, MCFINTC_EINT1); diff --git a/arch/m68k/platform/5249/config.c b/arch/m68k/platform/5249/config.c index d00e12a378cc..cda273383226 100644 --- a/arch/m68k/platform/5249/config.c +++ b/arch/m68k/platform/5249/config.c @@ -83,23 +83,6 @@ static void __init m5249_smc91x_init(void) /***************************************************************************/ -static void __init m5249_timers_init(void) -{ - /* Timer1 is always used as system timer */ - writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3, - MCF_MBAR + MCFSIM_TIMER1ICR); - mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1); - -#ifdef CONFIG_HIGHPROFILE - /* Timer2 is to be used as a high speed profile timer */ - writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3, - MCF_MBAR + MCFSIM_TIMER2ICR); - mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2); -#endif -} - -/***************************************************************************/ - void m5249_cpu_reset(void) { local_irq_disable(); @@ -115,7 +98,6 @@ void __init config_BSP(char *commandp, int size) { mach_reset = m5249_cpu_reset; mach_sched_init = hw_timer_init; - m5249_timers_init(); #ifdef CONFIG_M5249C3 m5249_smc91x_init(); #endif diff --git a/arch/m68k/platform/5307/config.c b/arch/m68k/platform/5307/config.c index 89722cdbd026..5f4bf6cb017f 100644 --- a/arch/m68k/platform/5307/config.c +++ b/arch/m68k/platform/5307/config.c @@ -28,23 +28,6 @@ unsigned char ledbank = 0xff; /***************************************************************************/ -static void __init m5307_timers_init(void) -{ - /* Timer1 is always used as system timer */ - writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3, - MCF_MBAR + MCFSIM_TIMER1ICR); - mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1); - -#ifdef CONFIG_HIGHPROFILE - /* Timer2 is to be used as a high speed profile timer */ - writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3, - MCF_MBAR + MCFSIM_TIMER2ICR); - mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2); -#endif -} - -/***************************************************************************/ - void m5307_cpu_reset(void) { local_irq_disable(); @@ -67,7 +50,6 @@ void __init config_BSP(char *commandp, int size) mach_reset = m5307_cpu_reset; mach_sched_init = hw_timer_init; - m5307_timers_init(); /* Only support the external interrupts on their primary level */ mcf_mapirq2imr(25, MCFINTC_EINT1); diff --git a/arch/m68k/platform/5407/config.c b/arch/m68k/platform/5407/config.c index e3b4cab0feb3..19c612557b98 100644 --- a/arch/m68k/platform/5407/config.c +++ b/arch/m68k/platform/5407/config.c @@ -19,23 +19,6 @@ /***************************************************************************/ -static void __init m5407_timers_init(void) -{ - /* Timer1 is always used as system timer */ - writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3, - MCF_MBAR + MCFSIM_TIMER1ICR); - mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1); - -#ifdef CONFIG_HIGHPROFILE - /* Timer2 is to be used as a high speed profile timer */ - writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3, - MCF_MBAR + MCFSIM_TIMER2ICR); - mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2); -#endif -} - -/***************************************************************************/ - void m5407_cpu_reset(void) { local_irq_disable(); @@ -51,7 +34,6 @@ void __init config_BSP(char *commandp, int size) { mach_reset = m5407_cpu_reset; mach_sched_init = hw_timer_init; - m5407_timers_init(); /* Only support the external interrupts on their primary level */ mcf_mapirq2imr(25, MCFINTC_EINT1); diff --git a/arch/m68k/platform/coldfire/timers.c b/arch/m68k/platform/coldfire/timers.c index d0b4e9798fde..ed96ce50d79f 100644 --- a/arch/m68k/platform/coldfire/timers.c +++ b/arch/m68k/platform/coldfire/timers.c @@ -51,6 +51,25 @@ static irq_handler_t timer_interrupt; /***************************************************************************/ +static void init_timer_irq(void) +{ +#ifdef MCFSIM_ICR_AUTOVEC + /* Timer1 is always used as system timer */ + writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3, + MCF_MBAR + MCFSIM_TIMER1ICR); + mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1); + +#ifdef CONFIG_HIGHPROFILE + /* Timer2 is to be used as a high speed profile timer */ + writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3, + MCF_MBAR + MCFSIM_TIMER2ICR); + mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2); +#endif +#endif /* MCFSIM_ICR_AUTOVEC */ +} + +/***************************************************************************/ + static irqreturn_t mcftmr_tick(int irq, void *dummy) { /* Reset the ColdFire timer */ @@ -113,6 +132,7 @@ void hw_timer_init(irq_handler_t handler) clocksource_register_hz(&mcftmr_clk, FREQ); timer_interrupt = handler; + init_timer_irq(); setup_irq(MCF_IRQ_TIMER, &mcftmr_timer_irq); #ifdef CONFIG_HIGHPROFILE -- cgit v1.2.3-59-g8ed1b From d894b89bf74322845f776bde4d72b70b58926886 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Sun, 19 Feb 2012 16:16:58 +1000 Subject: m68knommu: factor some common ColdFire cpu reset code A number of the early ColdFire cores use the same code to reset the CPU. Currently that is duplicated in each of the sub-arch files. Pull out this common code and use a single copy of it for all CPU types that use it. Signed-off-by: Greg Ungerer --- arch/m68k/platform/5206/config.c | 12 ------------ arch/m68k/platform/5249/config.c | 13 +------------ arch/m68k/platform/5307/config.c | 12 ------------ arch/m68k/platform/5407/config.c | 12 ------------ arch/m68k/platform/coldfire/Makefile | 10 +++++----- arch/m68k/platform/coldfire/reset.c | 33 +++++++++++++++++++++++++++++++++ 6 files changed, 39 insertions(+), 53 deletions(-) create mode 100644 arch/m68k/platform/coldfire/reset.c (limited to 'arch') diff --git a/arch/m68k/platform/5206/config.c b/arch/m68k/platform/5206/config.c index c81dd51ff758..6bfbeebd231b 100644 --- a/arch/m68k/platform/5206/config.c +++ b/arch/m68k/platform/5206/config.c @@ -19,17 +19,6 @@ /***************************************************************************/ -void m5206_cpu_reset(void) -{ - local_irq_disable(); - /* Set watchdog to soft reset, and enabled */ - __raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR); - for (;;) - /* wait for watchdog to timeout */; -} - -/***************************************************************************/ - void __init config_BSP(char *commandp, int size) { #if defined(CONFIG_NETtel) @@ -38,7 +27,6 @@ void __init config_BSP(char *commandp, int size) commandp[size-1] = 0; #endif /* CONFIG_NETtel */ - mach_reset = m5206_cpu_reset; mach_sched_init = hw_timer_init; /* Only support the external interrupts on their primary level */ diff --git a/arch/m68k/platform/5249/config.c b/arch/m68k/platform/5249/config.c index cda273383226..bbf05135bb98 100644 --- a/arch/m68k/platform/5249/config.c +++ b/arch/m68k/platform/5249/config.c @@ -83,21 +83,10 @@ static void __init m5249_smc91x_init(void) /***************************************************************************/ -void m5249_cpu_reset(void) -{ - local_irq_disable(); - /* Set watchdog to soft reset, and enabled */ - __raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR); - for (;;) - /* wait for watchdog to timeout */; -} - -/***************************************************************************/ - void __init config_BSP(char *commandp, int size) { - mach_reset = m5249_cpu_reset; mach_sched_init = hw_timer_init; + #ifdef CONFIG_M5249C3 m5249_smc91x_init(); #endif diff --git a/arch/m68k/platform/5307/config.c b/arch/m68k/platform/5307/config.c index 5f4bf6cb017f..a568d2870d15 100644 --- a/arch/m68k/platform/5307/config.c +++ b/arch/m68k/platform/5307/config.c @@ -28,17 +28,6 @@ unsigned char ledbank = 0xff; /***************************************************************************/ -void m5307_cpu_reset(void) -{ - local_irq_disable(); - /* Set watchdog to soft reset, and enabled */ - __raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR); - for (;;) - /* wait for watchdog to timeout */; -} - -/***************************************************************************/ - void __init config_BSP(char *commandp, int size) { #if defined(CONFIG_NETtel) || \ @@ -48,7 +37,6 @@ void __init config_BSP(char *commandp, int size) commandp[size-1] = 0; #endif - mach_reset = m5307_cpu_reset; mach_sched_init = hw_timer_init; /* Only support the external interrupts on their primary level */ diff --git a/arch/m68k/platform/5407/config.c b/arch/m68k/platform/5407/config.c index 19c612557b98..bb6c746ae819 100644 --- a/arch/m68k/platform/5407/config.c +++ b/arch/m68k/platform/5407/config.c @@ -19,20 +19,8 @@ /***************************************************************************/ -void m5407_cpu_reset(void) -{ - local_irq_disable(); - /* set watchdog to soft reset, and enabled */ - __raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR); - for (;;) - /* wait for watchdog to timeout */; -} - -/***************************************************************************/ - void __init config_BSP(char *commandp, int size) { - mach_reset = m5407_cpu_reset; mach_sched_init = hw_timer_init; /* Only support the external interrupts on their primary level */ diff --git a/arch/m68k/platform/coldfire/Makefile b/arch/m68k/platform/coldfire/Makefile index 4572af29b6b7..bccab9331ee1 100644 --- a/arch/m68k/platform/coldfire/Makefile +++ b/arch/m68k/platform/coldfire/Makefile @@ -15,17 +15,17 @@ asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1 obj-$(CONFIG_COLDFIRE) += cache.o clk.o device.o dma.o entry.o vectors.o -obj-$(CONFIG_M5206) += timers.o intc.o -obj-$(CONFIG_M5206e) += timers.o intc.o +obj-$(CONFIG_M5206) += timers.o intc.o reset.o +obj-$(CONFIG_M5206e) += timers.o intc.o reset.o obj-$(CONFIG_M520x) += pit.o intc-simr.o obj-$(CONFIG_M523x) += pit.o dma_timer.o intc-2.o -obj-$(CONFIG_M5249) += timers.o intc.o +obj-$(CONFIG_M5249) += timers.o intc.o reset.o obj-$(CONFIG_M527x) += pit.o intc-2.o obj-$(CONFIG_M5272) += timers.o obj-$(CONFIG_M528x) += pit.o intc-2.o -obj-$(CONFIG_M5307) += timers.o intc.o +obj-$(CONFIG_M5307) += timers.o intc.o reset.o obj-$(CONFIG_M532x) += timers.o intc-simr.o -obj-$(CONFIG_M5407) += timers.o intc.o +obj-$(CONFIG_M5407) += timers.o intc.o reset.o obj-$(CONFIG_M54xx) += sltimers.o intc-2.o obj-y += pinmux.o gpio.o diff --git a/arch/m68k/platform/coldfire/reset.c b/arch/m68k/platform/coldfire/reset.c new file mode 100644 index 000000000000..5ed78d3546d2 --- /dev/null +++ b/arch/m68k/platform/coldfire/reset.c @@ -0,0 +1,33 @@ +/* + * reset.c -- common ColdFire SoC reset support + * + * (C) Copyright 2012, Greg Ungerer + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file COPYING in the main directory of this archive + * for more details. + */ + +#include +#include +#include +#include +#include +#include + +void mcf_cpu_reset(void) +{ + local_irq_disable(); + /* Set watchdog to soft reset, and enabled */ + __raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR); + for (;;) + /* wait for watchdog to timeout */; +} + +static int __init mcf_setup_reset(void) +{ + mach_reset = mcf_cpu_reset; + return 0; +} + +arch_initcall(mcf_setup_reset); -- cgit v1.2.3-59-g8ed1b From 320de7d01c19b6181c592fe8c69b00646ff28962 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Sun, 19 Feb 2012 16:27:23 +1000 Subject: m68knommu: make 523x CPU reset register addressing consistent If we make all MCF_RCR (CPU reset register) addressing consistent across all ColdFire CPU family members that use it then we will be able to remove the duplicated copies of the code that use it. Signed-off-by: Greg Ungerer --- arch/m68k/include/asm/m523xsim.h | 4 ++-- arch/m68k/platform/523x/config.c | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/m68k/include/asm/m523xsim.h b/arch/m68k/include/asm/m523xsim.h index f2d21cef094c..075062d4eecd 100644 --- a/arch/m68k/include/asm/m523xsim.h +++ b/arch/m68k/include/asm/m523xsim.h @@ -65,8 +65,8 @@ /* * Reset Control Unit (relative to IPSBAR). */ -#define MCF_RCR 0x110000 -#define MCF_RSR 0x110001 +#define MCF_RCR (MCF_IPSBAR + 0x110000) +#define MCF_RSR (MCF_IPSBAR + 0x110001) #define MCF_RCR_SWRESET 0x80 /* Software reset bit */ #define MCF_RCR_FRCSTOUT 0x40 /* Force external reset */ diff --git a/arch/m68k/platform/523x/config.c b/arch/m68k/platform/523x/config.c index b47a6886b8ae..88de2133f47d 100644 --- a/arch/m68k/platform/523x/config.c +++ b/arch/m68k/platform/523x/config.c @@ -57,7 +57,7 @@ static void __init m523x_fec_init(void) static void m523x_cpu_reset(void) { local_irq_disable(); - __raw_writeb(MCF_RCR_SWRESET, MCF_IPSBAR + MCF_RCR); + __raw_writeb(MCF_RCR_SWRESET, MCF_RCR); } /***************************************************************************/ -- cgit v1.2.3-59-g8ed1b From 0b2a2139056a05dde934e715739c361d8c01e523 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Sun, 19 Feb 2012 16:33:11 +1000 Subject: m68knommu: make 527x CPU reset register addressing consistent If we make all MCF_RCR (CPU reset register) addressing consistent across all ColdFire CPU family members that use it then we will be able to remove the duplicated copies of the code that use it. Signed-off-by: Greg Ungerer --- arch/m68k/include/asm/m527xsim.h | 4 ++-- arch/m68k/platform/527x/config.c | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/m68k/include/asm/m527xsim.h b/arch/m68k/include/asm/m527xsim.h index f1c5b2c8d447..83db8106f50a 100644 --- a/arch/m68k/include/asm/m527xsim.h +++ b/arch/m68k/include/asm/m527xsim.h @@ -328,8 +328,8 @@ /* * Reset Control Unit (relative to IPSBAR). */ -#define MCF_RCR 0x110000 -#define MCF_RSR 0x110001 +#define MCF_RCR (MCF_IPSBAR + 0x110000) +#define MCF_RSR (MCF_IPSBAR + 0x110001) #define MCF_RCR_SWRESET 0x80 /* Software reset bit */ #define MCF_RCR_FRCSTOUT 0x40 /* Force external reset */ diff --git a/arch/m68k/platform/527x/config.c b/arch/m68k/platform/527x/config.c index 9bdf522d9f08..38655051bf59 100644 --- a/arch/m68k/platform/527x/config.c +++ b/arch/m68k/platform/527x/config.c @@ -90,7 +90,7 @@ static void __init m527x_fec_init(void) static void m527x_cpu_reset(void) { local_irq_disable(); - __raw_writeb(MCF_RCR_SWRESET, MCF_IPSBAR + MCF_RCR); + __raw_writeb(MCF_RCR_SWRESET, MCF_RCR); } /***************************************************************************/ -- cgit v1.2.3-59-g8ed1b From 645e5333ec9088da08a1db619561de9c93c70634 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Sun, 19 Feb 2012 16:34:58 +1000 Subject: m68knommu: make 528x CPU reset register addressing consistent If we make all MCF_RCR (CPU reset register) addressing consistent across all ColdFire CPU family members that use it then we will be able to remove the duplicated copies of the code that use it. Signed-off-by: Greg Ungerer --- arch/m68k/include/asm/m528xsim.h | 4 ++-- arch/m68k/platform/528x/config.c | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/m68k/include/asm/m528xsim.h b/arch/m68k/include/asm/m528xsim.h index e4581a4a1035..569476fba18c 100644 --- a/arch/m68k/include/asm/m528xsim.h +++ b/arch/m68k/include/asm/m528xsim.h @@ -272,8 +272,8 @@ /* * Reset Control Unit (relative to IPSBAR). */ -#define MCF_RCR 0x110000 -#define MCF_RSR 0x110001 +#define MCF_RCR (MCF_IPSBAR + 0x110000) +#define MCF_RSR (MCF_IPSBAR + 0x110001) #define MCF_RCR_SWRESET 0x80 /* Software reset bit */ #define MCF_RCR_FRCSTOUT 0x40 /* Force external reset */ diff --git a/arch/m68k/platform/528x/config.c b/arch/m68k/platform/528x/config.c index 98decc6beb34..d203b1ba4ebb 100644 --- a/arch/m68k/platform/528x/config.c +++ b/arch/m68k/platform/528x/config.c @@ -63,7 +63,7 @@ static void __init m528x_fec_init(void) static void m528x_cpu_reset(void) { local_irq_disable(); - __raw_writeb(MCF_RCR_SWRESET, MCF_IPSBAR + MCF_RCR); + __raw_writeb(MCF_RCR_SWRESET, MCF_RCR); } /***************************************************************************/ -- cgit v1.2.3-59-g8ed1b From ae909ea4ad2431e085e6cc96446fbc1c1ae88498 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Sun, 19 Feb 2012 16:47:24 +1000 Subject: m68knommu: factor more common ColdFire cpu reset code Most of the more modern ColdFire cores use the same code to reset the CPU (but it is different to most of the earlier cores). Currently that is duplicated in each of the sub-arch files. Pull out this common code and out a single copy of it with the other common reset code. Signed-off-by: Greg Ungerer --- arch/m68k/platform/520x/config.c | 9 --------- arch/m68k/platform/523x/config.c | 9 --------- arch/m68k/platform/527x/config.c | 9 --------- arch/m68k/platform/528x/config.c | 9 --------- arch/m68k/platform/532x/config.c | 9 --------- arch/m68k/platform/coldfire/Makefile | 10 +++++----- arch/m68k/platform/coldfire/reset.c | 19 ++++++++++++++++++- 7 files changed, 23 insertions(+), 51 deletions(-) (limited to 'arch') diff --git a/arch/m68k/platform/520x/config.c b/arch/m68k/platform/520x/config.c index 6c318dbe158a..235947844f27 100644 --- a/arch/m68k/platform/520x/config.c +++ b/arch/m68k/platform/520x/config.c @@ -74,17 +74,8 @@ static void __init m520x_fec_init(void) /***************************************************************************/ -static void m520x_cpu_reset(void) -{ - local_irq_disable(); - __raw_writeb(MCF_RCR_SWRESET, MCF_RCR); -} - -/***************************************************************************/ - void __init config_BSP(char *commandp, int size) { - mach_reset = m520x_cpu_reset; mach_sched_init = hw_timer_init; m520x_uarts_init(); m520x_fec_init(); diff --git a/arch/m68k/platform/523x/config.c b/arch/m68k/platform/523x/config.c index 88de2133f47d..c8b405d5a961 100644 --- a/arch/m68k/platform/523x/config.c +++ b/arch/m68k/platform/523x/config.c @@ -54,17 +54,8 @@ static void __init m523x_fec_init(void) /***************************************************************************/ -static void m523x_cpu_reset(void) -{ - local_irq_disable(); - __raw_writeb(MCF_RCR_SWRESET, MCF_RCR); -} - -/***************************************************************************/ - void __init config_BSP(char *commandp, int size) { - mach_reset = m523x_cpu_reset; mach_sched_init = hw_timer_init; m523x_fec_init(); #ifdef CONFIG_SPI_COLDFIRE_QSPI diff --git a/arch/m68k/platform/527x/config.c b/arch/m68k/platform/527x/config.c index 38655051bf59..7ed848c3b848 100644 --- a/arch/m68k/platform/527x/config.c +++ b/arch/m68k/platform/527x/config.c @@ -87,17 +87,8 @@ static void __init m527x_fec_init(void) /***************************************************************************/ -static void m527x_cpu_reset(void) -{ - local_irq_disable(); - __raw_writeb(MCF_RCR_SWRESET, MCF_RCR); -} - -/***************************************************************************/ - void __init config_BSP(char *commandp, int size) { - mach_reset = m527x_cpu_reset; mach_sched_init = hw_timer_init; m527x_uarts_init(); m527x_fec_init(); diff --git a/arch/m68k/platform/528x/config.c b/arch/m68k/platform/528x/config.c index d203b1ba4ebb..d4492926614c 100644 --- a/arch/m68k/platform/528x/config.c +++ b/arch/m68k/platform/528x/config.c @@ -60,14 +60,6 @@ static void __init m528x_fec_init(void) /***************************************************************************/ -static void m528x_cpu_reset(void) -{ - local_irq_disable(); - __raw_writeb(MCF_RCR_SWRESET, MCF_RCR); -} - -/***************************************************************************/ - #ifdef CONFIG_WILDFIRE void wildfire_halt(void) { @@ -103,7 +95,6 @@ void __init config_BSP(char *commandp, int size) #ifdef CONFIG_WILDFIREMOD mach_halt = wildfiremod_halt; #endif - mach_reset = m528x_cpu_reset; mach_sched_init = hw_timer_init; m528x_uarts_init(); m528x_fec_init(); diff --git a/arch/m68k/platform/532x/config.c b/arch/m68k/platform/532x/config.c index 56b21fd84b3f..2bec3477b739 100644 --- a/arch/m68k/platform/532x/config.c +++ b/arch/m68k/platform/532x/config.c @@ -61,14 +61,6 @@ static void __init m532x_fec_init(void) /***************************************************************************/ -static void m532x_cpu_reset(void) -{ - local_irq_disable(); - __raw_writeb(MCF_RCR_SWRESET, MCF_RCR); -} - -/***************************************************************************/ - void __init config_BSP(char *commandp, int size) { #if !defined(CONFIG_BOOTPARAM) @@ -83,7 +75,6 @@ void __init config_BSP(char *commandp, int size) #endif mach_sched_init = hw_timer_init; - mach_reset = m532x_cpu_reset; m532x_uarts_init(); m532x_fec_init(); #ifdef CONFIG_SPI_COLDFIRE_QSPI diff --git a/arch/m68k/platform/coldfire/Makefile b/arch/m68k/platform/coldfire/Makefile index bccab9331ee1..a0815c61dec1 100644 --- a/arch/m68k/platform/coldfire/Makefile +++ b/arch/m68k/platform/coldfire/Makefile @@ -17,14 +17,14 @@ asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1 obj-$(CONFIG_COLDFIRE) += cache.o clk.o device.o dma.o entry.o vectors.o obj-$(CONFIG_M5206) += timers.o intc.o reset.o obj-$(CONFIG_M5206e) += timers.o intc.o reset.o -obj-$(CONFIG_M520x) += pit.o intc-simr.o -obj-$(CONFIG_M523x) += pit.o dma_timer.o intc-2.o +obj-$(CONFIG_M520x) += pit.o intc-simr.o reset.o +obj-$(CONFIG_M523x) += pit.o dma_timer.o intc-2.o reset.o obj-$(CONFIG_M5249) += timers.o intc.o reset.o -obj-$(CONFIG_M527x) += pit.o intc-2.o +obj-$(CONFIG_M527x) += pit.o intc-2.o reset.o obj-$(CONFIG_M5272) += timers.o -obj-$(CONFIG_M528x) += pit.o intc-2.o +obj-$(CONFIG_M528x) += pit.o intc-2.o reset.o obj-$(CONFIG_M5307) += timers.o intc.o reset.o -obj-$(CONFIG_M532x) += timers.o intc-simr.o +obj-$(CONFIG_M532x) += timers.o intc-simr.o reset.o obj-$(CONFIG_M5407) += timers.o intc.o reset.o obj-$(CONFIG_M54xx) += sltimers.o intc-2.o diff --git a/arch/m68k/platform/coldfire/reset.c b/arch/m68k/platform/coldfire/reset.c index 5ed78d3546d2..933e54eacc69 100644 --- a/arch/m68k/platform/coldfire/reset.c +++ b/arch/m68k/platform/coldfire/reset.c @@ -15,7 +15,15 @@ #include #include -void mcf_cpu_reset(void) +/* + * There are 2 common methods amongst the ColdFure parts for reseting + * the CPU. But there are couple of exceptions, the 5272 and the 547x + * have something completely special to them, and we let their specific + * subarch code handle them. + */ + +#ifdef MCFSIM_SYPCR +static void mcf_cpu_reset(void) { local_irq_disable(); /* Set watchdog to soft reset, and enabled */ @@ -23,6 +31,15 @@ void mcf_cpu_reset(void) for (;;) /* wait for watchdog to timeout */; } +#endif + +#ifdef MCF_RCR +static void mcf_cpu_reset(void) +{ + local_irq_disable(); + __raw_writeb(MCF_RCR_SWRESET, MCF_RCR); +} +#endif static int __init mcf_setup_reset(void) { -- cgit v1.2.3-59-g8ed1b