From 48c5e98fedd9e0b164df4de592fd740537ead9e2 Mon Sep 17 00:00:00 2001 From: Alex Helms Date: Mon, 12 Sep 2022 11:36:13 -0700 Subject: clk: Renesas versaclock7 ccf device driver Renesas Versaclock7 is a family of configurable clock generator ICs with fractional and integer dividers. This driver has basic support for the RC21008A device, a clock synthesizer with a crystal input and 8 outputs. The supports changing the FOD and IOD rates, and each output can be gated. Signed-off-by: Alex Helms Link: https://lore.kernel.org/r/20220912183613.22213-3-alexander.helms.jy@renesas.com Tested-by: Saeed Nowshadi Signed-off-by: Stephen Boyd --- drivers/clk/Kconfig | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'drivers/clk/Kconfig') diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index 48f8f4221e21..87481e4fa746 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -377,6 +377,15 @@ config COMMON_CLK_VC5 This driver supports the IDT VersaClock 5 and VersaClock 6 programmable clock generators. +config COMMON_CLK_VC7 + tristate "Clock driver for Renesas Versaclock 7 devices" + depends on I2C + depends on OF + select REGMAP_I2C + help + Renesas Versaclock7 is a family of configurable clock generator + and jitter attenuator ICs with fractional and integer dividers. + config COMMON_CLK_STM32MP135 def_bool COMMON_CLK && MACH_STM32MP13 help -- cgit v1.2.3-59-g8ed1b