From a5a1d1c2914b5316924c7893eb683a5420ebd3be Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Wed, 21 Dec 2016 20:32:01 +0100 Subject: clocksource: Use a plain u64 instead of cycle_t There is no point in having an extra type for extra confusion. u64 is unambiguous. Conversion was done with the following coccinelle script: @rem@ @@ -typedef u64 cycle_t; @fix@ typedef cycle_t; @@ -cycle_t +u64 Signed-off-by: Thomas Gleixner Cc: Peter Zijlstra Cc: John Stultz --- drivers/clocksource/acpi_pm.c | 14 +++++++------- drivers/clocksource/arc_timer.c | 12 ++++++------ drivers/clocksource/arm_arch_timer.c | 4 ++-- drivers/clocksource/arm_global_timer.c | 2 +- drivers/clocksource/cadence_ttc_timer.c | 4 ++-- drivers/clocksource/clksrc-dbx500-prcmu.c | 2 +- drivers/clocksource/dw_apb_timer.c | 8 ++++---- drivers/clocksource/em_sti.c | 12 ++++++------ drivers/clocksource/exynos_mct.c | 6 +++--- drivers/clocksource/h8300_timer16.c | 2 +- drivers/clocksource/h8300_tpu.c | 2 +- drivers/clocksource/i8253.c | 4 ++-- drivers/clocksource/jcore-pit.c | 2 +- drivers/clocksource/metag_generic.c | 2 +- drivers/clocksource/mips-gic-timer.c | 2 +- drivers/clocksource/mmio.c | 18 +++++++++--------- drivers/clocksource/mxs_timer.c | 2 +- drivers/clocksource/qcom-timer.c | 2 +- drivers/clocksource/samsung_pwm_timer.c | 2 +- drivers/clocksource/scx200_hrt.c | 4 ++-- drivers/clocksource/sh_cmt.c | 2 +- drivers/clocksource/sh_tmu.c | 2 +- drivers/clocksource/tcb_clksrc.c | 4 ++-- drivers/clocksource/time-pistachio.c | 4 ++-- drivers/clocksource/timer-atlas7.c | 2 +- drivers/clocksource/timer-atmel-pit.c | 2 +- drivers/clocksource/timer-atmel-st.c | 2 +- drivers/clocksource/timer-nps.c | 4 ++-- drivers/clocksource/timer-prima2.c | 2 +- drivers/clocksource/timer-sun5i.c | 2 +- drivers/clocksource/timer-ti-32k.c | 4 ++-- drivers/clocksource/vt8500_timer.c | 4 ++-- 32 files changed, 70 insertions(+), 70 deletions(-) (limited to 'drivers/clocksource') diff --git a/drivers/clocksource/acpi_pm.c b/drivers/clocksource/acpi_pm.c index 28037d0b8dcd..1961e3539b57 100644 --- a/drivers/clocksource/acpi_pm.c +++ b/drivers/clocksource/acpi_pm.c @@ -58,16 +58,16 @@ u32 acpi_pm_read_verified(void) return v2; } -static cycle_t acpi_pm_read(struct clocksource *cs) +static u64 acpi_pm_read(struct clocksource *cs) { - return (cycle_t)read_pmtmr(); + return (u64)read_pmtmr(); } static struct clocksource clocksource_acpi_pm = { .name = "acpi_pm", .rating = 200, .read = acpi_pm_read, - .mask = (cycle_t)ACPI_PM_MASK, + .mask = (u64)ACPI_PM_MASK, .flags = CLOCK_SOURCE_IS_CONTINUOUS, }; @@ -81,9 +81,9 @@ static int __init acpi_pm_good_setup(char *__str) } __setup("acpi_pm_good", acpi_pm_good_setup); -static cycle_t acpi_pm_read_slow(struct clocksource *cs) +static u64 acpi_pm_read_slow(struct clocksource *cs) { - return (cycle_t)acpi_pm_read_verified(); + return (u64)acpi_pm_read_verified(); } static inline void acpi_pm_need_workaround(void) @@ -145,7 +145,7 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_LE, */ static int verify_pmtmr_rate(void) { - cycle_t value1, value2; + u64 value1, value2; unsigned long count, delta; mach_prepare_counter(); @@ -175,7 +175,7 @@ static int verify_pmtmr_rate(void) static int __init init_acpi_pm_clocksource(void) { - cycle_t value1, value2; + u64 value1, value2; unsigned int i, j = 0; if (!pmtmr_ioport) diff --git a/drivers/clocksource/arc_timer.c b/drivers/clocksource/arc_timer.c index a49748d826c0..3ea46343024f 100644 --- a/drivers/clocksource/arc_timer.c +++ b/drivers/clocksource/arc_timer.c @@ -56,7 +56,7 @@ static int noinline arc_get_timer_clk(struct device_node *node) #ifdef CONFIG_ARC_TIMERS_64BIT -static cycle_t arc_read_gfrc(struct clocksource *cs) +static u64 arc_read_gfrc(struct clocksource *cs) { unsigned long flags; u32 l, h; @@ -71,7 +71,7 @@ static cycle_t arc_read_gfrc(struct clocksource *cs) local_irq_restore(flags); - return (((cycle_t)h) << 32) | l; + return (((u64)h) << 32) | l; } static struct clocksource arc_counter_gfrc = { @@ -105,7 +105,7 @@ CLOCKSOURCE_OF_DECLARE(arc_gfrc, "snps,archs-timer-gfrc", arc_cs_setup_gfrc); #define AUX_RTC_LOW 0x104 #define AUX_RTC_HIGH 0x105 -static cycle_t arc_read_rtc(struct clocksource *cs) +static u64 arc_read_rtc(struct clocksource *cs) { unsigned long status; u32 l, h; @@ -122,7 +122,7 @@ static cycle_t arc_read_rtc(struct clocksource *cs) status = read_aux_reg(AUX_RTC_CTRL); } while (!(status & _BITUL(31))); - return (((cycle_t)h) << 32) | l; + return (((u64)h) << 32) | l; } static struct clocksource arc_counter_rtc = { @@ -166,9 +166,9 @@ CLOCKSOURCE_OF_DECLARE(arc_rtc, "snps,archs-timer-rtc", arc_cs_setup_rtc); * 32bit TIMER1 to keep counting monotonically and wraparound */ -static cycle_t arc_read_timer1(struct clocksource *cs) +static u64 arc_read_timer1(struct clocksource *cs) { - return (cycle_t) read_aux_reg(ARC_REG_TIMER1_CNT); + return (u64) read_aux_reg(ARC_REG_TIMER1_CNT); } static struct clocksource arc_counter_timer1 = { diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index 02fef6830e72..394e417414d3 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -562,12 +562,12 @@ static u64 arch_counter_get_cntvct_mem(void) */ u64 (*arch_timer_read_counter)(void) = arch_counter_get_cntvct; -static cycle_t arch_counter_read(struct clocksource *cs) +static u64 arch_counter_read(struct clocksource *cs) { return arch_timer_read_counter(); } -static cycle_t arch_counter_read_cc(const struct cyclecounter *cc) +static u64 arch_counter_read_cc(const struct cyclecounter *cc) { return arch_timer_read_counter(); } diff --git a/drivers/clocksource/arm_global_timer.c b/drivers/clocksource/arm_global_timer.c index 8da03298f844..570cc58baec4 100644 --- a/drivers/clocksource/arm_global_timer.c +++ b/drivers/clocksource/arm_global_timer.c @@ -195,7 +195,7 @@ static int gt_dying_cpu(unsigned int cpu) return 0; } -static cycle_t gt_clocksource_read(struct clocksource *cs) +static u64 gt_clocksource_read(struct clocksource *cs) { return gt_counter_read(); } diff --git a/drivers/clocksource/cadence_ttc_timer.c b/drivers/clocksource/cadence_ttc_timer.c index fbfbdec13b08..44e5e951583b 100644 --- a/drivers/clocksource/cadence_ttc_timer.c +++ b/drivers/clocksource/cadence_ttc_timer.c @@ -158,11 +158,11 @@ static irqreturn_t ttc_clock_event_interrupt(int irq, void *dev_id) * * returns: Current timer counter register value **/ -static cycle_t __ttc_clocksource_read(struct clocksource *cs) +static u64 __ttc_clocksource_read(struct clocksource *cs) { struct ttc_timer *timer = &to_ttc_timer_clksrc(cs)->ttc; - return (cycle_t)readl_relaxed(timer->base_addr + + return (u64)readl_relaxed(timer->base_addr + TTC_COUNT_VAL_OFFSET); } diff --git a/drivers/clocksource/clksrc-dbx500-prcmu.c b/drivers/clocksource/clksrc-dbx500-prcmu.c index 77a365f573d7..c69e2772658d 100644 --- a/drivers/clocksource/clksrc-dbx500-prcmu.c +++ b/drivers/clocksource/clksrc-dbx500-prcmu.c @@ -30,7 +30,7 @@ static void __iomem *clksrc_dbx500_timer_base; -static cycle_t notrace clksrc_dbx500_prcmu_read(struct clocksource *cs) +static u64 notrace clksrc_dbx500_prcmu_read(struct clocksource *cs) { void __iomem *base = clksrc_dbx500_timer_base; u32 count, count2; diff --git a/drivers/clocksource/dw_apb_timer.c b/drivers/clocksource/dw_apb_timer.c index 797505aa2ba4..63e4f5519577 100644 --- a/drivers/clocksource/dw_apb_timer.c +++ b/drivers/clocksource/dw_apb_timer.c @@ -348,7 +348,7 @@ void dw_apb_clocksource_start(struct dw_apb_clocksource *dw_cs) dw_apb_clocksource_read(dw_cs); } -static cycle_t __apbt_read_clocksource(struct clocksource *cs) +static u64 __apbt_read_clocksource(struct clocksource *cs) { u32 current_count; struct dw_apb_clocksource *dw_cs = @@ -357,7 +357,7 @@ static cycle_t __apbt_read_clocksource(struct clocksource *cs) current_count = apbt_readl_relaxed(&dw_cs->timer, APBTMR_N_CURRENT_VALUE); - return (cycle_t)~current_count; + return (u64)~current_count; } static void apbt_restart_clocksource(struct clocksource *cs) @@ -416,7 +416,7 @@ void dw_apb_clocksource_register(struct dw_apb_clocksource *dw_cs) * * @dw_cs: The clocksource to read. */ -cycle_t dw_apb_clocksource_read(struct dw_apb_clocksource *dw_cs) +u64 dw_apb_clocksource_read(struct dw_apb_clocksource *dw_cs) { - return (cycle_t)~apbt_readl(&dw_cs->timer, APBTMR_N_CURRENT_VALUE); + return (u64)~apbt_readl(&dw_cs->timer, APBTMR_N_CURRENT_VALUE); } diff --git a/drivers/clocksource/em_sti.c b/drivers/clocksource/em_sti.c index 19bb1792d647..aff87df07449 100644 --- a/drivers/clocksource/em_sti.c +++ b/drivers/clocksource/em_sti.c @@ -110,9 +110,9 @@ static void em_sti_disable(struct em_sti_priv *p) clk_disable_unprepare(p->clk); } -static cycle_t em_sti_count(struct em_sti_priv *p) +static u64 em_sti_count(struct em_sti_priv *p) { - cycle_t ticks; + u64 ticks; unsigned long flags; /* the STI hardware buffers the 48-bit count, but to @@ -121,14 +121,14 @@ static cycle_t em_sti_count(struct em_sti_priv *p) * Always read STI_COUNT_H before STI_COUNT_L. */ raw_spin_lock_irqsave(&p->lock, flags); - ticks = (cycle_t)(em_sti_read(p, STI_COUNT_H) & 0xffff) << 32; + ticks = (u64)(em_sti_read(p, STI_COUNT_H) & 0xffff) << 32; ticks |= em_sti_read(p, STI_COUNT_L); raw_spin_unlock_irqrestore(&p->lock, flags); return ticks; } -static cycle_t em_sti_set_next(struct em_sti_priv *p, cycle_t next) +static u64 em_sti_set_next(struct em_sti_priv *p, u64 next) { unsigned long flags; @@ -198,7 +198,7 @@ static struct em_sti_priv *cs_to_em_sti(struct clocksource *cs) return container_of(cs, struct em_sti_priv, cs); } -static cycle_t em_sti_clocksource_read(struct clocksource *cs) +static u64 em_sti_clocksource_read(struct clocksource *cs) { return em_sti_count(cs_to_em_sti(cs)); } @@ -271,7 +271,7 @@ static int em_sti_clock_event_next(unsigned long delta, struct clock_event_device *ced) { struct em_sti_priv *p = ced_to_em_sti(ced); - cycle_t next; + u64 next; int safe; next = em_sti_set_next(p, em_sti_count(p) + delta); diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c index 8f3488b80896..c8b9f834f4de 100644 --- a/drivers/clocksource/exynos_mct.c +++ b/drivers/clocksource/exynos_mct.c @@ -183,7 +183,7 @@ static u64 exynos4_read_count_64(void) hi2 = readl_relaxed(reg_base + EXYNOS4_MCT_G_CNT_U); } while (hi != hi2); - return ((cycle_t)hi << 32) | lo; + return ((u64)hi << 32) | lo; } /** @@ -199,7 +199,7 @@ static u32 notrace exynos4_read_count_32(void) return readl_relaxed(reg_base + EXYNOS4_MCT_G_CNT_L); } -static cycle_t exynos4_frc_read(struct clocksource *cs) +static u64 exynos4_frc_read(struct clocksource *cs) { return exynos4_read_count_32(); } @@ -266,7 +266,7 @@ static void exynos4_mct_comp0_stop(void) static void exynos4_mct_comp0_start(bool periodic, unsigned long cycles) { unsigned int tcon; - cycle_t comp_cycle; + u64 comp_cycle; tcon = readl_relaxed(reg_base + EXYNOS4_MCT_G_TCON); diff --git a/drivers/clocksource/h8300_timer16.c b/drivers/clocksource/h8300_timer16.c index 07d9d5be9054..5b27fb9997c2 100644 --- a/drivers/clocksource/h8300_timer16.c +++ b/drivers/clocksource/h8300_timer16.c @@ -72,7 +72,7 @@ static inline struct timer16_priv *cs_to_priv(struct clocksource *cs) return container_of(cs, struct timer16_priv, cs); } -static cycle_t timer16_clocksource_read(struct clocksource *cs) +static u64 timer16_clocksource_read(struct clocksource *cs) { struct timer16_priv *p = cs_to_priv(cs); unsigned long raw, value; diff --git a/drivers/clocksource/h8300_tpu.c b/drivers/clocksource/h8300_tpu.c index 7bdf1991c847..72e1cf2b3096 100644 --- a/drivers/clocksource/h8300_tpu.c +++ b/drivers/clocksource/h8300_tpu.c @@ -64,7 +64,7 @@ static inline struct tpu_priv *cs_to_priv(struct clocksource *cs) return container_of(cs, struct tpu_priv, cs); } -static cycle_t tpu_clocksource_read(struct clocksource *cs) +static u64 tpu_clocksource_read(struct clocksource *cs) { struct tpu_priv *p = cs_to_priv(cs); unsigned long flags; diff --git a/drivers/clocksource/i8253.c b/drivers/clocksource/i8253.c index 0efd36e483ab..64f6490740d7 100644 --- a/drivers/clocksource/i8253.c +++ b/drivers/clocksource/i8253.c @@ -25,7 +25,7 @@ EXPORT_SYMBOL(i8253_lock); * to just read by itself. So use jiffies to emulate a free * running counter: */ -static cycle_t i8253_read(struct clocksource *cs) +static u64 i8253_read(struct clocksource *cs) { static int old_count; static u32 old_jifs; @@ -83,7 +83,7 @@ static cycle_t i8253_read(struct clocksource *cs) count = (PIT_LATCH - 1) - count; - return (cycle_t)(jifs * PIT_LATCH) + count; + return (u64)(jifs * PIT_LATCH) + count; } static struct clocksource i8253_cs = { diff --git a/drivers/clocksource/jcore-pit.c b/drivers/clocksource/jcore-pit.c index 54e1665aa03c..e90a6cfcb061 100644 --- a/drivers/clocksource/jcore-pit.c +++ b/drivers/clocksource/jcore-pit.c @@ -57,7 +57,7 @@ static notrace u64 jcore_sched_clock_read(void) return seclo * NSEC_PER_SEC + nsec; } -static cycle_t jcore_clocksource_read(struct clocksource *cs) +static u64 jcore_clocksource_read(struct clocksource *cs) { return jcore_sched_clock_read(); } diff --git a/drivers/clocksource/metag_generic.c b/drivers/clocksource/metag_generic.c index a80ab3e446b7..8d06a0f7ff26 100644 --- a/drivers/clocksource/metag_generic.c +++ b/drivers/clocksource/metag_generic.c @@ -56,7 +56,7 @@ static int metag_timer_set_next_event(unsigned long delta, return 0; } -static cycle_t metag_clocksource_read(struct clocksource *cs) +static u64 metag_clocksource_read(struct clocksource *cs) { return __core_reg_get(TXTIMER); } diff --git a/drivers/clocksource/mips-gic-timer.c b/drivers/clocksource/mips-gic-timer.c index 7a960cd01104..7b86d07c99b4 100644 --- a/drivers/clocksource/mips-gic-timer.c +++ b/drivers/clocksource/mips-gic-timer.c @@ -125,7 +125,7 @@ static int gic_clockevent_init(void) return 0; } -static cycle_t gic_hpt_read(struct clocksource *cs) +static u64 gic_hpt_read(struct clocksource *cs) { return gic_read_count(); } diff --git a/drivers/clocksource/mmio.c b/drivers/clocksource/mmio.c index c4f7d7a9b689..4c4df981d8cc 100644 --- a/drivers/clocksource/mmio.c +++ b/drivers/clocksource/mmio.c @@ -20,24 +20,24 @@ static inline struct clocksource_mmio *to_mmio_clksrc(struct clocksource *c) return container_of(c, struct clocksource_mmio, clksrc); } -cycle_t clocksource_mmio_readl_up(struct clocksource *c) +u64 clocksource_mmio_readl_up(struct clocksource *c) { - return (cycle_t)readl_relaxed(to_mmio_clksrc(c)->reg); + return (u64)readl_relaxed(to_mmio_clksrc(c)->reg); } -cycle_t clocksource_mmio_readl_down(struct clocksource *c) +u64 clocksource_mmio_readl_down(struct clocksource *c) { - return ~(cycle_t)readl_relaxed(to_mmio_clksrc(c)->reg) & c->mask; + return ~(u64)readl_relaxed(to_mmio_clksrc(c)->reg) & c->mask; } -cycle_t clocksource_mmio_readw_up(struct clocksource *c) +u64 clocksource_mmio_readw_up(struct clocksource *c) { - return (cycle_t)readw_relaxed(to_mmio_clksrc(c)->reg); + return (u64)readw_relaxed(to_mmio_clksrc(c)->reg); } -cycle_t clocksource_mmio_readw_down(struct clocksource *c) +u64 clocksource_mmio_readw_down(struct clocksource *c) { - return ~(cycle_t)readw_relaxed(to_mmio_clksrc(c)->reg) & c->mask; + return ~(u64)readw_relaxed(to_mmio_clksrc(c)->reg) & c->mask; } /** @@ -51,7 +51,7 @@ cycle_t clocksource_mmio_readw_down(struct clocksource *c) */ int __init clocksource_mmio_init(void __iomem *base, const char *name, unsigned long hz, int rating, unsigned bits, - cycle_t (*read)(struct clocksource *)) + u64 (*read)(struct clocksource *)) { struct clocksource_mmio *cs; diff --git a/drivers/clocksource/mxs_timer.c b/drivers/clocksource/mxs_timer.c index 0ba0a913b41d..99b77aff0839 100644 --- a/drivers/clocksource/mxs_timer.c +++ b/drivers/clocksource/mxs_timer.c @@ -97,7 +97,7 @@ static void timrot_irq_acknowledge(void) HW_TIMROT_TIMCTRLn(0) + STMP_OFFSET_REG_CLR); } -static cycle_t timrotv1_get_cycles(struct clocksource *cs) +static u64 timrotv1_get_cycles(struct clocksource *cs) { return ~((__raw_readl(mxs_timrot_base + HW_TIMROT_TIMCOUNTn(1)) & 0xffff0000) >> 16); diff --git a/drivers/clocksource/qcom-timer.c b/drivers/clocksource/qcom-timer.c index 3283cfa2aa52..d5d048d890d4 100644 --- a/drivers/clocksource/qcom-timer.c +++ b/drivers/clocksource/qcom-timer.c @@ -89,7 +89,7 @@ static struct clock_event_device __percpu *msm_evt; static void __iomem *source_base; -static notrace cycle_t msm_read_timer_count(struct clocksource *cs) +static notrace u64 msm_read_timer_count(struct clocksource *cs) { return readl_relaxed(source_base + TIMER_COUNT_VAL); } diff --git a/drivers/clocksource/samsung_pwm_timer.c b/drivers/clocksource/samsung_pwm_timer.c index 54565bd0093b..0093ece661fe 100644 --- a/drivers/clocksource/samsung_pwm_timer.c +++ b/drivers/clocksource/samsung_pwm_timer.c @@ -307,7 +307,7 @@ static void samsung_clocksource_resume(struct clocksource *cs) samsung_time_start(pwm.source_id, true); } -static cycle_t notrace samsung_clocksource_read(struct clocksource *c) +static u64 notrace samsung_clocksource_read(struct clocksource *c) { return ~readl_relaxed(pwm.source_reg); } diff --git a/drivers/clocksource/scx200_hrt.c b/drivers/clocksource/scx200_hrt.c index 64f9e8294434..a46660bf6588 100644 --- a/drivers/clocksource/scx200_hrt.c +++ b/drivers/clocksource/scx200_hrt.c @@ -43,10 +43,10 @@ MODULE_PARM_DESC(ppm, "+-adjust to actual XO freq (ppm)"); /* The base timer frequency, * 27 if selected */ #define HRT_FREQ 1000000 -static cycle_t read_hrt(struct clocksource *cs) +static u64 read_hrt(struct clocksource *cs) { /* Read the timer value */ - return (cycle_t) inl(scx200_cb_base + SCx200_TIMER_OFFSET); + return (u64) inl(scx200_cb_base + SCx200_TIMER_OFFSET); } static struct clocksource cs_hrt = { diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c index 103c49362c68..28757edf6aca 100644 --- a/drivers/clocksource/sh_cmt.c +++ b/drivers/clocksource/sh_cmt.c @@ -612,7 +612,7 @@ static struct sh_cmt_channel *cs_to_sh_cmt(struct clocksource *cs) return container_of(cs, struct sh_cmt_channel, cs); } -static cycle_t sh_cmt_clocksource_read(struct clocksource *cs) +static u64 sh_cmt_clocksource_read(struct clocksource *cs) { struct sh_cmt_channel *ch = cs_to_sh_cmt(cs); unsigned long flags, raw; diff --git a/drivers/clocksource/sh_tmu.c b/drivers/clocksource/sh_tmu.c index 469e776ec17a..1fbf2aadcfd4 100644 --- a/drivers/clocksource/sh_tmu.c +++ b/drivers/clocksource/sh_tmu.c @@ -255,7 +255,7 @@ static struct sh_tmu_channel *cs_to_sh_tmu(struct clocksource *cs) return container_of(cs, struct sh_tmu_channel, cs); } -static cycle_t sh_tmu_clocksource_read(struct clocksource *cs) +static u64 sh_tmu_clocksource_read(struct clocksource *cs) { struct sh_tmu_channel *ch = cs_to_sh_tmu(cs); diff --git a/drivers/clocksource/tcb_clksrc.c b/drivers/clocksource/tcb_clksrc.c index 4da2af9694a2..d4ca9962a759 100644 --- a/drivers/clocksource/tcb_clksrc.c +++ b/drivers/clocksource/tcb_clksrc.c @@ -41,7 +41,7 @@ static void __iomem *tcaddr; -static cycle_t tc_get_cycles(struct clocksource *cs) +static u64 tc_get_cycles(struct clocksource *cs) { unsigned long flags; u32 lower, upper; @@ -56,7 +56,7 @@ static cycle_t tc_get_cycles(struct clocksource *cs) return (upper << 16) | lower; } -static cycle_t tc_get_cycles32(struct clocksource *cs) +static u64 tc_get_cycles32(struct clocksource *cs) { return __raw_readl(tcaddr + ATMEL_TC_REG(0, CV)); } diff --git a/drivers/clocksource/time-pistachio.c b/drivers/clocksource/time-pistachio.c index a8e6c7df853d..3710e4d9dcba 100644 --- a/drivers/clocksource/time-pistachio.c +++ b/drivers/clocksource/time-pistachio.c @@ -67,7 +67,7 @@ static inline void gpt_writel(void __iomem *base, u32 value, u32 offset, writel(value, base + 0x20 * gpt_id + offset); } -static cycle_t notrace +static u64 notrace pistachio_clocksource_read_cycles(struct clocksource *cs) { struct pistachio_clocksource *pcs = to_pistachio_clocksource(cs); @@ -84,7 +84,7 @@ pistachio_clocksource_read_cycles(struct clocksource *cs) counter = gpt_readl(pcs->base, TIMER_CURRENT_VALUE, 0); raw_spin_unlock_irqrestore(&pcs->lock, flags); - return (cycle_t)~counter; + return (u64)~counter; } static u64 notrace pistachio_read_sched_clock(void) diff --git a/drivers/clocksource/timer-atlas7.c b/drivers/clocksource/timer-atlas7.c index 4334e0330ada..db0f21e7d7d2 100644 --- a/drivers/clocksource/timer-atlas7.c +++ b/drivers/clocksource/timer-atlas7.c @@ -85,7 +85,7 @@ static irqreturn_t sirfsoc_timer_interrupt(int irq, void *dev_id) } /* read 64-bit timer counter */ -static cycle_t sirfsoc_timer_read(struct clocksource *cs) +static u64 sirfsoc_timer_read(struct clocksource *cs) { u64 cycles; diff --git a/drivers/clocksource/timer-atmel-pit.c b/drivers/clocksource/timer-atmel-pit.c index 6555821bbdae..c0b5df3167a0 100644 --- a/drivers/clocksource/timer-atmel-pit.c +++ b/drivers/clocksource/timer-atmel-pit.c @@ -73,7 +73,7 @@ static inline void pit_write(void __iomem *base, unsigned int reg_offset, unsign * Clocksource: just a monotonic counter of MCK/16 cycles. * We don't care whether or not PIT irqs are enabled. */ -static cycle_t read_pit_clk(struct clocksource *cs) +static u64 read_pit_clk(struct clocksource *cs) { struct pit_data *data = clksrc_to_pit_data(cs); unsigned long flags; diff --git a/drivers/clocksource/timer-atmel-st.c b/drivers/clocksource/timer-atmel-st.c index e90ab5b63a90..be4ac7604136 100644 --- a/drivers/clocksource/timer-atmel-st.c +++ b/drivers/clocksource/timer-atmel-st.c @@ -92,7 +92,7 @@ static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id) return IRQ_NONE; } -static cycle_t read_clk32k(struct clocksource *cs) +static u64 read_clk32k(struct clocksource *cs) { return read_CRTR(); } diff --git a/drivers/clocksource/timer-nps.c b/drivers/clocksource/timer-nps.c index 8da5e93b6810..da1f7986e477 100644 --- a/drivers/clocksource/timer-nps.c +++ b/drivers/clocksource/timer-nps.c @@ -77,11 +77,11 @@ static int __init nps_get_timer_clk(struct device_node *node, return 0; } -static cycle_t nps_clksrc_read(struct clocksource *clksrc) +static u64 nps_clksrc_read(struct clocksource *clksrc) { int cluster = raw_smp_processor_id() >> NPS_CLUSTER_OFFSET; - return (cycle_t)ioread32be(nps_msu_reg_low_addr[cluster]); + return (u64)ioread32be(nps_msu_reg_low_addr[cluster]); } static int __init nps_setup_clocksource(struct device_node *node) diff --git a/drivers/clocksource/timer-prima2.c b/drivers/clocksource/timer-prima2.c index c32148ec7a38..bfa981ac1eaf 100644 --- a/drivers/clocksource/timer-prima2.c +++ b/drivers/clocksource/timer-prima2.c @@ -72,7 +72,7 @@ static irqreturn_t sirfsoc_timer_interrupt(int irq, void *dev_id) } /* read 64-bit timer counter */ -static cycle_t notrace sirfsoc_timer_read(struct clocksource *cs) +static u64 notrace sirfsoc_timer_read(struct clocksource *cs) { u64 cycles; diff --git a/drivers/clocksource/timer-sun5i.c b/drivers/clocksource/timer-sun5i.c index 4f87f3e76d83..a3e662b15964 100644 --- a/drivers/clocksource/timer-sun5i.c +++ b/drivers/clocksource/timer-sun5i.c @@ -152,7 +152,7 @@ static irqreturn_t sun5i_timer_interrupt(int irq, void *dev_id) return IRQ_HANDLED; } -static cycle_t sun5i_clksrc_read(struct clocksource *clksrc) +static u64 sun5i_clksrc_read(struct clocksource *clksrc) { struct sun5i_timer_clksrc *cs = to_sun5i_timer_clksrc(clksrc); diff --git a/drivers/clocksource/timer-ti-32k.c b/drivers/clocksource/timer-ti-32k.c index cf5b14e442e4..624067712ef0 100644 --- a/drivers/clocksource/timer-ti-32k.c +++ b/drivers/clocksource/timer-ti-32k.c @@ -65,11 +65,11 @@ static inline struct ti_32k *to_ti_32k(struct clocksource *cs) return container_of(cs, struct ti_32k, cs); } -static cycle_t notrace ti_32k_read_cycles(struct clocksource *cs) +static u64 notrace ti_32k_read_cycles(struct clocksource *cs) { struct ti_32k *ti = to_ti_32k(cs); - return (cycle_t)readl_relaxed(ti->counter); + return (u64)readl_relaxed(ti->counter); } static struct ti_32k ti_32k_timer = { diff --git a/drivers/clocksource/vt8500_timer.c b/drivers/clocksource/vt8500_timer.c index b15069483fbd..d02b51075ad1 100644 --- a/drivers/clocksource/vt8500_timer.c +++ b/drivers/clocksource/vt8500_timer.c @@ -53,7 +53,7 @@ static void __iomem *regbase; -static cycle_t vt8500_timer_read(struct clocksource *cs) +static u64 vt8500_timer_read(struct clocksource *cs) { int loops = msecs_to_loops(10); writel(3, regbase + TIMER_CTRL_VAL); @@ -75,7 +75,7 @@ static int vt8500_timer_set_next_event(unsigned long cycles, struct clock_event_device *evt) { int loops = msecs_to_loops(10); - cycle_t alarm = clocksource.read(&clocksource) + cycles; + u64 alarm = clocksource.read(&clocksource) + cycles; while ((readl(regbase + TIMER_AS_VAL) & TIMER_MATCH_W_ACTIVE) && --loops) cpu_relax(); -- cgit v1.2.3-59-g8ed1b