From 8ee273e516a096ee00b3be7cc15c8924aa3b1ef1 Mon Sep 17 00:00:00 2001 From: Feifei Xu Date: Fri, 23 Mar 2018 14:42:28 -0500 Subject: drm/amdgpu/soc15: dynamic initialize ip offset for vega20 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Vega20 need a seperate vega20_reg_init.c due to ip base offset difference. Reviewed-by: Christian König Signed-off-by: Feifei Xu Reviewed-by: Hawking Zhang Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/soc15.h | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/gpu/drm/amd/amdgpu/soc15.h') diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.h b/drivers/gpu/drm/amd/amdgpu/soc15.h index f70da8a29f86..1f714b7af520 100644 --- a/drivers/gpu/drm/amd/amdgpu/soc15.h +++ b/drivers/gpu/drm/amd/amdgpu/soc15.h @@ -55,5 +55,6 @@ void soc15_program_register_sequence(struct amdgpu_device *adev, const u32 array_size); int vega10_reg_base_init(struct amdgpu_device *adev); +int vega20_reg_base_init(struct amdgpu_device *adev); #endif -- cgit v1.2.3-59-g8ed1b