From 6caf36a4f4610b05b32c27b7cc21119fccd54dfa Mon Sep 17 00:00:00 2001 From: Rodrigo Vivi Date: Mon, 12 Jan 2015 10:14:30 -0800 Subject: drm/i915: PSR HSW/BDW: Fix inverted logic at sink main_link_active bit. We have only two possible states with so many names and combinations that might be confusing. 1 - Main link active / enabled / stand by / on 2 - Main link disabled / off / full off Let's start organizing it by fixing a inverted logic when setting the sink bit. Signed-off-by: Rodrigo Vivi Reviewed-by: Durgadoss R Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_psr.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers/gpu/drm/i915/intel_psr.c') diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c index 3dd88861f417..0af89dbbe4c8 100644 --- a/drivers/gpu/drm/i915/intel_psr.c +++ b/drivers/gpu/drm/i915/intel_psr.c @@ -163,10 +163,10 @@ static void hsw_psr_enable_sink(struct intel_dp *intel_dp) /* Enable PSR in sink */ if (intel_dp->psr_dpcd[1] & DP_PSR_NO_TRAIN_ON_EXIT || only_standby) drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, - DP_PSR_ENABLE & ~DP_PSR_MAIN_LINK_ACTIVE); + DP_PSR_ENABLE | DP_PSR_MAIN_LINK_ACTIVE); else drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, - DP_PSR_ENABLE | DP_PSR_MAIN_LINK_ACTIVE); + DP_PSR_ENABLE & ~DP_PSR_MAIN_LINK_ACTIVE); /* Setup AUX registers */ for (i = 0; i < sizeof(aux_msg); i += 4) -- cgit v1.2.3-59-g8ed1b