From 7f699bd14913423ce971f7b8d725448093eaa51a Mon Sep 17 00:00:00 2001 From: Stefan Popa Date: Tue, 4 Jun 2019 17:58:02 +0300 Subject: iio: frequency: adf4371: Add support for ADF4371 PLL The ADF4371 is a frequency synthesizer with an integrated voltage controlled oscillator (VCO) for phase-locked loops (PLLs). The ADF4371 has an integrated VCO with a fundamental output frequency ranging from 4000 MHz to 8000 MHz. In addition, the VCO frequency is connected to divide by 1, 2, 4, 8, 16, 32, or 64 circuits that allows the user to generate radio frequency (RF) output frequencies as low as 62.5 MHz at RF8x. A frequency multiplier at RF16x generates from 8 GHz to 16 GHz. A frequency quadrupler generates frequencies from 16 GHz to 32 GHz at RF32x. RFAUX8x duplicates the frequency range of RF8x or permits direct access to the VCO output. The driver takes the reference input frequency from the device tree and uses it to calculate and maximize the PFD frequency (frequency of the phase frequency detector). The PFD frequency is further used to calculate the timeouts: synthesizer lock, VCO band selection, automatic level calibration (ALC) and PLL settling time. This initial driver exposes the attributes for setting the frequency and enabling/disabling the different adf4371 channels. Datasheet: Link: https://www.analog.com/media/en/technical-documentation/data-sheets/adf4371.pdf Signed-off-by: Stefan Popa Signed-off-by: Jonathan Cameron --- drivers/iio/frequency/Makefile | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/iio/frequency/Makefile') diff --git a/drivers/iio/frequency/Makefile b/drivers/iio/frequency/Makefile index 2bca03f3e2e3..2ddda77358a4 100644 --- a/drivers/iio/frequency/Makefile +++ b/drivers/iio/frequency/Makefile @@ -5,3 +5,4 @@ # When adding new entries keep the list in alphabetical order obj-$(CONFIG_AD9523) += ad9523.o obj-$(CONFIG_ADF4350) += adf4350.o +obj-$(CONFIG_ADF4371) += adf4371.o -- cgit v1.2.3-59-g8ed1b