From 77b7182ff18dd5a83d938ab42772db5cb82c75b8 Mon Sep 17 00:00:00 2001 From: Dmitry Osipenko Date: Mon, 12 Aug 2019 00:00:41 +0300 Subject: memory: tegra: Ensure timing control debug features are disabled Timing control debug features should be disabled at a boot time, but you never now and hence it's better to disable them explicitly because some of those features are crucial for the driver to do a proper thing. Acked-by: Peter De Schrijver Signed-off-by: Dmitry Osipenko Signed-off-by: Thierry Reding --- drivers/memory/tegra/mc.c | 3 +++ drivers/memory/tegra/mc.h | 2 ++ 2 files changed, 5 insertions(+) (limited to 'drivers/memory') diff --git a/drivers/memory/tegra/mc.c b/drivers/memory/tegra/mc.c index 41ee420275f1..a1f9a0506048 100644 --- a/drivers/memory/tegra/mc.c +++ b/drivers/memory/tegra/mc.c @@ -667,6 +667,9 @@ static int tegra_mc_probe(struct platform_device *pdev) } else #endif { + /* ensure that debug features are disabled */ + mc_writel(mc, 0x00000000, MC_TIMING_CONTROL_DBG); + err = tegra_mc_setup_latency_allowance(mc); if (err < 0) { dev_err(&pdev->dev, diff --git a/drivers/memory/tegra/mc.h b/drivers/memory/tegra/mc.h index 410efc4d7e7b..cd52628c2b96 100644 --- a/drivers/memory/tegra/mc.h +++ b/drivers/memory/tegra/mc.h @@ -30,6 +30,8 @@ #define MC_EMEM_ARB_OVERRIDE 0xe8 #define MC_EMEM_ARB_OVERRIDE_EACK_MASK 0x3 +#define MC_TIMING_CONTROL_DBG 0xf8 + #define MC_TIMING_CONTROL 0xfc #define MC_TIMING_UPDATE BIT(0) -- cgit v1.2.3-59-g8ed1b