From cf67edce22c5d7edc6cad64dbeb1d5d7d0099837 Mon Sep 17 00:00:00 2001 From: Miquel Raynal Date: Thu, 27 May 2021 10:45:48 +0200 Subject: mtd: rawnand: arasan: Use the right DMA mask Xilinx ZynqMP SoC and the Arasan controller support 64-bit DMA addressing. Define the right mask otherwise the default is 32 and some accesses may overflow the default mask. Reported-by: Jorge Courett Signed-off-by: Miquel Raynal Tested-by: Jorge Courett Link: https://lore.kernel.org/linux-mtd/20210527084548.208429-1-miquel.raynal@bootlin.com --- drivers/mtd/nand/raw/arasan-nand-controller.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'drivers/mtd') diff --git a/drivers/mtd/nand/raw/arasan-nand-controller.c b/drivers/mtd/nand/raw/arasan-nand-controller.c index 97e5a336a760..f9b5b140720b 100644 --- a/drivers/mtd/nand/raw/arasan-nand-controller.c +++ b/drivers/mtd/nand/raw/arasan-nand-controller.c @@ -1398,6 +1398,10 @@ static int anfc_probe(struct platform_device *pdev) if (ret) goto disable_controller_clk; + ret = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)); + if (ret) + goto disable_bus_clk; + ret = anfc_parse_cs(nfc); if (ret) goto disable_bus_clk; -- cgit v1.2.3-59-g8ed1b