From 10cf8300ecada10f4bd6c9be78439cce98ae6d8b Mon Sep 17 00:00:00 2001 From: Thomas Bogendoerfer Date: Thu, 9 Jan 2020 11:34:28 +0100 Subject: MIPS: SGI-IP27: fix readb/writeb addressing Our chosen byte swapping, which is what firmware already uses, is to do readl/writel by normal lw/sw intructions (data invariance). This also means we need to mangle addresses for u8 and u16 accesses. The mangling for 16bit has been done aready, but 8bit one was missing. Correcting this causes different addresses for accesses to the SuperIO and local bus of the IOC3 chip. This is fixed by changing byte order in ioc3 and m48rtc_rtc structs. Acked-by: Alexandre Belloni Signed-off-by: Thomas Bogendoerfer Signed-off-by: Paul Burton Cc: Ralf Baechle Cc: James Hogan Cc: David S. Miller Cc: Alessandro Zummo Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: netdev@vger.kernel.org Cc: linux-rtc@vger.kernel.org --- drivers/net/ethernet/sgi/ioc3-eth.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'drivers/net/ethernet/sgi') diff --git a/drivers/net/ethernet/sgi/ioc3-eth.c b/drivers/net/ethernet/sgi/ioc3-eth.c index d242906ae233..4ebb58b8572e 100644 --- a/drivers/net/ethernet/sgi/ioc3-eth.c +++ b/drivers/net/ethernet/sgi/ioc3-eth.c @@ -1079,6 +1079,16 @@ static int ioc3_is_menet(struct pci_dev *pdev) * Can't use UPF_IOREMAP as the whole of IOC3 resources have already been * registered. */ +static unsigned int ioc3_serial_in(struct uart_port *p, int offset) +{ + return readb(p->membase + (offset ^ 3)); +} + +static void ioc3_serial_out(struct uart_port *p, int offset, int value) +{ + writeb(value, p->membase + (offset ^ 3)); +} + static void ioc3_8250_register(struct ioc3_uartregs __iomem *uart) { #define COSMISC_CONSTANT 6 @@ -1093,6 +1103,8 @@ static void ioc3_8250_register(struct ioc3_uartregs __iomem *uart) .membase = (unsigned char __iomem *)uart, .mapbase = (unsigned long)uart, + .serial_in = ioc3_serial_in, + .serial_out = ioc3_serial_out, } }; unsigned char lcr; -- cgit v1.2.3-59-g8ed1b