From a3a0641599cd48865d67b098d6d88b5ba66ef860 Mon Sep 17 00:00:00 2001 From: Nishad Kamdar Date: Wed, 27 Nov 2019 19:32:33 +0530 Subject: phy: qcom-qmp: Use the correct style for SPDX License Identifier This patch corrects the SPDX License Identifier style in header files related to PHY drivers for Qualcomm platforms. For C header files Documentation/process/license-rules.rst mandates C-like comments (opposed to C source files where C++ style should be used). Changes made by using a script provided by Joe Perches here: https://lkml.org/lkml/2019/2/7/46. Suggested-by: Joe Perches Signed-off-by: Nishad Kamdar Signed-off-by: Kishon Vijay Abraham I --- drivers/phy/qualcomm/phy-qcom-qmp.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/phy/qualcomm') diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.h b/drivers/phy/qualcomm/phy-qcom-qmp.h index ab6ff9b45a32..90f793c2293d 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp.h +++ b/drivers/phy/qualcomm/phy-qcom-qmp.h @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0 +/* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (c) 2017, The Linux Foundation. All rights reserved. */ -- cgit v1.2.3-59-g8ed1b From a89806c998ee123bb9c0f18526e55afd12c0c0ab Mon Sep 17 00:00:00 2001 From: Nathan Chancellor Date: Tue, 17 Dec 2019 18:36:37 -0700 Subject: phy: qualcomm: Adjust indentation in read_poll_timeout Clang warns: ../drivers/phy/qualcomm/phy-qcom-apq8064-sata.c:83:4: warning: misleading indentation; statement is not part of the previous 'if' [-Wmisleading-indentation] usleep_range(DELAY_INTERVAL_US, DELAY_INTERVAL_US + 50); ^ ../drivers/phy/qualcomm/phy-qcom-apq8064-sata.c:80:3: note: previous statement is here if (readl_relaxed(addr) & mask) ^ 1 warning generated. This warning occurs because there is a space after the tab on this line. Remove it so that the indentation is consistent with the Linux kernel coding style and clang no longer warns. Fixes: 1de990d8a169 ("phy: qcom: Add driver for QCOM APQ8064 SATA PHY") Link: https://github.com/ClangBuiltLinux/linux/issues/816 Signed-off-by: Nathan Chancellor Reviewed-by: Bjorn Andersson Signed-off-by: Kishon Vijay Abraham I --- drivers/phy/qualcomm/phy-qcom-apq8064-sata.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/phy/qualcomm') diff --git a/drivers/phy/qualcomm/phy-qcom-apq8064-sata.c b/drivers/phy/qualcomm/phy-qcom-apq8064-sata.c index 42bc5150dd92..febe0aef68d4 100644 --- a/drivers/phy/qualcomm/phy-qcom-apq8064-sata.c +++ b/drivers/phy/qualcomm/phy-qcom-apq8064-sata.c @@ -80,7 +80,7 @@ static int read_poll_timeout(void __iomem *addr, u32 mask) if (readl_relaxed(addr) & mask) return 0; - usleep_range(DELAY_INTERVAL_US, DELAY_INTERVAL_US + 50); + usleep_range(DELAY_INTERVAL_US, DELAY_INTERVAL_US + 50); } while (!time_after(jiffies, timeout)); return (readl_relaxed(addr) & mask) ? 0 : -ETIMEDOUT; -- cgit v1.2.3-59-g8ed1b From 730430dceeb55957169c5a33df88720db0673a9b Mon Sep 17 00:00:00 2001 From: Vinod Koul Date: Mon, 23 Dec 2019 20:00:43 +0530 Subject: phy: qcom-qmp: Use register defines We already define register offsets so use them in register layout. Signed-off-by: Vinod Koul Reviewed-by: Manu Gautam Reviewed-by: Can Guo Signed-off-by: Kishon Vijay Abraham I --- drivers/phy/qualcomm/phy-qcom-qmp.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers/phy/qualcomm') diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c index 091e20303a14..7f6ff5da7233 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp.c @@ -166,8 +166,8 @@ static const unsigned int sdm845_ufsphy_regs_layout[] = { }; static const unsigned int sm8150_ufsphy_regs_layout[] = { - [QPHY_START_CTRL] = 0x00, - [QPHY_PCS_READY_STATUS] = 0x180, + [QPHY_START_CTRL] = QPHY_V4_PHY_START, + [QPHY_PCS_READY_STATUS] = QPHY_V4_PCS_READY_STATUS, }; static const struct qmp_phy_init_tbl msm8996_pcie_serdes_tbl[] = { -- cgit v1.2.3-59-g8ed1b From 01240af0138b9fa76a17e12b31a33fbce30c5786 Mon Sep 17 00:00:00 2001 From: Vinod Koul Date: Mon, 23 Dec 2019 20:00:44 +0530 Subject: phy: qcom-qmp: remove duplicate powerdown write We already write to QPHY_POWER_DOWN_CONTROL in qcom_qmp_phy_com_init() before invoking qcom_qmp_phy_configure() so remove the duplicate write. Signed-off-by: Vinod Koul Reviewed-by: Manu Gautam Signed-off-by: Kishon Vijay Abraham I --- drivers/phy/qualcomm/phy-qcom-qmp.c | 1 - 1 file changed, 1 deletion(-) (limited to 'drivers/phy/qualcomm') diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c index 7f6ff5da7233..aece1a9fb9aa 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp.c @@ -885,7 +885,6 @@ static const struct qmp_phy_init_tbl msm8998_usb3_pcs_tbl[] = { }; static const struct qmp_phy_init_tbl sm8150_ufsphy_serdes_tbl[] = { - QMP_PHY_INIT_CFG(QPHY_POWER_DOWN_CONTROL, 0x01), QMP_PHY_INIT_CFG(QSERDES_V4_COM_SYSCLK_EN_SEL, 0xd9), QMP_PHY_INIT_CFG(QSERDES_V4_COM_HSCLK_SEL, 0x11), QMP_PHY_INIT_CFG(QSERDES_V4_COM_HSCLK_HS_SWITCH_SEL, 0x00), -- cgit v1.2.3-59-g8ed1b From 7d59e8e8fdd0d690c7b6956d591125321a508c5f Mon Sep 17 00:00:00 2001 From: Vinod Koul Date: Mon, 23 Dec 2019 20:00:45 +0530 Subject: phy: qcom-qmp: remove no_pcs_sw_reset for sm8150 SM8150 QMPY phy for UFS and onwards the PHY_SW_RESET is present in PHY's PCS register so we should not mark no_pcs_sw_reset for sm8150 and onwards Signed-off-by: Vinod Koul Reviewed-by: Manu Gautam Reviewed-by: Can Guo Signed-off-by: Kishon Vijay Abraham I --- drivers/phy/qualcomm/phy-qcom-qmp.c | 1 - 1 file changed, 1 deletion(-) (limited to 'drivers/phy/qualcomm') diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c index aece1a9fb9aa..dee5616253f5 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp.c @@ -1389,7 +1389,6 @@ static const struct qmp_phy_cfg sm8150_ufsphy_cfg = { .pwrdn_ctrl = SW_PWRDN, .is_dual_lane_phy = true, - .no_pcs_sw_reset = true, }; static void qcom_qmp_phy_configure(void __iomem *base, -- cgit v1.2.3-59-g8ed1b From d0312fdbf3e1dc34bc370b17fee290921cf9b814 Mon Sep 17 00:00:00 2001 From: Vinod Koul Date: Mon, 23 Dec 2019 20:00:46 +0530 Subject: phy: qcom-qmp: Add SW reset register For V4 QMP UFS Phy, we need to assert reset bits, configure the phy and then deassert it, so add the QPHY_SW_RESET register which does this. Signed-off-by: Vinod Koul Reviewed-by: Manu Gautam Reviewed-by: Can Guo Signed-off-by: Kishon Vijay Abraham I --- drivers/phy/qualcomm/phy-qcom-qmp.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/phy/qualcomm') diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c index dee5616253f5..45c9de4a6f55 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp.c @@ -168,6 +168,7 @@ static const unsigned int sdm845_ufsphy_regs_layout[] = { static const unsigned int sm8150_ufsphy_regs_layout[] = { [QPHY_START_CTRL] = QPHY_V4_PHY_START, [QPHY_PCS_READY_STATUS] = QPHY_V4_PCS_READY_STATUS, + [QPHY_SW_RESET] = QPHY_V4_SW_RESET, }; static const struct qmp_phy_init_tbl msm8996_pcie_serdes_tbl[] = { -- cgit v1.2.3-59-g8ed1b