From c582935c00227b4efc79630b149b1f077d7716b2 Mon Sep 17 00:00:00 2001 From: Tomi Valkeinen Date: Fri, 10 Apr 2015 12:48:36 +0300 Subject: OMAPDSS: DISPC: fix 64 bit issue in 5-tap The DISPC driver uses 64 bit arithmetic to calculate the required clock rate for scaling. The code does not seem to work correctly, and instead calculates with 32 bit numbers, giving wrong result. Fix the code by typecasting values to u64 first, so that the calculations do happen in 64 bits. Signed-off-by: Tomi Valkeinen --- drivers/video/fbdev/omap2/dss/dispc.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'drivers/video/fbdev') diff --git a/drivers/video/fbdev/omap2/dss/dispc.c b/drivers/video/fbdev/omap2/dss/dispc.c index 4488d9367bd3..2db1c986e989 100644 --- a/drivers/video/fbdev/omap2/dss/dispc.c +++ b/drivers/video/fbdev/omap2/dss/dispc.c @@ -2166,7 +2166,7 @@ static unsigned long calc_core_clk_five_taps(unsigned long pclk, if (height > out_height) { unsigned int ppl = mgr_timings->x_res; - tmp = pclk * height * out_width; + tmp = (u64)pclk * height * out_width; do_div(tmp, 2 * out_height * ppl); core_clk = tmp; @@ -2174,14 +2174,14 @@ static unsigned long calc_core_clk_five_taps(unsigned long pclk, if (ppl == out_width) return 0; - tmp = pclk * (height - 2 * out_height) * out_width; + tmp = (u64)pclk * (height - 2 * out_height) * out_width; do_div(tmp, 2 * out_height * (ppl - out_width)); core_clk = max_t(u32, core_clk, tmp); } } if (width > out_width) { - tmp = pclk * width; + tmp = (u64)pclk * width; do_div(tmp, out_width); core_clk = max_t(u32, core_clk, tmp); -- cgit v1.2.3-59-g8ed1b