From aec5e0e1c179fac4bbca4007a3f0d3107275a73c Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Mon, 25 Dec 2006 09:51:47 +0900 Subject: sh: Use a per-cpu ASID cache. Previously this was implemented using a global cache, cache this per-CPU instead and bump up the number of context IDs to match NR_CPUS. Signed-off-by: Paul Mundt --- include/asm-sh/mmu.h | 20 +++++++------------- 1 file changed, 7 insertions(+), 13 deletions(-) (limited to 'include/asm-sh/mmu.h') diff --git a/include/asm-sh/mmu.h b/include/asm-sh/mmu.h index cf47df79bb94..eb0358c097d0 100644 --- a/include/asm-sh/mmu.h +++ b/include/asm-sh/mmu.h @@ -1,25 +1,19 @@ #ifndef __MMU_H #define __MMU_H -#if !defined(CONFIG_MMU) +/* Default "unsigned long" context */ +typedef unsigned long mm_context_id_t[NR_CPUS]; typedef struct { +#ifdef CONFIG_MMU + mm_context_id_t id; + void *vdso; +#else struct vm_list_struct *vmlist; unsigned long end_brk; +#endif } mm_context_t; -#else - -/* Default "unsigned long" context */ -typedef unsigned long mm_context_id_t; - -typedef struct { - mm_context_id_t id; - void *vdso; -} mm_context_t; - -#endif /* CONFIG_MMU */ - /* * Privileged Space Mapping Buffer (PMB) definitions */ -- cgit v1.2.3-59-g8ed1b