From 55183e9bb2c2ce43d88eaa575c2d6d4fd6d865a3 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 21 Nov 2007 16:19:12 +0900 Subject: sh: SH-5 uses a 64-bit PTE_MAGNITUDE, as X2 TLB. Signed-off-by: Paul Mundt --- include/asm-sh/pgtable.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include/asm-sh') diff --git a/include/asm-sh/pgtable.h b/include/asm-sh/pgtable.h index 5a800c69e049..b4d7561cd9e0 100644 --- a/include/asm-sh/pgtable.h +++ b/include/asm-sh/pgtable.h @@ -49,7 +49,7 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]; * traditional two-level paging structure */ /* PTE bits */ -#ifdef CONFIG_X2TLB +#if defined(CONFIG_X2TLB) || defined(CONFIG_SUPERH64) # define PTE_MAGNITUDE 3 /* 64-bit PTEs on extended mode SH-X2 TLB */ #else # define PTE_MAGNITUDE 2 /* 32-bit PTEs */ -- cgit v1.2.3-59-g8ed1b