From d29d41e28eea65493395dda0b6d1fff23ca374f4 Mon Sep 17 00:00:00 2001 From: Jaska Uimonen Date: Fri, 7 May 2021 10:02:46 +0300 Subject: ASoC: topology: Add support for multiple kcontrol types to a widget Current dapm widget has a single variable to describe its kcontrol's type. As there can be many kcontrols in one widget it is inherently presumed that the types are the same. Lately there has been use cases where different types of kcontrols would be needed for a single widget. Thus add pointer to dapm widget to hold an array for different kcontrol types and modify the kcontrol creation to operate in a loop based on individual kcontrol type. Change control creation and deletion to use individual kcontrol types in SOF driver. This is done in the same patch for not breaking bisect. SOF driver is also currently the only one using the dapm widget kcontrol_type. Signed-off-by: Jaska Uimonen Reviewed-by: Guennadi Liakhovetski Reviewed-by: Ranjani Sridharan Link: https://lore.kernel.org/r/20210507070246.404446-1-jaska.uimonen@linux.intel.com Signed-off-by: Mark Brown --- include/sound/soc-topology.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/sound/soc-topology.h b/include/sound/soc-topology.h index 328cf763d9b4..4afd667e124c 100644 --- a/include/sound/soc-topology.h +++ b/include/sound/soc-topology.h @@ -54,7 +54,7 @@ struct snd_soc_dobj_control { /* dynamic widget object */ struct snd_soc_dobj_widget { - unsigned int kcontrol_type; /* kcontrol type: mixer, enum, bytes */ + unsigned int *kcontrol_type; /* kcontrol type: mixer, enum, bytes */ }; /* generic dynamic object - all dynamic objects belong to this struct */ -- cgit v1.3-18-gd494 From 4a1c456a57c3366d736548ad4d09eb3aa0b9ddaf Mon Sep 17 00:00:00 2001 From: Chris Morgan Date: Wed, 19 May 2021 15:37:51 -0500 Subject: mfd: Add Rockchip rk817 audio CODEC support Add rk817 codec support cell to rk808 mfd driver. Signed-off-by: Chris Morgan Tested-by: Maciej Matuszczyk Signed-off-by: Lee Jones --- drivers/mfd/rk808.c | 81 +++++++++++++++++++++++++++++++++++++++++++++++ include/linux/mfd/rk808.h | 81 +++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 162 insertions(+) (limited to 'include') diff --git a/drivers/mfd/rk808.c b/drivers/mfd/rk808.c index ad923dd4e007..77ccd31ca1d9 100644 --- a/drivers/mfd/rk808.c +++ b/drivers/mfd/rk808.c @@ -65,6 +65,7 @@ static bool rk817_is_volatile_reg(struct device *dev, unsigned int reg) switch (reg) { case RK817_SECONDS_REG ... RK817_WEEKS_REG: case RK817_RTC_STATUS_REG: + case RK817_CODEC_DTOP_LPT_SRST: case RK817_INT_STS_REG0: case RK817_INT_STS_REG1: case RK817_INT_STS_REG2: @@ -163,6 +164,7 @@ static const struct mfd_cell rk817s[] = { .num_resources = ARRAY_SIZE(rk817_rtc_resources), .resources = &rk817_rtc_resources[0], }, + { .name = "rk817-codec",}, }; static const struct mfd_cell rk818s[] = { @@ -201,6 +203,85 @@ static const struct rk808_reg_data rk808_pre_init_reg[] = { static const struct rk808_reg_data rk817_pre_init_reg[] = { {RK817_RTC_CTRL_REG, RTC_STOP, RTC_STOP}, + /* Codec specific registers */ + { RK817_CODEC_DTOP_VUCTL, MASK_ALL, 0x03 }, + { RK817_CODEC_DTOP_VUCTIME, MASK_ALL, 0x00 }, + { RK817_CODEC_DTOP_LPT_SRST, MASK_ALL, 0x00 }, + { RK817_CODEC_DTOP_DIGEN_CLKE, MASK_ALL, 0x00 }, + /* from vendor driver, CODEC_AREF_RTCFG0 not defined in data sheet */ + { RK817_CODEC_AREF_RTCFG0, MASK_ALL, 0x00 }, + { RK817_CODEC_AREF_RTCFG1, MASK_ALL, 0x06 }, + { RK817_CODEC_AADC_CFG0, MASK_ALL, 0xc8 }, + /* from vendor driver, CODEC_AADC_CFG1 not defined in data sheet */ + { RK817_CODEC_AADC_CFG1, MASK_ALL, 0x00 }, + { RK817_CODEC_DADC_VOLL, MASK_ALL, 0x00 }, + { RK817_CODEC_DADC_VOLR, MASK_ALL, 0x00 }, + { RK817_CODEC_DADC_SR_ACL0, MASK_ALL, 0x00 }, + { RK817_CODEC_DADC_ALC1, MASK_ALL, 0x00 }, + { RK817_CODEC_DADC_ALC2, MASK_ALL, 0x00 }, + { RK817_CODEC_DADC_NG, MASK_ALL, 0x00 }, + { RK817_CODEC_DADC_HPF, MASK_ALL, 0x00 }, + { RK817_CODEC_DADC_RVOLL, MASK_ALL, 0xff }, + { RK817_CODEC_DADC_RVOLR, MASK_ALL, 0xff }, + { RK817_CODEC_AMIC_CFG0, MASK_ALL, 0x70 }, + { RK817_CODEC_AMIC_CFG1, MASK_ALL, 0x00 }, + { RK817_CODEC_DMIC_PGA_GAIN, MASK_ALL, 0x66 }, + { RK817_CODEC_DMIC_LMT1, MASK_ALL, 0x00 }, + { RK817_CODEC_DMIC_LMT2, MASK_ALL, 0x00 }, + { RK817_CODEC_DMIC_NG1, MASK_ALL, 0x00 }, + { RK817_CODEC_DMIC_NG2, MASK_ALL, 0x00 }, + /* from vendor driver, CODEC_ADAC_CFG0 not defined in data sheet */ + { RK817_CODEC_ADAC_CFG0, MASK_ALL, 0x00 }, + { RK817_CODEC_ADAC_CFG1, MASK_ALL, 0x07 }, + { RK817_CODEC_DDAC_POPD_DACST, MASK_ALL, 0x82 }, + { RK817_CODEC_DDAC_VOLL, MASK_ALL, 0x00 }, + { RK817_CODEC_DDAC_VOLR, MASK_ALL, 0x00 }, + { RK817_CODEC_DDAC_SR_LMT0, MASK_ALL, 0x00 }, + { RK817_CODEC_DDAC_LMT1, MASK_ALL, 0x00 }, + { RK817_CODEC_DDAC_LMT2, MASK_ALL, 0x00 }, + { RK817_CODEC_DDAC_MUTE_MIXCTL, MASK_ALL, 0xa0 }, + { RK817_CODEC_DDAC_RVOLL, MASK_ALL, 0xff }, + { RK817_CODEC_DADC_RVOLR, MASK_ALL, 0xff }, + { RK817_CODEC_AMIC_CFG0, MASK_ALL, 0x70 }, + { RK817_CODEC_AMIC_CFG1, MASK_ALL, 0x00 }, + { RK817_CODEC_DMIC_PGA_GAIN, MASK_ALL, 0x66 }, + { RK817_CODEC_DMIC_LMT1, MASK_ALL, 0x00 }, + { RK817_CODEC_DMIC_LMT2, MASK_ALL, 0x00 }, + { RK817_CODEC_DMIC_NG1, MASK_ALL, 0x00 }, + { RK817_CODEC_DMIC_NG2, MASK_ALL, 0x00 }, + /* from vendor driver, CODEC_ADAC_CFG0 not defined in data sheet */ + { RK817_CODEC_ADAC_CFG0, MASK_ALL, 0x00 }, + { RK817_CODEC_ADAC_CFG1, MASK_ALL, 0x07 }, + { RK817_CODEC_DDAC_POPD_DACST, MASK_ALL, 0x82 }, + { RK817_CODEC_DDAC_VOLL, MASK_ALL, 0x00 }, + { RK817_CODEC_DDAC_VOLR, MASK_ALL, 0x00 }, + { RK817_CODEC_DDAC_SR_LMT0, MASK_ALL, 0x00 }, + { RK817_CODEC_DDAC_LMT1, MASK_ALL, 0x00 }, + { RK817_CODEC_DDAC_LMT2, MASK_ALL, 0x00 }, + { RK817_CODEC_DDAC_MUTE_MIXCTL, MASK_ALL, 0xa0 }, + { RK817_CODEC_DDAC_RVOLL, MASK_ALL, 0xff }, + { RK817_CODEC_DDAC_RVOLR, MASK_ALL, 0xff }, + { RK817_CODEC_AHP_ANTI0, MASK_ALL, 0x00 }, + { RK817_CODEC_AHP_ANTI1, MASK_ALL, 0x00 }, + { RK817_CODEC_AHP_CFG0, MASK_ALL, 0xe0 }, + { RK817_CODEC_AHP_CFG1, MASK_ALL, 0x1f }, + { RK817_CODEC_AHP_CP, MASK_ALL, 0x09 }, + { RK817_CODEC_ACLASSD_CFG1, MASK_ALL, 0x69 }, + { RK817_CODEC_ACLASSD_CFG2, MASK_ALL, 0x44 }, + { RK817_CODEC_APLL_CFG0, MASK_ALL, 0x04 }, + { RK817_CODEC_APLL_CFG1, MASK_ALL, 0x00 }, + { RK817_CODEC_APLL_CFG2, MASK_ALL, 0x30 }, + { RK817_CODEC_APLL_CFG3, MASK_ALL, 0x19 }, + { RK817_CODEC_APLL_CFG4, MASK_ALL, 0x65 }, + { RK817_CODEC_APLL_CFG5, MASK_ALL, 0x01 }, + { RK817_CODEC_DI2S_CKM, MASK_ALL, 0x01 }, + { RK817_CODEC_DI2S_RSD, MASK_ALL, 0x00 }, + { RK817_CODEC_DI2S_RXCR1, MASK_ALL, 0x00 }, + { RK817_CODEC_DI2S_RXCR2, MASK_ALL, 0x17 }, + { RK817_CODEC_DI2S_RXCMD_TSD, MASK_ALL, 0x00 }, + { RK817_CODEC_DI2S_TXCR1, MASK_ALL, 0x00 }, + { RK817_CODEC_DI2S_TXCR2, MASK_ALL, 0x17 }, + { RK817_CODEC_DI2S_TXCR3_TXCMD, MASK_ALL, 0x00 }, {RK817_GPIO_INT_CFG, RK817_INT_POL_MSK, RK817_INT_POL_L}, {RK817_SYS_CFG(1), RK817_HOTDIE_TEMP_MSK | RK817_TSD_TEMP_MSK, RK817_HOTDIE_105 | RK817_TSD_140}, diff --git a/include/linux/mfd/rk808.h b/include/linux/mfd/rk808.h index e07f6e61cd38..a96e6d43ca06 100644 --- a/include/linux/mfd/rk808.h +++ b/include/linux/mfd/rk808.h @@ -437,6 +437,87 @@ enum rk809_reg_id { #define RK817_RTC_COMP_LSB_REG 0x10 #define RK817_RTC_COMP_MSB_REG 0x11 +/* RK817 Codec Registers */ +#define RK817_CODEC_DTOP_VUCTL 0x12 +#define RK817_CODEC_DTOP_VUCTIME 0x13 +#define RK817_CODEC_DTOP_LPT_SRST 0x14 +#define RK817_CODEC_DTOP_DIGEN_CLKE 0x15 +#define RK817_CODEC_AREF_RTCFG0 0x16 +#define RK817_CODEC_AREF_RTCFG1 0x17 +#define RK817_CODEC_AADC_CFG0 0x18 +#define RK817_CODEC_AADC_CFG1 0x19 +#define RK817_CODEC_DADC_VOLL 0x1a +#define RK817_CODEC_DADC_VOLR 0x1b +#define RK817_CODEC_DADC_SR_ACL0 0x1e +#define RK817_CODEC_DADC_ALC1 0x1f +#define RK817_CODEC_DADC_ALC2 0x20 +#define RK817_CODEC_DADC_NG 0x21 +#define RK817_CODEC_DADC_HPF 0x22 +#define RK817_CODEC_DADC_RVOLL 0x23 +#define RK817_CODEC_DADC_RVOLR 0x24 +#define RK817_CODEC_AMIC_CFG0 0x27 +#define RK817_CODEC_AMIC_CFG1 0x28 +#define RK817_CODEC_DMIC_PGA_GAIN 0x29 +#define RK817_CODEC_DMIC_LMT1 0x2a +#define RK817_CODEC_DMIC_LMT2 0x2b +#define RK817_CODEC_DMIC_NG1 0x2c +#define RK817_CODEC_DMIC_NG2 0x2d +#define RK817_CODEC_ADAC_CFG0 0x2e +#define RK817_CODEC_ADAC_CFG1 0x2f +#define RK817_CODEC_DDAC_POPD_DACST 0x30 +#define RK817_CODEC_DDAC_VOLL 0x31 +#define RK817_CODEC_DDAC_VOLR 0x32 +#define RK817_CODEC_DDAC_SR_LMT0 0x35 +#define RK817_CODEC_DDAC_LMT1 0x36 +#define RK817_CODEC_DDAC_LMT2 0x37 +#define RK817_CODEC_DDAC_MUTE_MIXCTL 0x38 +#define RK817_CODEC_DDAC_RVOLL 0x39 +#define RK817_CODEC_DDAC_RVOLR 0x3a +#define RK817_CODEC_AHP_ANTI0 0x3b +#define RK817_CODEC_AHP_ANTI1 0x3c +#define RK817_CODEC_AHP_CFG0 0x3d +#define RK817_CODEC_AHP_CFG1 0x3e +#define RK817_CODEC_AHP_CP 0x3f +#define RK817_CODEC_ACLASSD_CFG1 0x40 +#define RK817_CODEC_ACLASSD_CFG2 0x41 +#define RK817_CODEC_APLL_CFG0 0x42 +#define RK817_CODEC_APLL_CFG1 0x43 +#define RK817_CODEC_APLL_CFG2 0x44 +#define RK817_CODEC_APLL_CFG3 0x45 +#define RK817_CODEC_APLL_CFG4 0x46 +#define RK817_CODEC_APLL_CFG5 0x47 +#define RK817_CODEC_DI2S_CKM 0x48 +#define RK817_CODEC_DI2S_RSD 0x49 +#define RK817_CODEC_DI2S_RXCR1 0x4a +#define RK817_CODEC_DI2S_RXCR2 0x4b +#define RK817_CODEC_DI2S_RXCMD_TSD 0x4c +#define RK817_CODEC_DI2S_TXCR1 0x4d +#define RK817_CODEC_DI2S_TXCR2 0x4e +#define RK817_CODEC_DI2S_TXCR3_TXCMD 0x4f + +/* RK817_CODEC_DI2S_CKM */ +#define RK817_I2S_MODE_MASK (0x1 << 0) +#define RK817_I2S_MODE_MST (0x1 << 0) +#define RK817_I2S_MODE_SLV (0x0 << 0) + +/* RK817_CODEC_DDAC_MUTE_MIXCTL */ +#define DACMT_MASK (0x1 << 0) +#define DACMT_ENABLE (0x1 << 0) +#define DACMT_DISABLE (0x0 << 0) + +/* RK817_CODEC_DI2S_RXCR2 */ +#define VDW_RX_24BITS (0x17) +#define VDW_RX_16BITS (0x0f) + +/* RK817_CODEC_DI2S_TXCR2 */ +#define VDW_TX_24BITS (0x17) +#define VDW_TX_16BITS (0x0f) + +/* RK817_CODEC_AMIC_CFG0 */ +#define MIC_DIFF_MASK (0x1 << 7) +#define MIC_DIFF_DIS (0x0 << 7) +#define MIC_DIFF_EN (0x1 << 7) + #define RK817_POWER_EN_REG(i) (0xb1 + (i)) #define RK817_POWER_SLP_EN_REG(i) (0xb5 + (i)) -- cgit v1.3-18-gd494 From 9fb9b1690f0ba6b2c9ced91facc1fc44f5a0d5c1 Mon Sep 17 00:00:00 2001 From: Srinivas Kandagatla Date: Fri, 4 Jun 2021 12:52:29 +0100 Subject: ASoC: codecs: wcd934x: add mbhc support WCD934x has Multi Button Headset Control hardware to support Headset insertion, type detection, 8 headset buttons detection, Over Current detection and Impedence measurements. This patch adds support for this feature via common mbhc layer. Signed-off-by: Srinivas Kandagatla Link: https://lore.kernel.org/r/20210604115230.23259-4-srinivas.kandagatla@linaro.org Signed-off-by: Mark Brown --- include/linux/mfd/wcd934x/registers.h | 57 +++ sound/soc/codecs/Kconfig | 1 + sound/soc/codecs/wcd934x.c | 884 +++++++++++++++++++++++++++++++++- 3 files changed, 927 insertions(+), 15 deletions(-) (limited to 'include') diff --git a/include/linux/mfd/wcd934x/registers.h b/include/linux/mfd/wcd934x/registers.h index bb8d2e276668..76a943c83c63 100644 --- a/include/linux/mfd/wcd934x/registers.h +++ b/include/linux/mfd/wcd934x/registers.h @@ -18,6 +18,8 @@ #define WCD934X_EFUSE_SENSE_STATE_DEF 0x10 #define WCD934X_EFUSE_SENSE_EN_MASK BIT(0) #define WCD934X_EFUSE_SENSE_ENABLE BIT(0) +#define WCD934X_CHIP_TIER_CTRL_EFUSE_VAL_OUT1 0x002a +#define WCD934X_CHIP_TIER_CTRL_EFUSE_VAL_OUT2 0x002b #define WCD934X_CHIP_TIER_CTRL_EFUSE_VAL_OUT14 0x0037 #define WCD934X_CHIP_TIER_CTRL_EFUSE_VAL_OUT15 0x0038 #define WCD934X_CHIP_TIER_CTRL_EFUSE_STATUS 0x0039 @@ -103,21 +105,58 @@ #define WCD934X_ANA_AMIC3 0x0610 #define WCD934X_ANA_AMIC4 0x0611 #define WCD934X_ANA_MBHC_MECH 0x0614 +#define WCD934X_MBHC_L_DET_EN_MASK BIT(7) +#define WCD934X_MBHC_L_DET_EN BIT(7) +#define WCD934X_MBHC_GND_DET_EN_MASK BIT(6) +#define WCD934X_MBHC_MECH_DETECT_TYPE_MASK BIT(5) +#define WCD934X_MBHC_MECH_DETECT_TYPE_INS 1 +#define WCD934X_MBHC_HPHL_PLUG_TYPE_MASK BIT(4) +#define WCD934X_MBHC_HPHL_PLUG_TYPE_NO 1 +#define WCD934X_MBHC_GND_PLUG_TYPE_MASK BIT(3) +#define WCD934X_MBHC_GND_PLUG_TYPE_NO 1 +#define WCD934X_MBHC_HSL_PULLUP_COMP_EN BIT(2) +#define WCD934X_MBHC_HSG_PULLUP_COMP_EN BIT(1) +#define WCD934X_MBHC_HPHL_100K_TO_GND_EN BIT(0) #define WCD934X_ANA_MBHC_ELECT 0x0615 +#define WCD934X_ANA_MBHC_BIAS_EN_MASK BIT(0) +#define WCD934X_ANA_MBHC_BIAS_EN BIT(0) #define WCD934X_ANA_MBHC_ZDET 0x0616 #define WCD934X_ANA_MBHC_RESULT_1 0x0617 #define WCD934X_ANA_MBHC_RESULT_2 0x0618 #define WCD934X_ANA_MBHC_RESULT_3 0x0619 +#define WCD934X_ANA_MBHC_BTN0 0x061a +#define WCD934X_VTH_MASK GENMASK(7, 2) +#define WCD934X_ANA_MBHC_BTN1 0x061b +#define WCD934X_ANA_MBHC_BTN2 0x061c +#define WCD934X_ANA_MBHC_BTN3 0x061d +#define WCD934X_ANA_MBHC_BTN4 0x061e +#define WCD934X_ANA_MBHC_BTN5 0x061f +#define WCD934X_ANA_MBHC_BTN6 0x0620 +#define WCD934X_ANA_MBHC_BTN7 0x0621 +#define WCD934X_MBHC_BTN_VTH_MASK GENMASK(7, 2) #define WCD934X_ANA_MICB1 0x0622 #define WCD934X_MICB_VAL_MASK GENMASK(5, 0) #define WCD934X_ANA_MICB_EN_MASK GENMASK(7, 6) +#define WCD934X_MICB_DISABLE 0 +#define WCD934X_MICB_ENABLE 1 +#define WCD934X_MICB_PULL_UP 2 +#define WCD934X_MICB_PULL_DOWN 3 #define WCD934X_ANA_MICB_PULL_UP 0x80 #define WCD934X_ANA_MICB_ENABLE 0x40 #define WCD934X_ANA_MICB_DISABLE 0x0 #define WCD934X_ANA_MICB2 0x0623 +#define WCD934X_ANA_MICB2_ENABLE BIT(6) +#define WCD934X_ANA_MICB2_ENABLE_MASK GENMASK(7, 6) +#define WCD934X_ANA_MICB2_VOUT_MASK GENMASK(5, 0) +#define WCD934X_ANA_MICB2_RAMP 0x0624 +#define WCD934X_RAMP_EN_MASK BIT(7) +#define WCD934X_RAMP_SHIFT_CTRL_MASK GENMASK(4, 2) #define WCD934X_ANA_MICB3 0x0625 #define WCD934X_ANA_MICB4 0x0626 #define WCD934X_BIAS_VBG_FINE_ADJ 0x0629 +#define WCD934X_MBHC_CTL_CLK 0x0656 +#define WCD934X_MBHC_CTL_BCS 0x065a +#define WCD934X_MBHC_STATUS_SPARE_1 0x065b #define WCD934X_MICB1_TEST_CTL_1 0x066b #define WCD934X_MICB1_TEST_CTL_2 0x066c #define WCD934X_MICB2_TEST_CTL_1 0x066e @@ -141,7 +180,11 @@ #define WCD934X_HPH_CNP_WG_CTL 0x06cc #define WCD934X_HPH_GM3_BOOST_EN_MASK BIT(7) #define WCD934X_HPH_GM3_BOOST_ENABLE BIT(7) +#define WCD934X_HPH_CNP_WG_TIME 0x06cd #define WCD934X_HPH_OCP_CTL 0x06ce +#define WCD934X_HPH_PA_CTL2 0x06d2 +#define WCD934X_HPHPA_GND_R_MASK BIT(6) +#define WCD934X_HPHPA_GND_L_MASK BIT(4) #define WCD934X_HPH_L_EN 0x06d3 #define WCD934X_HPH_GAIN_SRC_SEL_MASK BIT(5) #define WCD934X_HPH_GAIN_SRC_SEL_COMPANDER 0 @@ -152,6 +195,8 @@ #define WCD934X_HPH_OCP_DET_MASK BIT(0) #define WCD934X_HPH_OCP_DET_ENABLE BIT(0) #define WCD934X_HPH_OCP_DET_DISABLE 0 +#define WCD934X_HPH_R_ATEST 0x06d8 +#define WCD934X_HPHPA_GND_OVR_MASK BIT(1) #define WCD934X_DIFF_LO_LO2_COMPANDER 0x06ea #define WCD934X_DIFF_LO_LO1_COMPANDER 0x06eb #define WCD934X_CLK_SYS_MCLK_PRG 0x0711 @@ -172,7 +217,19 @@ #define WCD934X_SIDO_NEW_VOUT_D_FREQ2 0x071e #define WCD934X_SIDO_RIPPLE_FREQ_EN_MASK BIT(0) #define WCD934X_SIDO_RIPPLE_FREQ_ENABLE BIT(0) +#define WCD934X_MBHC_NEW_CTL_1 0x0720 +#define WCD934X_MBHC_CTL_RCO_EN_MASK BIT(7) +#define WCD935X_MBHC_CTL_RCO_EN BIT(7) #define WCD934X_MBHC_NEW_CTL_2 0x0721 +#define WCD934X_M_RTH_CTL_MASK GENMASK(3, 2) +#define WCD934X_MBHC_NEW_PLUG_DETECT_CTL 0x0722 +#define WCD934X_HSDET_PULLUP_C_MASK GENMASK(7, 6) +#define WCD934X_MBHC_NEW_ZDET_ANA_CTL 0x0723 +#define WCD934X_ZDET_RANGE_CTL_MASK GENMASK(3, 0) +#define WCD934X_ZDET_MAXV_CTL_MASK GENMASK(6, 4) +#define WCD934X_MBHC_NEW_ZDET_RAMP_CTL 0x0724 +#define WCD934X_MBHC_NEW_FSM_STATUS 0x0725 +#define WCD934X_MBHC_NEW_ADC_RESULT 0x0726 #define WCD934X_TX_NEW_AMIC_4_5_SEL 0x0727 #define WCD934X_HPH_NEW_INT_RDAC_HD2_CTL_L 0x0733 #define WCD934X_HPH_NEW_INT_RDAC_OVERRIDE_CTL 0x0735 diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index 71a1ef9063cc..8252f7e9ef71 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -1542,6 +1542,7 @@ config SND_SOC_WCD_MBHC config SND_SOC_WCD934X tristate "WCD9340/WCD9341 Codec" depends on COMMON_CLK + select SND_SOC_WCD_MBHC depends on MFD_WCD934X help The WCD9340/9341 is a audio codec IC Integrated in diff --git a/sound/soc/codecs/wcd934x.c b/sound/soc/codecs/wcd934x.c index 046874ef490e..16fd1ab62609 100644 --- a/sound/soc/codecs/wcd934x.c +++ b/sound/soc/codecs/wcd934x.c @@ -21,6 +21,7 @@ #include #include #include "wcd-clsh-v2.h" +#include "wcd-mbhc-v2.h" #define WCD934X_RATES_MASK (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\ SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 |\ @@ -131,6 +132,24 @@ } \ } +/* Z value defined in milliohm */ +#define WCD934X_ZDET_VAL_32 32000 +#define WCD934X_ZDET_VAL_400 400000 +#define WCD934X_ZDET_VAL_1200 1200000 +#define WCD934X_ZDET_VAL_100K 100000000 +/* Z floating defined in ohms */ +#define WCD934X_ZDET_FLOATING_IMPEDANCE 0x0FFFFFFE + +#define WCD934X_ZDET_NUM_MEASUREMENTS 900 +#define WCD934X_MBHC_GET_C1(c) ((c & 0xC000) >> 14) +#define WCD934X_MBHC_GET_X1(x) (x & 0x3FFF) +/* Z value compared in milliOhm */ +#define WCD934X_MBHC_IS_SECOND_RAMP_REQUIRED(z) ((z > 400000) || (z < 32000)) +#define WCD934X_MBHC_ZDET_CONST (86 * 16384) +#define WCD934X_MBHC_MOISTURE_RREF R_24_KOHM +#define WCD934X_MBHC_MAX_BUTTONS (8) +#define WCD_MBHC_HS_V_MAX 1600 + #define WCD934X_INTERPOLATOR_PATH(id) \ {"RX INT" #id "_1 MIX1 INP0", "RX0", "SLIM RX0"}, \ {"RX INT" #id "_1 MIX1 INP0", "RX1", "SLIM RX1"}, \ @@ -287,12 +306,7 @@ {"AIF3_CAP Mixer", "SLIM TX" #id, "SLIM TX" #id }, \ {"SLIM TX" #id, NULL, "CDC_IF TX" #id " MUX"} -enum { - MIC_BIAS_1 = 1, - MIC_BIAS_2, - MIC_BIAS_3, - MIC_BIAS_4 -}; +#define WCD934X_MAX_MICBIAS MIC_BIAS_4 enum { SIDO_SOURCE_INTERNAL, @@ -486,6 +500,15 @@ static struct interp_sample_rate sr_val_tbl[] = { {352800, 0xC}, }; +struct wcd934x_mbhc_zdet_param { + u16 ldo_ctl; + u16 noff; + u16 nshift; + u16 btn5; + u16 btn6; + u16 btn7; +}; + struct wcd_slim_codec_dai_data { struct list_head slim_ch_list; struct slim_stream_config sconfig; @@ -541,6 +564,18 @@ struct wcd934x_codec { int comp_enabled[COMPANDER_MAX]; int sysclk_users; struct mutex sysclk_mutex; + /* mbhc module */ + struct wcd_mbhc *mbhc; + struct wcd_mbhc_config mbhc_cfg; + struct wcd_mbhc_intr intr_ids; + bool mbhc_started; + struct mutex micb_lock; + u32 micb_ref[WCD934X_MAX_MICBIAS]; + u32 pullup_ref[WCD934X_MAX_MICBIAS]; + u32 micb1_mv; + u32 micb2_mv; + u32 micb3_mv; + u32 micb4_mv; }; #define to_wcd934x_codec(_hw) container_of(_hw, struct wcd934x_codec, hw) @@ -1183,6 +1218,57 @@ static const struct soc_enum cdc_if_tx13_mux_enum = SOC_ENUM_SINGLE(WCD934X_DATA_HUB_SB_TX13_INP_CFG, 0, ARRAY_SIZE(cdc_if_tx13_mux_text), cdc_if_tx13_mux_text); +static struct wcd_mbhc_field wcd_mbhc_fields[WCD_MBHC_REG_FUNC_MAX] = { + WCD_MBHC_FIELD(WCD_MBHC_L_DET_EN, WCD934X_ANA_MBHC_MECH, 0x80), + WCD_MBHC_FIELD(WCD_MBHC_GND_DET_EN, WCD934X_ANA_MBHC_MECH, 0x40), + WCD_MBHC_FIELD(WCD_MBHC_MECH_DETECTION_TYPE, WCD934X_ANA_MBHC_MECH, 0x20), + WCD_MBHC_FIELD(WCD_MBHC_MIC_CLAMP_CTL, WCD934X_MBHC_NEW_PLUG_DETECT_CTL, 0x30), + WCD_MBHC_FIELD(WCD_MBHC_ELECT_DETECTION_TYPE, WCD934X_ANA_MBHC_ELECT, 0x08), + WCD_MBHC_FIELD(WCD_MBHC_HS_L_DET_PULL_UP_CTRL, WCD934X_MBHC_NEW_PLUG_DETECT_CTL, 0xC0), + WCD_MBHC_FIELD(WCD_MBHC_HS_L_DET_PULL_UP_COMP_CTRL, WCD934X_ANA_MBHC_MECH, 0x04), + WCD_MBHC_FIELD(WCD_MBHC_HPHL_PLUG_TYPE, WCD934X_ANA_MBHC_MECH, 0x10), + WCD_MBHC_FIELD(WCD_MBHC_GND_PLUG_TYPE, WCD934X_ANA_MBHC_MECH, 0x08), + WCD_MBHC_FIELD(WCD_MBHC_SW_HPH_LP_100K_TO_GND, WCD934X_ANA_MBHC_MECH, 0x01), + WCD_MBHC_FIELD(WCD_MBHC_ELECT_SCHMT_ISRC, WCD934X_ANA_MBHC_ELECT, 0x06), + WCD_MBHC_FIELD(WCD_MBHC_FSM_EN, WCD934X_ANA_MBHC_ELECT, 0x80), + WCD_MBHC_FIELD(WCD_MBHC_INSREM_DBNC, WCD934X_MBHC_NEW_PLUG_DETECT_CTL, 0x0F), + WCD_MBHC_FIELD(WCD_MBHC_BTN_DBNC, WCD934X_MBHC_NEW_CTL_1, 0x03), + WCD_MBHC_FIELD(WCD_MBHC_HS_VREF, WCD934X_MBHC_NEW_CTL_2, 0x03), + WCD_MBHC_FIELD(WCD_MBHC_HS_COMP_RESULT, WCD934X_ANA_MBHC_RESULT_3, 0x08), + WCD_MBHC_FIELD(WCD_MBHC_IN2P_CLAMP_STATE, WCD934X_ANA_MBHC_RESULT_3, 0x10), + WCD_MBHC_FIELD(WCD_MBHC_MIC_SCHMT_RESULT, WCD934X_ANA_MBHC_RESULT_3, 0x20), + WCD_MBHC_FIELD(WCD_MBHC_HPHL_SCHMT_RESULT, WCD934X_ANA_MBHC_RESULT_3, 0x80), + WCD_MBHC_FIELD(WCD_MBHC_HPHR_SCHMT_RESULT, WCD934X_ANA_MBHC_RESULT_3, 0x40), + WCD_MBHC_FIELD(WCD_MBHC_OCP_FSM_EN, WCD934X_HPH_OCP_CTL, 0x10), + WCD_MBHC_FIELD(WCD_MBHC_BTN_RESULT, WCD934X_ANA_MBHC_RESULT_3, 0x07), + WCD_MBHC_FIELD(WCD_MBHC_BTN_ISRC_CTL, WCD934X_ANA_MBHC_ELECT, 0x70), + WCD_MBHC_FIELD(WCD_MBHC_ELECT_RESULT, WCD934X_ANA_MBHC_RESULT_3, 0xFF), + WCD_MBHC_FIELD(WCD_MBHC_MICB_CTRL, WCD934X_ANA_MICB2, 0xC0), + WCD_MBHC_FIELD(WCD_MBHC_HPH_CNP_WG_TIME, WCD934X_HPH_CNP_WG_TIME, 0xFF), + WCD_MBHC_FIELD(WCD_MBHC_HPHR_PA_EN, WCD934X_ANA_HPH, 0x40), + WCD_MBHC_FIELD(WCD_MBHC_HPHL_PA_EN, WCD934X_ANA_HPH, 0x80), + WCD_MBHC_FIELD(WCD_MBHC_HPH_PA_EN, WCD934X_ANA_HPH, 0xC0), + WCD_MBHC_FIELD(WCD_MBHC_SWCH_LEVEL_REMOVE, WCD934X_ANA_MBHC_RESULT_3, 0x10), + WCD_MBHC_FIELD(WCD_MBHC_ANC_DET_EN, WCD934X_MBHC_CTL_BCS, 0x02), + WCD_MBHC_FIELD(WCD_MBHC_FSM_STATUS, WCD934X_MBHC_STATUS_SPARE_1, 0x01), + WCD_MBHC_FIELD(WCD_MBHC_MUX_CTL, WCD934X_MBHC_NEW_CTL_2, 0x70), + WCD_MBHC_FIELD(WCD_MBHC_MOISTURE_STATUS, WCD934X_MBHC_NEW_FSM_STATUS, 0x20), + WCD_MBHC_FIELD(WCD_MBHC_HPHR_GND, WCD934X_HPH_PA_CTL2, 0x40), + WCD_MBHC_FIELD(WCD_MBHC_HPHL_GND, WCD934X_HPH_PA_CTL2, 0x10), + WCD_MBHC_FIELD(WCD_MBHC_HPHL_OCP_DET_EN, WCD934X_HPH_L_TEST, 0x01), + WCD_MBHC_FIELD(WCD_MBHC_HPHR_OCP_DET_EN, WCD934X_HPH_R_TEST, 0x01), + WCD_MBHC_FIELD(WCD_MBHC_HPHL_OCP_STATUS, WCD934X_INTR_PIN1_STATUS0, 0x04), + WCD_MBHC_FIELD(WCD_MBHC_HPHR_OCP_STATUS, WCD934X_INTR_PIN1_STATUS0, 0x08), + WCD_MBHC_FIELD(WCD_MBHC_ADC_EN, WCD934X_MBHC_NEW_CTL_1, 0x08), + WCD_MBHC_FIELD(WCD_MBHC_ADC_COMPLETE, WCD934X_MBHC_NEW_FSM_STATUS, 0x40), + WCD_MBHC_FIELD(WCD_MBHC_ADC_TIMEOUT, WCD934X_MBHC_NEW_FSM_STATUS, 0x80), + WCD_MBHC_FIELD(WCD_MBHC_ADC_RESULT, WCD934X_MBHC_NEW_ADC_RESULT, 0xFF), + WCD_MBHC_FIELD(WCD_MBHC_MICB2_VOUT, WCD934X_ANA_MICB2, 0x3F), + WCD_MBHC_FIELD(WCD_MBHC_ADC_MODE, WCD934X_MBHC_NEW_CTL_1, 0x10), + WCD_MBHC_FIELD(WCD_MBHC_DETECTION_DONE, WCD934X_MBHC_NEW_CTL_1, 0x04), + WCD_MBHC_FIELD(WCD_MBHC_ELECT_ISRC_EN, WCD934X_ANA_MBHC_ZDET, 0x02), +}; + static int wcd934x_set_sido_input_src(struct wcd934x_codec *wcd, int sido_src) { if (sido_src == wcd->sido_input_src) @@ -2127,7 +2213,8 @@ static struct clk *wcd934x_register_mclk_output(struct wcd934x_codec *wcd) return NULL; } -static int wcd934x_get_micbias_val(struct device *dev, const char *micbias) +static int wcd934x_get_micbias_val(struct device *dev, const char *micbias, + u32 *micb_mv) { int mv; @@ -2145,6 +2232,8 @@ static int wcd934x_get_micbias_val(struct device *dev, const char *micbias) mv = WCD934X_DEF_MICBIAS_MV; } + *micb_mv = mv; + return (mv - 1000) / 50; } @@ -2155,13 +2244,17 @@ static int wcd934x_init_dmic(struct snd_soc_component *comp) u32 def_dmic_rate, dmic_clk_drv; vout_ctl_1 = wcd934x_get_micbias_val(comp->dev, - "qcom,micbias1-microvolt"); + "qcom,micbias1-microvolt", + &wcd->micb1_mv); vout_ctl_2 = wcd934x_get_micbias_val(comp->dev, - "qcom,micbias2-microvolt"); + "qcom,micbias2-microvolt", + &wcd->micb2_mv); vout_ctl_3 = wcd934x_get_micbias_val(comp->dev, - "qcom,micbias3-microvolt"); + "qcom,micbias3-microvolt", + &wcd->micb3_mv); vout_ctl_4 = wcd934x_get_micbias_val(comp->dev, - "qcom,micbias4-microvolt"); + "qcom,micbias4-microvolt", + &wcd->micb4_mv); snd_soc_component_update_bits(comp, WCD934X_ANA_MICB1, WCD934X_MICB_VAL_MASK, vout_ctl_1); @@ -2287,6 +2380,695 @@ static irqreturn_t wcd934x_slim_irq_handler(int irq, void *data) return ret; } +static void wcd934x_mbhc_clk_setup(struct snd_soc_component *component, + bool enable) +{ + snd_soc_component_write_field(component, WCD934X_MBHC_NEW_CTL_1, + WCD934X_MBHC_CTL_RCO_EN_MASK, enable); +} + +static void wcd934x_mbhc_mbhc_bias_control(struct snd_soc_component *component, + bool enable) +{ + snd_soc_component_write_field(component, WCD934X_ANA_MBHC_ELECT, + WCD934X_ANA_MBHC_BIAS_EN, enable); +} + +static void wcd934x_mbhc_program_btn_thr(struct snd_soc_component *component, + int *btn_low, int *btn_high, + int num_btn, bool is_micbias) +{ + int i, vth; + + if (num_btn > WCD_MBHC_DEF_BUTTONS) { + dev_err(component->dev, "%s: invalid number of buttons: %d\n", + __func__, num_btn); + return; + } + + for (i = 0; i < num_btn; i++) { + vth = ((btn_high[i] * 2) / 25) & 0x3F; + snd_soc_component_write_field(component, WCD934X_ANA_MBHC_BTN0 + i, + WCD934X_MBHC_BTN_VTH_MASK, vth); + } +} + +static bool wcd934x_mbhc_micb_en_status(struct snd_soc_component *component, int micb_num) +{ + u8 val; + + if (micb_num == MIC_BIAS_2) { + val = snd_soc_component_read_field(component, WCD934X_ANA_MICB2, + WCD934X_ANA_MICB2_ENABLE_MASK); + if (val == WCD934X_MICB_ENABLE) + return true; + } + return false; +} + +static void wcd934x_mbhc_hph_l_pull_up_control(struct snd_soc_component *component, + enum mbhc_hs_pullup_iref pull_up_cur) +{ + /* Default pull up current to 2uA */ + if (pull_up_cur < I_OFF || pull_up_cur > I_3P0_UA || + pull_up_cur == I_DEFAULT) + pull_up_cur = I_2P0_UA; + + + snd_soc_component_write_field(component, WCD934X_MBHC_NEW_PLUG_DETECT_CTL, + WCD934X_HSDET_PULLUP_C_MASK, pull_up_cur); +} + +static int wcd934x_micbias_control(struct snd_soc_component *component, + int micb_num, int req, bool is_dapm) +{ + struct wcd934x_codec *wcd934x = snd_soc_component_get_drvdata(component); + int micb_index = micb_num - 1; + u16 micb_reg; + + switch (micb_num) { + case MIC_BIAS_1: + micb_reg = WCD934X_ANA_MICB1; + break; + case MIC_BIAS_2: + micb_reg = WCD934X_ANA_MICB2; + break; + case MIC_BIAS_3: + micb_reg = WCD934X_ANA_MICB3; + break; + case MIC_BIAS_4: + micb_reg = WCD934X_ANA_MICB4; + break; + default: + dev_err(component->dev, "%s: Invalid micbias number: %d\n", + __func__, micb_num); + return -EINVAL; + }; + mutex_lock(&wcd934x->micb_lock); + + switch (req) { + case MICB_PULLUP_ENABLE: + wcd934x->pullup_ref[micb_index]++; + if ((wcd934x->pullup_ref[micb_index] == 1) && + (wcd934x->micb_ref[micb_index] == 0)) + snd_soc_component_write_field(component, micb_reg, + WCD934X_ANA_MICB_EN_MASK, + WCD934X_MICB_PULL_UP); + break; + case MICB_PULLUP_DISABLE: + if (wcd934x->pullup_ref[micb_index] > 0) + wcd934x->pullup_ref[micb_index]--; + + if ((wcd934x->pullup_ref[micb_index] == 0) && + (wcd934x->micb_ref[micb_index] == 0)) + snd_soc_component_write_field(component, micb_reg, + WCD934X_ANA_MICB_EN_MASK, 0); + break; + case MICB_ENABLE: + wcd934x->micb_ref[micb_index]++; + if (wcd934x->micb_ref[micb_index] == 1) { + snd_soc_component_write_field(component, micb_reg, + WCD934X_ANA_MICB_EN_MASK, + WCD934X_MICB_ENABLE); + if (micb_num == MIC_BIAS_2) + wcd_mbhc_event_notify(wcd934x->mbhc, + WCD_EVENT_POST_MICBIAS_2_ON); + } + + if (micb_num == MIC_BIAS_2 && is_dapm) + wcd_mbhc_event_notify(wcd934x->mbhc, + WCD_EVENT_POST_DAPM_MICBIAS_2_ON); + break; + case MICB_DISABLE: + if (wcd934x->micb_ref[micb_index] > 0) + wcd934x->micb_ref[micb_index]--; + + if ((wcd934x->micb_ref[micb_index] == 0) && + (wcd934x->pullup_ref[micb_index] > 0)) + snd_soc_component_write_field(component, micb_reg, + WCD934X_ANA_MICB_EN_MASK, + WCD934X_MICB_PULL_UP); + else if ((wcd934x->micb_ref[micb_index] == 0) && + (wcd934x->pullup_ref[micb_index] == 0)) { + if (micb_num == MIC_BIAS_2) + wcd_mbhc_event_notify(wcd934x->mbhc, + WCD_EVENT_PRE_MICBIAS_2_OFF); + + snd_soc_component_write_field(component, micb_reg, + WCD934X_ANA_MICB_EN_MASK, 0); + if (micb_num == MIC_BIAS_2) + wcd_mbhc_event_notify(wcd934x->mbhc, + WCD_EVENT_POST_MICBIAS_2_OFF); + } + if (is_dapm && micb_num == MIC_BIAS_2) + wcd_mbhc_event_notify(wcd934x->mbhc, + WCD_EVENT_POST_DAPM_MICBIAS_2_OFF); + break; + }; + + mutex_unlock(&wcd934x->micb_lock); + + return 0; +} + +static int wcd934x_mbhc_request_micbias(struct snd_soc_component *component, + int micb_num, int req) +{ + struct wcd934x_codec *wcd = dev_get_drvdata(component->dev); + int ret; + + if (req == MICB_ENABLE) + __wcd934x_cdc_mclk_enable(wcd, true); + + ret = wcd934x_micbias_control(component, micb_num, req, false); + + if (req == MICB_DISABLE) + __wcd934x_cdc_mclk_enable(wcd, false); + + return ret; +} + +static void wcd934x_mbhc_micb_ramp_control(struct snd_soc_component *component, + bool enable) +{ + if (enable) { + snd_soc_component_write_field(component, WCD934X_ANA_MICB2_RAMP, + WCD934X_RAMP_SHIFT_CTRL_MASK, 0x3); + snd_soc_component_write_field(component, WCD934X_ANA_MICB2_RAMP, + WCD934X_RAMP_EN_MASK, 1); + } else { + snd_soc_component_write_field(component, WCD934X_ANA_MICB2_RAMP, + WCD934X_RAMP_EN_MASK, 0); + snd_soc_component_write_field(component, WCD934X_ANA_MICB2_RAMP, + WCD934X_RAMP_SHIFT_CTRL_MASK, 0); + } +} + +static int wcd934x_get_micb_vout_ctl_val(u32 micb_mv) +{ + /* min micbias voltage is 1V and maximum is 2.85V */ + if (micb_mv < 1000 || micb_mv > 2850) + return -EINVAL; + + return (micb_mv - 1000) / 50; +} + +static int wcd934x_mbhc_micb_adjust_voltage(struct snd_soc_component *component, + int req_volt, int micb_num) +{ + struct wcd934x_codec *wcd934x = snd_soc_component_get_drvdata(component); + int cur_vout_ctl, req_vout_ctl, micb_reg, micb_en, ret = 0; + + switch (micb_num) { + case MIC_BIAS_1: + micb_reg = WCD934X_ANA_MICB1; + break; + case MIC_BIAS_2: + micb_reg = WCD934X_ANA_MICB2; + break; + case MIC_BIAS_3: + micb_reg = WCD934X_ANA_MICB3; + break; + case MIC_BIAS_4: + micb_reg = WCD934X_ANA_MICB4; + break; + default: + return -EINVAL; + } + mutex_lock(&wcd934x->micb_lock); + /* + * If requested micbias voltage is same as current micbias + * voltage, then just return. Otherwise, adjust voltage as + * per requested value. If micbias is already enabled, then + * to avoid slow micbias ramp-up or down enable pull-up + * momentarily, change the micbias value and then re-enable + * micbias. + */ + micb_en = snd_soc_component_read_field(component, micb_reg, + WCD934X_ANA_MICB_EN_MASK); + cur_vout_ctl = snd_soc_component_read_field(component, micb_reg, + WCD934X_MICB_VAL_MASK); + + req_vout_ctl = wcd934x_get_micb_vout_ctl_val(req_volt); + if (req_vout_ctl < 0) { + ret = -EINVAL; + goto exit; + } + + if (cur_vout_ctl == req_vout_ctl) { + ret = 0; + goto exit; + } + + if (micb_en == WCD934X_MICB_ENABLE) + snd_soc_component_write_field(component, micb_reg, + WCD934X_ANA_MICB_EN_MASK, + WCD934X_MICB_PULL_UP); + + snd_soc_component_write_field(component, micb_reg, + WCD934X_MICB_VAL_MASK, + req_vout_ctl); + + if (micb_en == WCD934X_MICB_ENABLE) { + snd_soc_component_write_field(component, micb_reg, + WCD934X_ANA_MICB_EN_MASK, + WCD934X_MICB_ENABLE); + /* + * Add 2ms delay as per HW requirement after enabling + * micbias + */ + usleep_range(2000, 2100); + } +exit: + mutex_unlock(&wcd934x->micb_lock); + return ret; +} + +static int wcd934x_mbhc_micb_ctrl_threshold_mic(struct snd_soc_component *component, + int micb_num, bool req_en) +{ + struct wcd934x_codec *wcd934x = snd_soc_component_get_drvdata(component); + int rc, micb_mv; + + if (micb_num != MIC_BIAS_2) + return -EINVAL; + /* + * If device tree micbias level is already above the minimum + * voltage needed to detect threshold microphone, then do + * not change the micbias, just return. + */ + if (wcd934x->micb2_mv >= WCD_MBHC_THR_HS_MICB_MV) + return 0; + + micb_mv = req_en ? WCD_MBHC_THR_HS_MICB_MV : wcd934x->micb2_mv; + + rc = wcd934x_mbhc_micb_adjust_voltage(component, micb_mv, MIC_BIAS_2); + + return rc; +} + +static inline void wcd934x_mbhc_get_result_params(struct wcd934x_codec *wcd934x, + s16 *d1_a, u16 noff, + int32_t *zdet) +{ + int i; + int val, val1; + s16 c1; + s32 x1, d1; + int32_t denom; + int minCode_param[] = { + 3277, 1639, 820, 410, 205, 103, 52, 26 + }; + + regmap_update_bits(wcd934x->regmap, WCD934X_ANA_MBHC_ZDET, 0x20, 0x20); + for (i = 0; i < WCD934X_ZDET_NUM_MEASUREMENTS; i++) { + regmap_read(wcd934x->regmap, WCD934X_ANA_MBHC_RESULT_2, &val); + if (val & 0x80) + break; + } + val = val << 0x8; + regmap_read(wcd934x->regmap, WCD934X_ANA_MBHC_RESULT_1, &val1); + val |= val1; + regmap_update_bits(wcd934x->regmap, WCD934X_ANA_MBHC_ZDET, 0x20, 0x00); + x1 = WCD934X_MBHC_GET_X1(val); + c1 = WCD934X_MBHC_GET_C1(val); + /* If ramp is not complete, give additional 5ms */ + if ((c1 < 2) && x1) + usleep_range(5000, 5050); + + if (!c1 || !x1) { + dev_err(wcd934x->dev, "%s: Impedance detect ramp error, c1=%d, x1=0x%x\n", + __func__, c1, x1); + goto ramp_down; + } + d1 = d1_a[c1]; + denom = (x1 * d1) - (1 << (14 - noff)); + if (denom > 0) + *zdet = (WCD934X_MBHC_ZDET_CONST * 1000) / denom; + else if (x1 < minCode_param[noff]) + *zdet = WCD934X_ZDET_FLOATING_IMPEDANCE; + + dev_info(wcd934x->dev, "%s: d1=%d, c1=%d, x1=0x%x, z_val=%d(milliOhm)\n", + __func__, d1, c1, x1, *zdet); +ramp_down: + i = 0; + + while (x1) { + regmap_read(wcd934x->regmap, WCD934X_ANA_MBHC_RESULT_1, &val); + regmap_read(wcd934x->regmap, WCD934X_ANA_MBHC_RESULT_2, &val1); + val = val << 0x08; + val |= val1; + x1 = WCD934X_MBHC_GET_X1(val); + i++; + if (i == WCD934X_ZDET_NUM_MEASUREMENTS) + break; + } +} + +static void wcd934x_mbhc_zdet_ramp(struct snd_soc_component *component, + struct wcd934x_mbhc_zdet_param *zdet_param, + int32_t *zl, int32_t *zr, s16 *d1_a) +{ + struct wcd934x_codec *wcd934x = dev_get_drvdata(component->dev); + int32_t zdet = 0; + + snd_soc_component_write_field(component, WCD934X_MBHC_NEW_ZDET_ANA_CTL, + WCD934X_ZDET_MAXV_CTL_MASK, zdet_param->ldo_ctl); + snd_soc_component_update_bits(component, WCD934X_ANA_MBHC_BTN5, + WCD934X_VTH_MASK, zdet_param->btn5); + snd_soc_component_update_bits(component, WCD934X_ANA_MBHC_BTN6, + WCD934X_VTH_MASK, zdet_param->btn6); + snd_soc_component_update_bits(component, WCD934X_ANA_MBHC_BTN7, + WCD934X_VTH_MASK, zdet_param->btn7); + snd_soc_component_write_field(component, WCD934X_MBHC_NEW_ZDET_ANA_CTL, + WCD934X_ZDET_RANGE_CTL_MASK, zdet_param->noff); + snd_soc_component_update_bits(component, WCD934X_MBHC_NEW_ZDET_RAMP_CTL, + 0x0F, zdet_param->nshift); + + if (!zl) + goto z_right; + /* Start impedance measurement for HPH_L */ + regmap_update_bits(wcd934x->regmap, WCD934X_ANA_MBHC_ZDET, 0x80, 0x80); + wcd934x_mbhc_get_result_params(wcd934x, d1_a, zdet_param->noff, &zdet); + regmap_update_bits(wcd934x->regmap, WCD934X_ANA_MBHC_ZDET, 0x80, 0x00); + + *zl = zdet; + +z_right: + if (!zr) + return; + /* Start impedance measurement for HPH_R */ + regmap_update_bits(wcd934x->regmap, WCD934X_ANA_MBHC_ZDET, 0x40, 0x40); + wcd934x_mbhc_get_result_params(wcd934x, d1_a, zdet_param->noff, &zdet); + regmap_update_bits(wcd934x->regmap, WCD934X_ANA_MBHC_ZDET, 0x40, 0x00); + + *zr = zdet; +} + +static inline void wcd934x_wcd_mbhc_qfuse_cal(struct snd_soc_component *component, + int32_t *z_val, int flag_l_r) +{ + s16 q1; + int q1_cal; + + if (*z_val < (WCD934X_ZDET_VAL_400/1000)) + q1 = snd_soc_component_read(component, + WCD934X_CHIP_TIER_CTRL_EFUSE_VAL_OUT1 + (2 * flag_l_r)); + else + q1 = snd_soc_component_read(component, + WCD934X_CHIP_TIER_CTRL_EFUSE_VAL_OUT2 + (2 * flag_l_r)); + if (q1 & 0x80) + q1_cal = (10000 - ((q1 & 0x7F) * 25)); + else + q1_cal = (10000 + (q1 * 25)); + if (q1_cal > 0) + *z_val = ((*z_val) * 10000) / q1_cal; +} + +static void wcd934x_wcd_mbhc_calc_impedance(struct snd_soc_component *component, + uint32_t *zl, uint32_t *zr) +{ + struct wcd934x_codec *wcd934x = dev_get_drvdata(component->dev); + s16 reg0, reg1, reg2, reg3, reg4; + int32_t z1L, z1R, z1Ls; + int zMono, z_diff1, z_diff2; + bool is_fsm_disable = false; + struct wcd934x_mbhc_zdet_param zdet_param[] = { + {4, 0, 4, 0x08, 0x14, 0x18}, /* < 32ohm */ + {2, 0, 3, 0x18, 0x7C, 0x90}, /* 32ohm < Z < 400ohm */ + {1, 4, 5, 0x18, 0x7C, 0x90}, /* 400ohm < Z < 1200ohm */ + {1, 6, 7, 0x18, 0x7C, 0x90}, /* >1200ohm */ + }; + struct wcd934x_mbhc_zdet_param *zdet_param_ptr = NULL; + s16 d1_a[][4] = { + {0, 30, 90, 30}, + {0, 30, 30, 5}, + {0, 30, 30, 5}, + {0, 30, 30, 5}, + }; + s16 *d1 = NULL; + + reg0 = snd_soc_component_read(component, WCD934X_ANA_MBHC_BTN5); + reg1 = snd_soc_component_read(component, WCD934X_ANA_MBHC_BTN6); + reg2 = snd_soc_component_read(component, WCD934X_ANA_MBHC_BTN7); + reg3 = snd_soc_component_read(component, WCD934X_MBHC_CTL_CLK); + reg4 = snd_soc_component_read(component, WCD934X_MBHC_NEW_ZDET_ANA_CTL); + + if (snd_soc_component_read(component, WCD934X_ANA_MBHC_ELECT) & 0x80) { + is_fsm_disable = true; + regmap_update_bits(wcd934x->regmap, WCD934X_ANA_MBHC_ELECT, 0x80, 0x00); + } + + /* For NO-jack, disable L_DET_EN before Z-det measurements */ + if (wcd934x->mbhc_cfg.hphl_swh) + regmap_update_bits(wcd934x->regmap, WCD934X_ANA_MBHC_MECH, 0x80, 0x00); + + /* Turn off 100k pull down on HPHL */ + regmap_update_bits(wcd934x->regmap, WCD934X_ANA_MBHC_MECH, 0x01, 0x00); + + /* First get impedance on Left */ + d1 = d1_a[1]; + zdet_param_ptr = &zdet_param[1]; + wcd934x_mbhc_zdet_ramp(component, zdet_param_ptr, &z1L, NULL, d1); + + if (!WCD934X_MBHC_IS_SECOND_RAMP_REQUIRED(z1L)) + goto left_ch_impedance; + + /* Second ramp for left ch */ + if (z1L < WCD934X_ZDET_VAL_32) { + zdet_param_ptr = &zdet_param[0]; + d1 = d1_a[0]; + } else if ((z1L > WCD934X_ZDET_VAL_400) && + (z1L <= WCD934X_ZDET_VAL_1200)) { + zdet_param_ptr = &zdet_param[2]; + d1 = d1_a[2]; + } else if (z1L > WCD934X_ZDET_VAL_1200) { + zdet_param_ptr = &zdet_param[3]; + d1 = d1_a[3]; + } + wcd934x_mbhc_zdet_ramp(component, zdet_param_ptr, &z1L, NULL, d1); + +left_ch_impedance: + if ((z1L == WCD934X_ZDET_FLOATING_IMPEDANCE) || + (z1L > WCD934X_ZDET_VAL_100K)) { + *zl = WCD934X_ZDET_FLOATING_IMPEDANCE; + zdet_param_ptr = &zdet_param[1]; + d1 = d1_a[1]; + } else { + *zl = z1L/1000; + wcd934x_wcd_mbhc_qfuse_cal(component, zl, 0); + } + dev_info(component->dev, "%s: impedance on HPH_L = %d(ohms)\n", + __func__, *zl); + + /* Start of right impedance ramp and calculation */ + wcd934x_mbhc_zdet_ramp(component, zdet_param_ptr, NULL, &z1R, d1); + if (WCD934X_MBHC_IS_SECOND_RAMP_REQUIRED(z1R)) { + if (((z1R > WCD934X_ZDET_VAL_1200) && + (zdet_param_ptr->noff == 0x6)) || + ((*zl) != WCD934X_ZDET_FLOATING_IMPEDANCE)) + goto right_ch_impedance; + /* Second ramp for right ch */ + if (z1R < WCD934X_ZDET_VAL_32) { + zdet_param_ptr = &zdet_param[0]; + d1 = d1_a[0]; + } else if ((z1R > WCD934X_ZDET_VAL_400) && + (z1R <= WCD934X_ZDET_VAL_1200)) { + zdet_param_ptr = &zdet_param[2]; + d1 = d1_a[2]; + } else if (z1R > WCD934X_ZDET_VAL_1200) { + zdet_param_ptr = &zdet_param[3]; + d1 = d1_a[3]; + } + wcd934x_mbhc_zdet_ramp(component, zdet_param_ptr, NULL, &z1R, d1); + } +right_ch_impedance: + if ((z1R == WCD934X_ZDET_FLOATING_IMPEDANCE) || + (z1R > WCD934X_ZDET_VAL_100K)) { + *zr = WCD934X_ZDET_FLOATING_IMPEDANCE; + } else { + *zr = z1R/1000; + wcd934x_wcd_mbhc_qfuse_cal(component, zr, 1); + } + dev_err(component->dev, "%s: impedance on HPH_R = %d(ohms)\n", + __func__, *zr); + + /* Mono/stereo detection */ + if ((*zl == WCD934X_ZDET_FLOATING_IMPEDANCE) && + (*zr == WCD934X_ZDET_FLOATING_IMPEDANCE)) { + dev_dbg(component->dev, + "%s: plug type is invalid or extension cable\n", + __func__); + goto zdet_complete; + } + if ((*zl == WCD934X_ZDET_FLOATING_IMPEDANCE) || + (*zr == WCD934X_ZDET_FLOATING_IMPEDANCE) || + ((*zl < WCD_MONO_HS_MIN_THR) && (*zr > WCD_MONO_HS_MIN_THR)) || + ((*zl > WCD_MONO_HS_MIN_THR) && (*zr < WCD_MONO_HS_MIN_THR))) { + dev_dbg(component->dev, + "%s: Mono plug type with one ch floating or shorted to GND\n", + __func__); + wcd_mbhc_set_hph_type(wcd934x->mbhc, WCD_MBHC_HPH_MONO); + goto zdet_complete; + } + snd_soc_component_write_field(component, WCD934X_HPH_R_ATEST, + WCD934X_HPHPA_GND_OVR_MASK, 1); + snd_soc_component_write_field(component, WCD934X_HPH_PA_CTL2, + WCD934X_HPHPA_GND_R_MASK, 1); + if (*zl < (WCD934X_ZDET_VAL_32/1000)) + wcd934x_mbhc_zdet_ramp(component, &zdet_param[0], &z1Ls, NULL, d1); + else + wcd934x_mbhc_zdet_ramp(component, &zdet_param[1], &z1Ls, NULL, d1); + snd_soc_component_write_field(component, WCD934X_HPH_PA_CTL2, + WCD934X_HPHPA_GND_R_MASK, 0); + snd_soc_component_write_field(component, WCD934X_HPH_R_ATEST, + WCD934X_HPHPA_GND_OVR_MASK, 0); + z1Ls /= 1000; + wcd934x_wcd_mbhc_qfuse_cal(component, &z1Ls, 0); + /* Parallel of left Z and 9 ohm pull down resistor */ + zMono = ((*zl) * 9) / ((*zl) + 9); + z_diff1 = (z1Ls > zMono) ? (z1Ls - zMono) : (zMono - z1Ls); + z_diff2 = ((*zl) > z1Ls) ? ((*zl) - z1Ls) : (z1Ls - (*zl)); + if ((z_diff1 * (*zl + z1Ls)) > (z_diff2 * (z1Ls + zMono))) { + dev_err(component->dev, "%s: stereo plug type detected\n", + __func__); + wcd_mbhc_set_hph_type(wcd934x->mbhc, WCD_MBHC_HPH_STEREO); + } else { + dev_err(component->dev, "%s: MONO plug type detected\n", + __func__); + wcd_mbhc_set_hph_type(wcd934x->mbhc, WCD_MBHC_HPH_MONO); + } + +zdet_complete: + snd_soc_component_write(component, WCD934X_ANA_MBHC_BTN5, reg0); + snd_soc_component_write(component, WCD934X_ANA_MBHC_BTN6, reg1); + snd_soc_component_write(component, WCD934X_ANA_MBHC_BTN7, reg2); + /* Turn on 100k pull down on HPHL */ + regmap_update_bits(wcd934x->regmap, WCD934X_ANA_MBHC_MECH, 0x01, 0x01); + + /* For NO-jack, re-enable L_DET_EN after Z-det measurements */ + if (wcd934x->mbhc_cfg.hphl_swh) + regmap_update_bits(wcd934x->regmap, WCD934X_ANA_MBHC_MECH, 0x80, 0x80); + + snd_soc_component_write(component, WCD934X_MBHC_NEW_ZDET_ANA_CTL, reg4); + snd_soc_component_write(component, WCD934X_MBHC_CTL_CLK, reg3); + if (is_fsm_disable) + regmap_update_bits(wcd934x->regmap, WCD934X_ANA_MBHC_ELECT, 0x80, 0x80); +} + +static void wcd934x_mbhc_gnd_det_ctrl(struct snd_soc_component *component, + bool enable) +{ + if (enable) { + snd_soc_component_write_field(component, WCD934X_ANA_MBHC_MECH, + WCD934X_MBHC_HSG_PULLUP_COMP_EN, 1); + snd_soc_component_write_field(component, WCD934X_ANA_MBHC_MECH, + WCD934X_MBHC_GND_DET_EN_MASK, 1); + } else { + snd_soc_component_write_field(component, WCD934X_ANA_MBHC_MECH, + WCD934X_MBHC_GND_DET_EN_MASK, 0); + snd_soc_component_write_field(component, WCD934X_ANA_MBHC_MECH, + WCD934X_MBHC_HSG_PULLUP_COMP_EN, 0); + } +} + +static void wcd934x_mbhc_hph_pull_down_ctrl(struct snd_soc_component *component, + bool enable) +{ + snd_soc_component_write_field(component, WCD934X_HPH_PA_CTL2, + WCD934X_HPHPA_GND_R_MASK, enable); + snd_soc_component_write_field(component, WCD934X_HPH_PA_CTL2, + WCD934X_HPHPA_GND_L_MASK, enable); +} + +static const struct wcd_mbhc_cb mbhc_cb = { + .clk_setup = wcd934x_mbhc_clk_setup, + .mbhc_bias = wcd934x_mbhc_mbhc_bias_control, + .set_btn_thr = wcd934x_mbhc_program_btn_thr, + .micbias_enable_status = wcd934x_mbhc_micb_en_status, + .hph_pull_up_control = wcd934x_mbhc_hph_l_pull_up_control, + .mbhc_micbias_control = wcd934x_mbhc_request_micbias, + .mbhc_micb_ramp_control = wcd934x_mbhc_micb_ramp_control, + .mbhc_micb_ctrl_thr_mic = wcd934x_mbhc_micb_ctrl_threshold_mic, + .compute_impedance = wcd934x_wcd_mbhc_calc_impedance, + .mbhc_gnd_det_ctrl = wcd934x_mbhc_gnd_det_ctrl, + .hph_pull_down_ctrl = wcd934x_mbhc_hph_pull_down_ctrl, +}; + +static int wcd934x_get_hph_type(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); + struct wcd934x_codec *wcd = snd_soc_component_get_drvdata(component); + + ucontrol->value.integer.value[0] = wcd_mbhc_get_hph_type(wcd->mbhc); + + return 0; +} + +static int wcd934x_hph_impedance_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + uint32_t zl, zr; + bool hphr; + struct soc_mixer_control *mc; + struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); + struct wcd934x_codec *wcd = snd_soc_component_get_drvdata(component); + + mc = (struct soc_mixer_control *)(kcontrol->private_value); + hphr = mc->shift; + wcd_mbhc_get_impedance(wcd->mbhc, &zl, &zr); + dev_dbg(component->dev, "%s: zl=%u(ohms), zr=%u(ohms)\n", __func__, zl, zr); + ucontrol->value.integer.value[0] = hphr ? zr : zl; + + return 0; +} +static const struct snd_kcontrol_new hph_type_detect_controls[] = { + SOC_SINGLE_EXT("HPH Type", 0, 0, UINT_MAX, 0, + wcd934x_get_hph_type, NULL), +}; + +static const struct snd_kcontrol_new impedance_detect_controls[] = { + SOC_SINGLE_EXT("HPHL Impedance", 0, 0, UINT_MAX, 0, + wcd934x_hph_impedance_get, NULL), + SOC_SINGLE_EXT("HPHR Impedance", 0, 1, UINT_MAX, 0, + wcd934x_hph_impedance_get, NULL), +}; + +static int wcd934x_mbhc_init(struct snd_soc_component *component) +{ + struct wcd934x_ddata *data = dev_get_drvdata(component->dev->parent); + struct wcd934x_codec *wcd = snd_soc_component_get_drvdata(component); + struct wcd_mbhc_intr *intr_ids = &wcd->intr_ids; + + intr_ids->mbhc_sw_intr = regmap_irq_get_virq(data->irq_data, + WCD934X_IRQ_MBHC_SW_DET); + intr_ids->mbhc_btn_press_intr = regmap_irq_get_virq(data->irq_data, + WCD934X_IRQ_MBHC_BUTTON_PRESS_DET); + intr_ids->mbhc_btn_release_intr = regmap_irq_get_virq(data->irq_data, + WCD934X_IRQ_MBHC_BUTTON_RELEASE_DET); + intr_ids->mbhc_hs_ins_intr = regmap_irq_get_virq(data->irq_data, + WCD934X_IRQ_MBHC_ELECT_INS_REM_LEG_DET); + intr_ids->mbhc_hs_rem_intr = regmap_irq_get_virq(data->irq_data, + WCD934X_IRQ_MBHC_ELECT_INS_REM_DET); + intr_ids->hph_left_ocp = regmap_irq_get_virq(data->irq_data, + WCD934X_IRQ_HPH_PA_OCPL_FAULT); + intr_ids->hph_right_ocp = regmap_irq_get_virq(data->irq_data, + WCD934X_IRQ_HPH_PA_OCPR_FAULT); + + wcd->mbhc = wcd_mbhc_init(component, &mbhc_cb, intr_ids, wcd_mbhc_fields, true); + if (IS_ERR(wcd->mbhc)) { + wcd->mbhc = NULL; + return -EINVAL; + } + + snd_soc_add_component_controls(component, impedance_detect_controls, + ARRAY_SIZE(impedance_detect_controls)); + snd_soc_add_component_controls(component, hph_type_detect_controls, + ARRAY_SIZE(hph_type_detect_controls)); + + return 0; +} static int wcd934x_comp_probe(struct snd_soc_component *component) { struct wcd934x_codec *wcd = dev_get_drvdata(component->dev); @@ -2309,6 +3091,10 @@ static int wcd934x_comp_probe(struct snd_soc_component *component) INIT_LIST_HEAD(&wcd->dai[i].slim_ch_list); wcd934x_init_dmic(component); + + if (wcd934x_mbhc_init(component)) + dev_err(component->dev, "Failed to Initialize MBHC\n"); + return 0; } @@ -3756,6 +4542,7 @@ static int wcd934x_codec_enable_hphl_pa(struct snd_soc_dapm_widget *w, int event) { struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm); + struct wcd934x_codec *wcd = snd_soc_component_get_drvdata(comp); switch (event) { case SND_SOC_DAPM_POST_PMU: @@ -3788,6 +4575,7 @@ static int wcd934x_codec_enable_hphl_pa(struct snd_soc_dapm_widget *w, WCD934X_CDC_RX_PGA_MUTE_EN_MASK, 0x00); break; case SND_SOC_DAPM_PRE_PMD: + wcd_mbhc_event_notify(wcd->mbhc, WCD_EVENT_POST_HPHL_PA_OFF); /* Enable DSD Mute before PA disable */ snd_soc_component_update_bits(comp, WCD934X_HPH_L_TEST, WCD934X_HPH_OCP_DET_MASK, @@ -3806,6 +4594,7 @@ static int wcd934x_codec_enable_hphl_pa(struct snd_soc_dapm_widget *w, * disabled, then 20ms delay is needed after PA disable. */ usleep_range(20000, 20100); + wcd_mbhc_event_notify(wcd->mbhc, WCD_EVENT_POST_HPHL_PA_OFF); break; } @@ -3817,6 +4606,7 @@ static int wcd934x_codec_enable_hphr_pa(struct snd_soc_dapm_widget *w, int event) { struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm); + struct wcd934x_codec *wcd = snd_soc_component_get_drvdata(comp); switch (event) { case SND_SOC_DAPM_POST_PMU: @@ -3851,6 +4641,7 @@ static int wcd934x_codec_enable_hphr_pa(struct snd_soc_dapm_widget *w, WCD934X_CDC_RX_PGA_MUTE_DISABLE); break; case SND_SOC_DAPM_PRE_PMD: + wcd_mbhc_event_notify(wcd->mbhc, WCD_EVENT_PRE_HPHR_PA_OFF); snd_soc_component_update_bits(comp, WCD934X_HPH_R_TEST, WCD934X_HPH_OCP_DET_MASK, WCD934X_HPH_OCP_DET_DISABLE); @@ -3868,6 +4659,7 @@ static int wcd934x_codec_enable_hphr_pa(struct snd_soc_dapm_widget *w, * disabled, then 20ms delay is needed after PA disable. */ usleep_range(20000, 20100); + wcd_mbhc_event_notify(wcd->mbhc, WCD_EVENT_POST_HPHR_PA_OFF); break; } @@ -4323,6 +5115,29 @@ static int wcd934x_codec_enable_adc(struct snd_soc_dapm_widget *w, return 0; } +static int wcd934x_codec_enable_micbias(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, + int event) +{ + struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); + int micb_num = w->shift; + + switch (event) { + case SND_SOC_DAPM_PRE_PMU: + wcd934x_micbias_control(component, micb_num, MICB_ENABLE, true); + break; + case SND_SOC_DAPM_POST_PMU: + /* 1 msec delay as per HW requirement */ + usleep_range(1000, 1100); + break; + case SND_SOC_DAPM_POST_PMD: + wcd934x_micbias_control(component, micb_num, MICB_DISABLE, true); + break; + }; + + return 0; +} + static const struct snd_soc_dapm_widget wcd934x_dapm_widgets[] = { /* Analog Outputs */ SND_SOC_DAPM_OUTPUT("EAR"), @@ -4778,13 +5593,17 @@ static const struct snd_soc_dapm_widget wcd934x_dapm_widgets[] = { wcd934x_codec_enable_adc, SND_SOC_DAPM_PRE_PMU), SND_SOC_DAPM_ADC_E("ADC4", NULL, WCD934X_ANA_AMIC4, 7, 0, wcd934x_codec_enable_adc, SND_SOC_DAPM_PRE_PMU), - SND_SOC_DAPM_SUPPLY("MIC BIAS1", WCD934X_ANA_MICB1, 6, 0, NULL, + SND_SOC_DAPM_SUPPLY("MIC BIAS1", SND_SOC_NOPM, MIC_BIAS_1, 0, + wcd934x_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), - SND_SOC_DAPM_SUPPLY("MIC BIAS2", WCD934X_ANA_MICB2, 6, 0, NULL, + SND_SOC_DAPM_SUPPLY("MIC BIAS2", SND_SOC_NOPM, MIC_BIAS_2, 0, + wcd934x_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), - SND_SOC_DAPM_SUPPLY("MIC BIAS3", WCD934X_ANA_MICB3, 6, 0, NULL, + SND_SOC_DAPM_SUPPLY("MIC BIAS3", SND_SOC_NOPM, MIC_BIAS_3, 0, + wcd934x_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), - SND_SOC_DAPM_SUPPLY("MIC BIAS4", WCD934X_ANA_MICB4, 6, 0, NULL, + SND_SOC_DAPM_SUPPLY("MIC BIAS4", SND_SOC_NOPM, MIC_BIAS_4, 0, + wcd934x_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), SND_SOC_DAPM_MUX("AMIC4_5 SEL", SND_SOC_NOPM, 0, 0, &tx_amic4_5), @@ -4961,6 +5780,26 @@ static const struct snd_soc_dapm_route wcd934x_audio_map[] = { {"SRC1", NULL, "IIR1"}, }; +static int wcd934x_codec_set_jack(struct snd_soc_component *comp, + struct snd_soc_jack *jack, void *data) +{ + struct wcd934x_codec *wcd = dev_get_drvdata(comp->dev); + int ret = 0; + + if (!wcd->mbhc) + return -ENOTSUPP; + + if (jack && !wcd->mbhc_started) { + ret = wcd_mbhc_start(wcd->mbhc, &wcd->mbhc_cfg, jack); + wcd->mbhc_started = true; + } else if (wcd->mbhc_started) { + wcd_mbhc_stop(wcd->mbhc); + wcd->mbhc_started = false; + } + + return ret; +} + static const struct snd_soc_component_driver wcd934x_component_drv = { .probe = wcd934x_comp_probe, .remove = wcd934x_comp_remove, @@ -4971,11 +5810,13 @@ static const struct snd_soc_component_driver wcd934x_component_drv = { .num_dapm_widgets = ARRAY_SIZE(wcd934x_dapm_widgets), .dapm_routes = wcd934x_audio_map, .num_dapm_routes = ARRAY_SIZE(wcd934x_audio_map), + .set_jack = wcd934x_codec_set_jack, }; static int wcd934x_codec_parse_data(struct wcd934x_codec *wcd) { struct device *dev = &wcd->sdev->dev; + struct wcd_mbhc_config *cfg = &wcd->mbhc_cfg; struct device_node *ifc_dev_np; ifc_dev_np = of_parse_phandle(dev->of_node, "slim-ifc-dev", 0); @@ -5001,6 +5842,18 @@ static int wcd934x_codec_parse_data(struct wcd934x_codec *wcd) of_property_read_u32(dev->parent->of_node, "qcom,dmic-sample-rate", &wcd->dmic_sample_rate); + cfg->mbhc_micbias = MIC_BIAS_2; + cfg->anc_micbias = MIC_BIAS_2; + cfg->v_hs_max = WCD_MBHC_HS_V_MAX; + cfg->num_btn = WCD934X_MBHC_MAX_BUTTONS; + cfg->micb_mv = wcd->micb2_mv; + cfg->linein_th = 5000; + cfg->hs_thr = 1700; + cfg->hph_thr = 50; + + wcd_dt_parse_mbhc_data(dev, cfg); + + return 0; } @@ -5020,6 +5873,7 @@ static int wcd934x_codec_probe(struct platform_device *pdev) wcd->extclk = data->extclk; wcd->sdev = to_slim_device(data->dev); mutex_init(&wcd->sysclk_mutex); + mutex_init(&wcd->micb_lock); ret = wcd934x_codec_parse_data(wcd); if (ret) { -- cgit v1.3-18-gd494 From ba9e82a1c8919340bee0dd7f7cafb8749810aabe Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Thu, 27 May 2021 11:26:12 +0900 Subject: ASoC: soc-core: add snd_soc_runtime_get_dai_fmt() ASoC is using dai_link which specify DAI format (= dai_link->dai_fmt), and it is selected by "Sound Card" driver in corrent implementation. In other words, Sound Card *needs* to setup it. But, it should be possible to automatically selected from CPU and Codec driver settings. This patch adds new .auto_selectable_formats support at snd_soc_dai_ops. By this patch, dai_fmt can be automatically selected from each driver if both CPU / Codec driver had it. Automatically selectable *field* is depends on each drivers. For example, some driver want to select format "automatically", but want to select other fields "manually", because of complex limitation. Or other example, in case of both CPU and Codec are possible to be clock provider, but the quality was different. In these case, user need/want to *manually* select each fields from Sound Card driver. This .auto_selectable_formats can set priority. For example, no limitaion format can be HI priority, supported but has picky limitation format can be next priority, etc. It uses Sound Card specified fields preferentially, and try to select non-specific fields from CPU and Codec driver automatically if all drivers have .auto_selectable_formats. In other words, we can select all dai_fmt via Sound Card driver same as before. Link: https://lore.kernel.org/r/871rb3hypy.wl-kuninori.morimoto.gx@renesas.com Link: https://lore.kernel.org/r/871racbx0w.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Kuninori Morimoto Link: https://lore.kernel.org/r/87h7ionc8s.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Mark Brown --- include/sound/soc-dai.h | 55 ++++++++++++++++ sound/soc/soc-core.c | 164 ++++++++++++++++++++++++++++++++++++++++++++++++ sound/soc/soc-dai.c | 63 +++++++++++++++++++ sound/soc/soc-utils.c | 29 +++++++++ 4 files changed, 311 insertions(+) (limited to 'include') diff --git a/include/sound/soc-dai.h b/include/sound/soc-dai.h index 0bc29c4516e7..0dcb361a98bb 100644 --- a/include/sound/soc-dai.h +++ b/include/sound/soc-dai.h @@ -36,6 +36,22 @@ struct snd_compr_stream; #define SND_SOC_DAIFMT_MSB SND_SOC_DAIFMT_LEFT_J #define SND_SOC_DAIFMT_LSB SND_SOC_DAIFMT_RIGHT_J +/* Describes the possible PCM format */ +/* + * use SND_SOC_DAI_FORMAT_xx as eash shift. + * see + * snd_soc_runtime_get_dai_fmt() + */ +#define SND_SOC_POSSIBLE_DAIFMT_FORMAT_SHIFT 0 +#define SND_SOC_POSSIBLE_DAIFMT_FORMAT_MASK (0xFFFF << SND_SOC_POSSIBLE_DAIFMT_FORMAT_SHIFT) +#define SND_SOC_POSSIBLE_DAIFMT_I2S (1 << SND_SOC_DAI_FORMAT_I2S) +#define SND_SOC_POSSIBLE_DAIFMT_RIGHT_J (1 << SND_SOC_DAI_FORMAT_RIGHT_J) +#define SND_SOC_POSSIBLE_DAIFMT_LEFT_J (1 << SND_SOC_DAI_FORMAT_LEFT_J) +#define SND_SOC_POSSIBLE_DAIFMT_DSP_A (1 << SND_SOC_DAI_FORMAT_DSP_A) +#define SND_SOC_POSSIBLE_DAIFMT_DSP_B (1 << SND_SOC_DAI_FORMAT_DSP_B) +#define SND_SOC_POSSIBLE_DAIFMT_AC97 (1 << SND_SOC_DAI_FORMAT_AC97) +#define SND_SOC_POSSIBLE_DAIFMT_PDM (1 << SND_SOC_DAI_FORMAT_PDM) + /* * DAI Clock gating. * @@ -45,6 +61,17 @@ struct snd_compr_stream; #define SND_SOC_DAIFMT_CONT (1 << 4) /* continuous clock */ #define SND_SOC_DAIFMT_GATED (0 << 4) /* clock is gated */ +/* Describes the possible PCM format */ +/* + * define GATED -> CONT. GATED will be selected if both are selected. + * see + * snd_soc_runtime_get_dai_fmt() + */ +#define SND_SOC_POSSIBLE_DAIFMT_CLOCK_SHIFT 16 +#define SND_SOC_POSSIBLE_DAIFMT_CLOCK_MASK (0xFFFF << SND_SOC_POSSIBLE_DAIFMT_CLOCK_SHIFT) +#define SND_SOC_POSSIBLE_DAIFMT_GATED (0x1ULL << SND_SOC_POSSIBLE_DAIFMT_CLOCK_SHIFT) +#define SND_SOC_POSSIBLE_DAIFMT_CONT (0x2ULL << SND_SOC_POSSIBLE_DAIFMT_CLOCK_SHIFT) + /* * DAI hardware signal polarity. * @@ -71,6 +98,14 @@ struct snd_compr_stream; #define SND_SOC_DAIFMT_IB_NF (3 << 8) /* invert BCLK + nor FRM */ #define SND_SOC_DAIFMT_IB_IF (4 << 8) /* invert BCLK + FRM */ +/* Describes the possible PCM format */ +#define SND_SOC_POSSIBLE_DAIFMT_INV_SHIFT 32 +#define SND_SOC_POSSIBLE_DAIFMT_INV_MASK (0xFFFFULL << SND_SOC_POSSIBLE_DAIFMT_INV_SHIFT) +#define SND_SOC_POSSIBLE_DAIFMT_NB_NF (0x1ULL << SND_SOC_POSSIBLE_DAIFMT_INV_SHIFT) +#define SND_SOC_POSSIBLE_DAIFMT_NB_IF (0x2ULL << SND_SOC_POSSIBLE_DAIFMT_INV_SHIFT) +#define SND_SOC_POSSIBLE_DAIFMT_IB_NF (0x4ULL << SND_SOC_POSSIBLE_DAIFMT_INV_SHIFT) +#define SND_SOC_POSSIBLE_DAIFMT_IB_IF (0x8ULL << SND_SOC_POSSIBLE_DAIFMT_INV_SHIFT) + /* * DAI hardware clock providers/consumers * @@ -89,6 +124,14 @@ struct snd_compr_stream; #define SND_SOC_DAIFMT_CBM_CFS SND_SOC_DAIFMT_CBP_CFC #define SND_SOC_DAIFMT_CBS_CFS SND_SOC_DAIFMT_CBC_CFC +/* Describes the possible PCM format */ +#define SND_SOC_POSSIBLE_DAIFMT_CLOCK_PROVIDER_SHIFT 48 +#define SND_SOC_POSSIBLE_DAIFMT_CLOCK_PROVIDER_MASK (0xFFFFULL << SND_SOC_POSSIBLE_DAIFMT_CLOCK_PROVIDER_SHIFT) +#define SND_SOC_POSSIBLE_DAIFMT_CBP_CFP (0x1ULL << SND_SOC_POSSIBLE_DAIFMT_CLOCK_PROVIDER_SHIFT) +#define SND_SOC_POSSIBLE_DAIFMT_CBC_CFP (0x2ULL << SND_SOC_POSSIBLE_DAIFMT_CLOCK_PROVIDER_SHIFT) +#define SND_SOC_POSSIBLE_DAIFMT_CBP_CFC (0x4ULL << SND_SOC_POSSIBLE_DAIFMT_CLOCK_PROVIDER_SHIFT) +#define SND_SOC_POSSIBLE_DAIFMT_CBC_CFC (0x8ULL << SND_SOC_POSSIBLE_DAIFMT_CLOCK_PROVIDER_SHIFT) + #define SND_SOC_DAIFMT_FORMAT_MASK 0x000f #define SND_SOC_DAIFMT_CLOCK_MASK 0x00f0 #define SND_SOC_DAIFMT_INV_MASK 0x0f00 @@ -131,6 +174,8 @@ int snd_soc_dai_set_pll(struct snd_soc_dai *dai, int snd_soc_dai_set_bclk_ratio(struct snd_soc_dai *dai, unsigned int ratio); /* Digital Audio interface formatting */ +int snd_soc_dai_get_fmt_max_priority(struct snd_soc_pcm_runtime *rtd); +u64 snd_soc_dai_get_fmt(struct snd_soc_dai *dai, int priority); int snd_soc_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt); int snd_soc_dai_set_tdm_slot(struct snd_soc_dai *dai, @@ -292,6 +337,16 @@ struct snd_soc_dai_ops { snd_pcm_sframes_t (*delay)(struct snd_pcm_substream *, struct snd_soc_dai *); + /* + * Format list for auto selection. + * Format will be increased if priority format was + * not selected. + * see + * snd_soc_dai_get_fmt() + */ + u64 *auto_selectable_formats; + int num_auto_selectable_formats; + /* bit field */ unsigned int no_capture_mute:1; }; diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c index e8d4871e1ab6..4daa9b22b33c 100644 --- a/sound/soc/soc-core.c +++ b/sound/soc/soc-core.c @@ -1054,6 +1054,169 @@ _err_defer: } EXPORT_SYMBOL_GPL(snd_soc_add_pcm_runtime); +static void snd_soc_runtime_get_dai_fmt(struct snd_soc_pcm_runtime *rtd) +{ + struct snd_soc_dai_link *dai_link = rtd->dai_link; + struct snd_soc_dai *dai, *not_used; + struct device *dev = rtd->dev; + u64 pos, possible_fmt; + unsigned int mask = 0, dai_fmt = 0; + int i, j, priority, pri, until; + + /* + * Get selectable format from each DAIs. + * + **************************** + * NOTE + * Using .auto_selectable_formats is not mandatory, + * we can select format manually from Sound Card. + * When use it, driver should list well tested format only. + **************************** + * + * ex) + * auto_selectable_formats (= SND_SOC_POSSIBLE_xxx) + * (A) (B) (C) + * DAI0_: { 0x000F, 0x00F0, 0x0F00 }; + * DAI1 : { 0xF000, 0x0F00 }; + * (X) (Y) + * + * "until" will be 3 in this case (MAX array size from DAI0 and DAI1) + * Here is dev_dbg() message and comments + * + * priority = 1 + * DAI0: (pri, fmt) = (1, 000000000000000F) // 1st check (A) DAI1 is not selected + * DAI1: (pri, fmt) = (0, 0000000000000000) // Necessary Waste + * DAI0: (pri, fmt) = (1, 000000000000000F) // 2nd check (A) + * DAI1: (pri, fmt) = (1, 000000000000F000) // (X) + * priority = 2 + * DAI0: (pri, fmt) = (2, 00000000000000FF) // 3rd check (A) + (B) + * DAI1: (pri, fmt) = (1, 000000000000F000) // (X) + * DAI0: (pri, fmt) = (2, 00000000000000FF) // 4th check (A) + (B) + * DAI1: (pri, fmt) = (2, 000000000000FF00) // (X) + (Y) + * priority = 3 + * DAI0: (pri, fmt) = (3, 0000000000000FFF) // 5th check (A) + (B) + (C) + * DAI1: (pri, fmt) = (2, 000000000000FF00) // (X) + (Y) + * found auto selected format: 0000000000000F00 + */ + until = snd_soc_dai_get_fmt_max_priority(rtd); + for (priority = 1; priority <= until; priority++) { + + dev_dbg(dev, "priority = %d\n", priority); + for_each_rtd_dais(rtd, j, not_used) { + + possible_fmt = ULLONG_MAX; + for_each_rtd_dais(rtd, i, dai) { + u64 fmt = 0; + + pri = (j >= i) ? priority : priority - 1; + fmt = snd_soc_dai_get_fmt(dai, pri); + dev_dbg(dev, "%s: (pri, fmt) = (%d, %016llX)\n", dai->name, pri, fmt); + possible_fmt &= fmt; + } + if (possible_fmt) + goto found; + } + } + /* Not Found */ + return; +found: + dev_dbg(dev, "found auto selected format: %016llX\n", possible_fmt); + + /* + * convert POSSIBLE_DAIFMT to DAIFMT + * + * Some basic/default settings on each is defined as 0. + * see + * SND_SOC_DAIFMT_NB_NF + * SND_SOC_DAIFMT_GATED + * + * SND_SOC_DAIFMT_xxx_MASK can't notice it if Sound Card specify + * these value, and will be overwrite to auto selected value. + * + * To avoid such issue, loop from 63 to 0 here. + * Small number of SND_SOC_POSSIBLE_xxx will be Hi priority. + * Basic/Default settings of each part and aboves are defined + * as Hi priority (= small number) of SND_SOC_POSSIBLE_xxx. + */ + for (i = 63; i >= 0; i--) { + pos = 1ULL << i; + switch (possible_fmt & pos) { + /* + * for format + */ + case SND_SOC_POSSIBLE_DAIFMT_I2S: + case SND_SOC_POSSIBLE_DAIFMT_RIGHT_J: + case SND_SOC_POSSIBLE_DAIFMT_LEFT_J: + case SND_SOC_POSSIBLE_DAIFMT_DSP_A: + case SND_SOC_POSSIBLE_DAIFMT_DSP_B: + case SND_SOC_POSSIBLE_DAIFMT_AC97: + case SND_SOC_POSSIBLE_DAIFMT_PDM: + dai_fmt = (dai_fmt & ~SND_SOC_DAIFMT_FORMAT_MASK) | i; + break; + /* + * for clock + */ + case SND_SOC_POSSIBLE_DAIFMT_CONT: + dai_fmt = (dai_fmt & ~SND_SOC_DAIFMT_CLOCK_MASK) | SND_SOC_DAIFMT_CONT; + break; + case SND_SOC_POSSIBLE_DAIFMT_GATED: + dai_fmt = (dai_fmt & ~SND_SOC_DAIFMT_CLOCK_MASK) | SND_SOC_DAIFMT_GATED; + break; + /* + * for clock invert + */ + case SND_SOC_POSSIBLE_DAIFMT_NB_NF: + dai_fmt = (dai_fmt & ~SND_SOC_DAIFMT_INV_MASK) | SND_SOC_DAIFMT_NB_NF; + break; + case SND_SOC_POSSIBLE_DAIFMT_NB_IF: + dai_fmt = (dai_fmt & ~SND_SOC_DAIFMT_INV_MASK) | SND_SOC_DAIFMT_NB_IF; + break; + case SND_SOC_POSSIBLE_DAIFMT_IB_NF: + dai_fmt = (dai_fmt & ~SND_SOC_DAIFMT_INV_MASK) | SND_SOC_DAIFMT_IB_NF; + break; + case SND_SOC_POSSIBLE_DAIFMT_IB_IF: + dai_fmt = (dai_fmt & ~SND_SOC_DAIFMT_INV_MASK) | SND_SOC_DAIFMT_IB_IF; + break; + /* + * for clock provider / consumer + */ + case SND_SOC_POSSIBLE_DAIFMT_CBP_CFP: + dai_fmt = (dai_fmt & ~SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) | SND_SOC_DAIFMT_CBP_CFP; + break; + case SND_SOC_POSSIBLE_DAIFMT_CBC_CFP: + dai_fmt = (dai_fmt & ~SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) | SND_SOC_DAIFMT_CBC_CFP; + break; + case SND_SOC_POSSIBLE_DAIFMT_CBP_CFC: + dai_fmt = (dai_fmt & ~SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) | SND_SOC_DAIFMT_CBP_CFC; + break; + case SND_SOC_POSSIBLE_DAIFMT_CBC_CFC: + dai_fmt = (dai_fmt & ~SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) | SND_SOC_DAIFMT_CBC_CFC; + break; + } + } + + /* + * Some driver might have very complex limitation. + * In such case, user want to auto-select non-limitation part, + * and want to manually specify complex part. + * + * Or for example, if both CPU and Codec can be clock provider, + * but because of its quality, user want to specify it manually. + * + * Use manually specified settings if sound card did. + */ + if (!(dai_link->dai_fmt & SND_SOC_DAIFMT_FORMAT_MASK)) + mask |= SND_SOC_DAIFMT_FORMAT_MASK; + if (!(dai_link->dai_fmt & SND_SOC_DAIFMT_CLOCK_MASK)) + mask |= SND_SOC_DAIFMT_CLOCK_MASK; + if (!(dai_link->dai_fmt & SND_SOC_DAIFMT_INV_MASK)) + mask |= SND_SOC_DAIFMT_INV_MASK; + if (!(dai_link->dai_fmt & SND_SOC_DAIFMT_MASTER_MASK)) + mask |= SND_SOC_DAIFMT_MASTER_MASK; + + dai_link->dai_fmt |= (dai_fmt & mask); +} + /** * snd_soc_runtime_set_dai_fmt() - Change DAI link format for a ASoC runtime * @rtd: The runtime for which the DAI link format should be changed @@ -1132,6 +1295,7 @@ static int soc_init_pcm_runtime(struct snd_soc_card *card, if (ret < 0) return ret; + snd_soc_runtime_get_dai_fmt(rtd); if (dai_link->dai_fmt) { ret = snd_soc_runtime_set_dai_fmt(rtd, dai_link->dai_fmt); if (ret) diff --git a/sound/soc/soc-dai.c b/sound/soc/soc-dai.c index 4df1aae8abf3..a56dcc8d6fb7 100644 --- a/sound/soc/soc-dai.c +++ b/sound/soc/soc-dai.c @@ -134,6 +134,69 @@ int snd_soc_dai_set_bclk_ratio(struct snd_soc_dai *dai, unsigned int ratio) } EXPORT_SYMBOL_GPL(snd_soc_dai_set_bclk_ratio); +int snd_soc_dai_get_fmt_max_priority(struct snd_soc_pcm_runtime *rtd) +{ + struct snd_soc_dai *dai; + int i, max = 0; + + /* + * return max num if *ALL* DAIs have .auto_selectable_formats + */ + for_each_rtd_dais(rtd, i, dai) { + if (dai->driver->ops && + dai->driver->ops->num_auto_selectable_formats) + max = max(max, dai->driver->ops->num_auto_selectable_formats); + else + return 0; + } + + return max; +} + +/** + * snd_soc_dai_get_fmt - get supported audio format. + * @dai: DAI + * @priority: priority level of supported audio format. + * + * This should return only formats implemented with high + * quality by the DAI so that the core can configure a + * format which will work well with other devices. + * For example devices which don't support both edges of the + * LRCLK signal in I2S style formats should only list DSP + * modes. This will mean that sometimes fewer formats + * are reported here than are supported by set_fmt(). + */ +u64 snd_soc_dai_get_fmt(struct snd_soc_dai *dai, int priority) +{ + const struct snd_soc_dai_ops *ops = dai->driver->ops; + u64 fmt = 0; + int i, max = 0, until = priority; + + /* + * Collect auto_selectable_formats until priority + * + * ex) + * auto_selectable_formats[] = { A, B, C }; + * (A, B, C = SND_SOC_POSSIBLE_DAIFMT_xxx) + * + * priority = 1 : A + * priority = 2 : A | B + * priority = 3 : A | B | C + * priority = 4 : A | B | C + * ... + */ + if (ops) + max = ops->num_auto_selectable_formats; + + if (max < until) + until = max; + + for (i = 0; i < until; i++) + fmt |= ops->auto_selectable_formats[i]; + + return fmt; +} + /** * snd_soc_dai_set_fmt - configure DAI hardware audio format. * @dai: DAI diff --git a/sound/soc/soc-utils.c b/sound/soc/soc-utils.c index 98383fd76224..299b5d6ebfd1 100644 --- a/sound/soc/soc-utils.c +++ b/sound/soc/soc-utils.c @@ -97,6 +97,34 @@ static const struct snd_soc_component_driver dummy_codec = { SNDRV_PCM_FMTBIT_S32_LE | \ SNDRV_PCM_FMTBIT_U32_LE | \ SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE) + +/* + * Select these from Sound Card Manually + * SND_SOC_POSSIBLE_DAIFMT_CBP_CFP + * SND_SOC_POSSIBLE_DAIFMT_CBP_CFC + * SND_SOC_POSSIBLE_DAIFMT_CBC_CFP + * SND_SOC_POSSIBLE_DAIFMT_CBC_CFC + */ +static u64 dummy_dai_formats = + SND_SOC_POSSIBLE_DAIFMT_I2S | + SND_SOC_POSSIBLE_DAIFMT_RIGHT_J | + SND_SOC_POSSIBLE_DAIFMT_LEFT_J | + SND_SOC_POSSIBLE_DAIFMT_DSP_A | + SND_SOC_POSSIBLE_DAIFMT_DSP_B | + SND_SOC_POSSIBLE_DAIFMT_AC97 | + SND_SOC_POSSIBLE_DAIFMT_PDM | + SND_SOC_POSSIBLE_DAIFMT_GATED | + SND_SOC_POSSIBLE_DAIFMT_CONT | + SND_SOC_POSSIBLE_DAIFMT_NB_NF | + SND_SOC_POSSIBLE_DAIFMT_NB_IF | + SND_SOC_POSSIBLE_DAIFMT_IB_NF | + SND_SOC_POSSIBLE_DAIFMT_IB_IF; + +static const struct snd_soc_dai_ops dummy_dai_ops = { + .auto_selectable_formats = &dummy_dai_formats, + .num_auto_selectable_formats = 1, +}; + /* * The dummy CODEC is only meant to be used in situations where there is no * actual hardware. @@ -122,6 +150,7 @@ static struct snd_soc_dai_driver dummy_dai = { .rates = STUB_RATES, .formats = STUB_FORMATS, }, + .ops = &dummy_dai_ops, }; int snd_soc_dai_is_dummy(struct snd_soc_dai *dai) -- cgit v1.3-18-gd494 From 9eafc11f921b8cb7d7e28ab1fdcf6b92fcbcb0be Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Tue, 25 May 2021 15:23:44 +0200 Subject: ALSA: iec958: Split status creation and fill In some situations, like a codec probe, we need to provide an IEC status default but don't have access to the sampling rate and width yet since no stream has been configured yet. Each and every driver has its own default, whereas the core iec958 code also has some buried in the snd_pcm_create_iec958_consumer functions. Let's split these functions in two to provide a default that doesn't rely on the sampling rate and width, and another function to fill them when available. Signed-off-by: Maxime Ripard Reviewed-by: Takashi Iwai Link: https://lore.kernel.org/r/20210525132354.297468-3-maxime@cerno.tech --- include/sound/pcm_iec958.h | 8 +++ sound/core/pcm_iec958.c | 174 ++++++++++++++++++++++++++++++++++----------- 2 files changed, 140 insertions(+), 42 deletions(-) (limited to 'include') diff --git a/include/sound/pcm_iec958.h b/include/sound/pcm_iec958.h index 0939aa45e2fe..64e84441cde1 100644 --- a/include/sound/pcm_iec958.h +++ b/include/sound/pcm_iec958.h @@ -4,6 +4,14 @@ #include +int snd_pcm_create_iec958_consumer_default(u8 *cs, size_t len); + +int snd_pcm_fill_iec958_consumer(struct snd_pcm_runtime *runtime, u8 *cs, + size_t len); + +int snd_pcm_fill_iec958_consumer_hw_params(struct snd_pcm_hw_params *params, + u8 *cs, size_t len); + int snd_pcm_create_iec958_consumer(struct snd_pcm_runtime *runtime, u8 *cs, size_t len); diff --git a/sound/core/pcm_iec958.c b/sound/core/pcm_iec958.c index f9a211cc1f2c..7a1b816f67cc 100644 --- a/sound/core/pcm_iec958.c +++ b/sound/core/pcm_iec958.c @@ -9,41 +9,85 @@ #include #include -static int create_iec958_consumer(uint rate, uint sample_width, - u8 *cs, size_t len) +/** + * snd_pcm_create_iec958_consumer_default - create default consumer format IEC958 channel status + * @cs: channel status buffer, at least four bytes + * @len: length of channel status buffer + * + * Create the consumer format channel status data in @cs of maximum size + * @len. When relevant, the configuration-dependant bits will be set as + * unspecified. + * + * Drivers should then call einter snd_pcm_fill_iec958_consumer() or + * snd_pcm_fill_iec958_consumer_hw_params() to replace these unspecified + * bits by their actual values. + * + * Drivers may wish to tweak the contents of the buffer after creation. + * + * Returns: length of buffer, or negative error code if something failed. + */ +int snd_pcm_create_iec958_consumer_default(u8 *cs, size_t len) { - unsigned int fs, ws; - if (len < 4) return -EINVAL; - switch (rate) { - case 32000: - fs = IEC958_AES3_CON_FS_32000; - break; - case 44100: - fs = IEC958_AES3_CON_FS_44100; - break; - case 48000: - fs = IEC958_AES3_CON_FS_48000; - break; - case 88200: - fs = IEC958_AES3_CON_FS_88200; - break; - case 96000: - fs = IEC958_AES3_CON_FS_96000; - break; - case 176400: - fs = IEC958_AES3_CON_FS_176400; - break; - case 192000: - fs = IEC958_AES3_CON_FS_192000; - break; - default: + memset(cs, 0, len); + + cs[0] = IEC958_AES0_CON_NOT_COPYRIGHT | IEC958_AES0_CON_EMPHASIS_NONE; + cs[1] = IEC958_AES1_CON_GENERAL; + cs[2] = IEC958_AES2_CON_SOURCE_UNSPEC | IEC958_AES2_CON_CHANNEL_UNSPEC; + cs[3] = IEC958_AES3_CON_CLOCK_1000PPM | IEC958_AES3_CON_FS_NOTID; + + if (len > 4) + cs[4] = IEC958_AES4_CON_WORDLEN_NOTID; + + return len; +} +EXPORT_SYMBOL_GPL(snd_pcm_create_iec958_consumer_default); + +static int fill_iec958_consumer(uint rate, uint sample_width, + u8 *cs, size_t len) +{ + if (len < 4) return -EINVAL; + + if ((cs[3] & IEC958_AES3_CON_FS) == IEC958_AES3_CON_FS_NOTID) { + unsigned int fs; + + switch (rate) { + case 32000: + fs = IEC958_AES3_CON_FS_32000; + break; + case 44100: + fs = IEC958_AES3_CON_FS_44100; + break; + case 48000: + fs = IEC958_AES3_CON_FS_48000; + break; + case 88200: + fs = IEC958_AES3_CON_FS_88200; + break; + case 96000: + fs = IEC958_AES3_CON_FS_96000; + break; + case 176400: + fs = IEC958_AES3_CON_FS_176400; + break; + case 192000: + fs = IEC958_AES3_CON_FS_192000; + break; + default: + return -EINVAL; + } + + cs[3] &= ~IEC958_AES3_CON_FS; + cs[3] |= fs; } - if (len > 4) { + if (len > 4 && + (cs[4] & IEC958_AES4_CON_WORDLEN) == IEC958_AES4_CON_WORDLEN_NOTID) { + unsigned int ws; + switch (sample_width) { case 16: ws = IEC958_AES4_CON_WORDLEN_20_16; @@ -64,20 +108,57 @@ static int create_iec958_consumer(uint rate, uint sample_width, default: return -EINVAL; } - } - memset(cs, 0, len); + cs[4] &= ~IEC958_AES4_CON_WORDLEN; + cs[4] |= ws; + } - cs[0] = IEC958_AES0_CON_NOT_COPYRIGHT | IEC958_AES0_CON_EMPHASIS_NONE; - cs[1] = IEC958_AES1_CON_GENERAL; - cs[2] = IEC958_AES2_CON_SOURCE_UNSPEC | IEC958_AES2_CON_CHANNEL_UNSPEC; - cs[3] = IEC958_AES3_CON_CLOCK_1000PPM | fs; + return len; +} - if (len > 4) - cs[4] = ws; +/** + * snd_pcm_fill_iec958_consumer - Fill consumer format IEC958 channel status + * @runtime: pcm runtime structure with ->rate filled in + * @cs: channel status buffer, at least four bytes + * @len: length of channel status buffer + * + * Fill the unspecified bits in an IEC958 status bits array using the + * parameters of the PCM runtime @runtime. + * + * Drivers may wish to tweak the contents of the buffer after its been + * filled. + * + * Returns: length of buffer, or negative error code if something failed. + */ +int snd_pcm_fill_iec958_consumer(struct snd_pcm_runtime *runtime, + u8 *cs, size_t len) +{ + return fill_iec958_consumer(runtime->rate, + snd_pcm_format_width(runtime->format), + cs, len); +} +EXPORT_SYMBOL_GPL(snd_pcm_fill_iec958_consumer); - return len; +/** + * snd_pcm_fill_iec958_consumer_hw_params - Fill consumer format IEC958 channel status + * @params: the hw_params instance for extracting rate and sample format + * @cs: channel status buffer, at least four bytes + * @len: length of channel status buffer + * + * Fill the unspecified bits in an IEC958 status bits array using the + * parameters of the PCM hardware parameters @params. + * + * Drivers may wish to tweak the contents of the buffer after its been + * filled.. + * + * Returns: length of buffer, or negative error code if something failed. + */ +int snd_pcm_fill_iec958_consumer_hw_params(struct snd_pcm_hw_params *params, + u8 *cs, size_t len) +{ + return fill_iec958_consumer(params_rate(params), params_width(params), cs, len); } +EXPORT_SYMBOL_GPL(snd_pcm_fill_iec958_consumer_hw_params); /** * snd_pcm_create_iec958_consumer - create consumer format IEC958 channel status @@ -95,9 +176,13 @@ static int create_iec958_consumer(uint rate, uint sample_width, int snd_pcm_create_iec958_consumer(struct snd_pcm_runtime *runtime, u8 *cs, size_t len) { - return create_iec958_consumer(runtime->rate, - snd_pcm_format_width(runtime->format), - cs, len); + int ret; + + ret = snd_pcm_create_iec958_consumer_default(cs, len); + if (ret < 0) + return ret; + + return snd_pcm_fill_iec958_consumer(runtime, cs, len); } EXPORT_SYMBOL(snd_pcm_create_iec958_consumer); @@ -117,7 +202,12 @@ EXPORT_SYMBOL(snd_pcm_create_iec958_consumer); int snd_pcm_create_iec958_consumer_hw_params(struct snd_pcm_hw_params *params, u8 *cs, size_t len) { - return create_iec958_consumer(params_rate(params), params_width(params), - cs, len); + int ret; + + ret = snd_pcm_create_iec958_consumer_default(cs, len); + if (ret < 0) + return ret; + + return fill_iec958_consumer(params_rate(params), params_width(params), cs, len); } EXPORT_SYMBOL(snd_pcm_create_iec958_consumer_hw_params); -- cgit v1.3-18-gd494 From 2fef64eec23a0840c97977b16dd8919afaffa876 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Tue, 25 May 2021 15:23:47 +0200 Subject: ASoC: hdmi-codec: Add a prepare hook The IEC958 status bit is usually set by the userspace after hw_params has been called, so in order to use whatever is set by the userspace, we need to implement the prepare hook. Let's add it to the hdmi_codec_ops, and mandate that either prepare or hw_params is implemented. Signed-off-by: Maxime Ripard Acked-by: Mark Brown Link: https://lore.kernel.org/r/20210525132354.297468-6-maxime@cerno.tech --- include/sound/hdmi-codec.h | 12 ++++- sound/soc/codecs/hdmi-codec.c | 110 +++++++++++++++++++++++++++++++++--------- 2 files changed, 98 insertions(+), 24 deletions(-) (limited to 'include') diff --git a/include/sound/hdmi-codec.h b/include/sound/hdmi-codec.h index 4b3a1d374b90..4fc733c8c570 100644 --- a/include/sound/hdmi-codec.h +++ b/include/sound/hdmi-codec.h @@ -65,12 +65,22 @@ struct hdmi_codec_ops { /* * Configures HDMI-encoder for audio stream. - * Mandatory + * Having either prepare or hw_params is mandatory. */ int (*hw_params)(struct device *dev, void *data, struct hdmi_codec_daifmt *fmt, struct hdmi_codec_params *hparms); + /* + * Configures HDMI-encoder for audio stream. Can be called + * multiple times for each setup. + * + * Having either prepare or hw_params is mandatory. + */ + int (*prepare)(struct device *dev, void *data, + struct hdmi_codec_daifmt *fmt, + struct hdmi_codec_params *hparms); + /* * Shuts down the audio stream. * Mandatory diff --git a/sound/soc/codecs/hdmi-codec.c b/sound/soc/codecs/hdmi-codec.c index a0834b784814..a67c92032e11 100644 --- a/sound/soc/codecs/hdmi-codec.c +++ b/sound/soc/codecs/hdmi-codec.c @@ -481,6 +481,42 @@ static void hdmi_codec_shutdown(struct snd_pcm_substream *substream, mutex_unlock(&hcp->lock); } +static int hdmi_codec_fill_codec_params(struct snd_soc_dai *dai, + unsigned int sample_width, + unsigned int sample_rate, + unsigned int channels, + struct hdmi_codec_params *hp) +{ + struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai); + int idx; + + /* Select a channel allocation that matches with ELD and pcm channels */ + idx = hdmi_codec_get_ch_alloc_table_idx(hcp, channels); + if (idx < 0) { + dev_err(dai->dev, "Not able to map channels to speakers (%d)\n", + idx); + hcp->chmap_idx = HDMI_CODEC_CHMAP_IDX_UNKNOWN; + return idx; + } + + memset(hp, 0, sizeof(*hp)); + + hdmi_audio_infoframe_init(&hp->cea); + hp->cea.channels = channels; + hp->cea.coding_type = HDMI_AUDIO_CODING_TYPE_STREAM; + hp->cea.sample_size = HDMI_AUDIO_SAMPLE_SIZE_STREAM; + hp->cea.sample_frequency = HDMI_AUDIO_SAMPLE_FREQUENCY_STREAM; + hp->cea.channel_allocation = hdmi_codec_channel_alloc[idx].ca_id; + + hp->sample_width = sample_width; + hp->sample_rate = sample_rate; + hp->channels = channels; + + hcp->chmap_idx = hdmi_codec_channel_alloc[idx].ca_id; + + return 0; +} + static int hdmi_codec_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) @@ -495,12 +531,23 @@ static int hdmi_codec_hw_params(struct snd_pcm_substream *substream, .dig_subframe = { 0 }, } }; - int ret, idx; + int ret; + + if (!hcp->hcd.ops->hw_params) + return 0; dev_dbg(dai->dev, "%s() width %d rate %d channels %d\n", __func__, params_width(params), params_rate(params), params_channels(params)); + ret = hdmi_codec_fill_codec_params(dai, + params_width(params), + params_rate(params), + params_channels(params), + &hp); + if (ret < 0) + return ret; + memcpy(hp.iec.status, hcp->iec_status, sizeof(hp.iec.status)); ret = snd_pcm_fill_iec958_consumer_hw_params(params, hp.iec.status, sizeof(hp.iec.status)); @@ -510,32 +557,47 @@ static int hdmi_codec_hw_params(struct snd_pcm_substream *substream, return ret; } - hdmi_audio_infoframe_init(&hp.cea); - hp.cea.channels = params_channels(params); - hp.cea.coding_type = HDMI_AUDIO_CODING_TYPE_STREAM; - hp.cea.sample_size = HDMI_AUDIO_SAMPLE_SIZE_STREAM; - hp.cea.sample_frequency = HDMI_AUDIO_SAMPLE_FREQUENCY_STREAM; - - /* Select a channel allocation that matches with ELD and pcm channels */ - idx = hdmi_codec_get_ch_alloc_table_idx(hcp, hp.cea.channels); - if (idx < 0) { - dev_err(dai->dev, "Not able to map channels to speakers (%d)\n", - idx); - hcp->chmap_idx = HDMI_CODEC_CHMAP_IDX_UNKNOWN; - return idx; - } - hp.cea.channel_allocation = hdmi_codec_channel_alloc[idx].ca_id; - hcp->chmap_idx = hdmi_codec_channel_alloc[idx].ca_id; - - hp.sample_width = params_width(params); - hp.sample_rate = params_rate(params); - hp.channels = params_channels(params); - cf->bit_fmt = params_format(params); return hcp->hcd.ops->hw_params(dai->dev->parent, hcp->hcd.data, cf, &hp); } +static int hdmi_codec_prepare(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai); + struct hdmi_codec_daifmt *cf = dai->playback_dma_data; + struct snd_pcm_runtime *runtime = substream->runtime; + unsigned int channels = runtime->channels; + unsigned int width = snd_pcm_format_width(runtime->format); + unsigned int rate = runtime->rate; + struct hdmi_codec_params hp; + int ret; + + if (!hcp->hcd.ops->prepare) + return 0; + + dev_dbg(dai->dev, "%s() width %d rate %d channels %d\n", __func__, + width, rate, channels); + + ret = hdmi_codec_fill_codec_params(dai, width, rate, channels, &hp); + if (ret < 0) + return ret; + + memcpy(hp.iec.status, hcp->iec_status, sizeof(hp.iec.status)); + ret = snd_pcm_fill_iec958_consumer(runtime, hp.iec.status, + sizeof(hp.iec.status)); + if (ret < 0) { + dev_err(dai->dev, "Creating IEC958 channel status failed %d\n", + ret); + return ret; + } + + cf->bit_fmt = runtime->format; + return hcp->hcd.ops->prepare(dai->dev->parent, hcp->hcd.data, + cf, &hp); +} + static int hdmi_codec_i2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) { @@ -627,6 +689,7 @@ static const struct snd_soc_dai_ops hdmi_codec_i2s_dai_ops = { .startup = hdmi_codec_startup, .shutdown = hdmi_codec_shutdown, .hw_params = hdmi_codec_hw_params, + .prepare = hdmi_codec_prepare, .set_fmt = hdmi_codec_i2s_set_fmt, .mute_stream = hdmi_codec_mute, }; @@ -917,7 +980,8 @@ static int hdmi_codec_probe(struct platform_device *pdev) } dai_count = hcd->i2s + hcd->spdif; - if (dai_count < 1 || !hcd->ops || !hcd->ops->hw_params || + if (dai_count < 1 || !hcd->ops || + (!hcd->ops->hw_params && !hcd->ops->prepare) || !hcd->ops->audio_shutdown) { dev_err(dev, "%s: Invalid parameters\n", __func__); return -EINVAL; -- cgit v1.3-18-gd494 From 099ab4fcf3752a1bc721138632d28aa6685b1cee Mon Sep 17 00:00:00 2001 From: Gabriel David Date: Fri, 4 Jun 2021 22:22:03 -0400 Subject: ASoC: q6afe: dt-bindings: Add QUIN_MI2S_RX/TX This patch adds bindings required for Quinary MI2S ports on AFE. Signed-off-by: Gabriel David Reviewed-by: Srinivas Kandagatla Link: https://lore.kernel.org/r/20210605022206.13226-2-ultracoolguy@disroot.org Signed-off-by: Mark Brown --- include/dt-bindings/sound/qcom,q6afe.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/dt-bindings/sound/qcom,q6afe.h b/include/dt-bindings/sound/qcom,q6afe.h index f64b5d2e6efd..66c21ab03eef 100644 --- a/include/dt-bindings/sound/qcom,q6afe.h +++ b/include/dt-bindings/sound/qcom,q6afe.h @@ -129,6 +129,8 @@ #define TX_CODEC_DMA_TX_5 124 #define RX_CODEC_DMA_RX_6 125 #define RX_CODEC_DMA_RX_7 126 +#define QUINARY_MI2S_RX 127 +#define QUINARY_MI2S_TX 128 #define LPASS_CLK_ID_PRI_MI2S_IBIT 1 #define LPASS_CLK_ID_PRI_MI2S_EBIT 2 -- cgit v1.3-18-gd494 From 91ae447762517c814672e2e5ff2383348101a032 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Mon, 14 Jun 2021 09:56:46 +0900 Subject: ASoC: soc-core: add snd_soc_daifmt_clock_provider_from_bitmap() This patch adds snd_soc_daifmt_clock_provider_from_bitmap() function to judge clock/frame master from its bitmap. This is prepare for snd_soc_of_parse_daifmt() cleanup. Signed-off-by: Kuninori Morimoto Link: https://lore.kernel.org/r/87a6ntw9f5.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Mark Brown --- include/sound/soc.h | 1 + sound/soc/soc-core.c | 33 +++++++++++++++++++-------------- 2 files changed, 20 insertions(+), 14 deletions(-) (limited to 'include') diff --git a/include/sound/soc.h b/include/sound/soc.h index e746da996351..ea35e431e04e 100644 --- a/include/sound/soc.h +++ b/include/sound/soc.h @@ -1232,6 +1232,7 @@ void snd_soc_of_parse_audio_prefix(struct snd_soc_card *card, int snd_soc_of_parse_audio_routing(struct snd_soc_card *card, const char *propname); int snd_soc_of_parse_aux_devs(struct snd_soc_card *card, const char *propname); +unsigned int snd_soc_daifmt_clock_provider_from_bitmap(unsigned int bit_frame); unsigned int snd_soc_of_parse_daifmt(struct device_node *np, const char *prefix, struct device_node **bitclkmaster, diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c index da3cd7cf5808..bbbdf62b371b 100644 --- a/sound/soc/soc-core.c +++ b/sound/soc/soc-core.c @@ -3017,6 +3017,24 @@ int snd_soc_of_parse_aux_devs(struct snd_soc_card *card, const char *propname) } EXPORT_SYMBOL_GPL(snd_soc_of_parse_aux_devs); +unsigned int snd_soc_daifmt_clock_provider_from_bitmap(unsigned int bit_frame) +{ + /* Codec base */ + switch (bit_frame) { + case 0x11: + return SND_SOC_DAIFMT_CBP_CFP; + case 0x10: + return SND_SOC_DAIFMT_CBP_CFC; + case 0x01: + return SND_SOC_DAIFMT_CBC_CFP; + default: + return SND_SOC_DAIFMT_CBC_CFC; + } + + return 0; +} +EXPORT_SYMBOL_GPL(snd_soc_daifmt_clock_provider_from_bitmap); + unsigned int snd_soc_of_parse_daifmt(struct device_node *np, const char *prefix, struct device_node **bitclkmaster, @@ -3115,20 +3133,7 @@ unsigned int snd_soc_of_parse_daifmt(struct device_node *np, if (frame && framemaster) *framemaster = of_parse_phandle(np, prop, 0); - switch ((bit << 4) + frame) { - case 0x11: - format |= SND_SOC_DAIFMT_CBM_CFM; - break; - case 0x10: - format |= SND_SOC_DAIFMT_CBM_CFS; - break; - case 0x01: - format |= SND_SOC_DAIFMT_CBS_CFM; - break; - default: - format |= SND_SOC_DAIFMT_CBS_CFS; - break; - } + format |= snd_soc_daifmt_clock_provider_from_bitmap((bit << 4) + frame); return format; } -- cgit v1.3-18-gd494 From b44a67f89366597364693e07e814660d5df8c66f Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Mon, 14 Jun 2021 09:56:54 +0900 Subject: ASoC: soc-core: add snd_soc_daifmt_clock_provider_fliped() Sometimes we want to get CLOCK_PROVIDER fliped dai_fmt. This patch adds new snd_soc_daifmt_clock_provider_fliped() for it. Signed-off-by: Kuninori Morimoto Link: https://lore.kernel.org/r/878s3dw9ex.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Mark Brown --- include/sound/soc.h | 2 ++ sound/soc/soc-core.c | 40 +++++++++++++++++++++++++--------------- 2 files changed, 27 insertions(+), 15 deletions(-) (limited to 'include') diff --git a/include/sound/soc.h b/include/sound/soc.h index ea35e431e04e..45f3da277c5d 100644 --- a/include/sound/soc.h +++ b/include/sound/soc.h @@ -1232,6 +1232,8 @@ void snd_soc_of_parse_audio_prefix(struct snd_soc_card *card, int snd_soc_of_parse_audio_routing(struct snd_soc_card *card, const char *propname); int snd_soc_of_parse_aux_devs(struct snd_soc_card *card, const char *propname); + +unsigned int snd_soc_daifmt_clock_provider_fliped(unsigned int dai_fmt); unsigned int snd_soc_daifmt_clock_provider_from_bitmap(unsigned int bit_frame); unsigned int snd_soc_of_parse_daifmt(struct device_node *np, const char *prefix, diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c index bbbdf62b371b..6050f44d49b2 100644 --- a/sound/soc/soc-core.c +++ b/sound/soc/soc-core.c @@ -1249,21 +1249,8 @@ int snd_soc_runtime_set_dai_fmt(struct snd_soc_pcm_runtime *rtd, * Flip the polarity for the "CPU" end of a CODEC<->CODEC link * the component which has non_legacy_dai_naming is Codec */ - inv_dai_fmt = dai_fmt & ~SND_SOC_DAIFMT_MASTER_MASK; - switch (dai_fmt & SND_SOC_DAIFMT_MASTER_MASK) { - case SND_SOC_DAIFMT_CBM_CFM: - inv_dai_fmt |= SND_SOC_DAIFMT_CBS_CFS; - break; - case SND_SOC_DAIFMT_CBM_CFS: - inv_dai_fmt |= SND_SOC_DAIFMT_CBS_CFM; - break; - case SND_SOC_DAIFMT_CBS_CFM: - inv_dai_fmt |= SND_SOC_DAIFMT_CBM_CFS; - break; - case SND_SOC_DAIFMT_CBS_CFS: - inv_dai_fmt |= SND_SOC_DAIFMT_CBM_CFM; - break; - } + inv_dai_fmt = snd_soc_daifmt_clock_provider_fliped(dai_fmt); + for_each_rtd_cpu_dais(rtd, i, cpu_dai) { unsigned int fmt = dai_fmt; @@ -3017,6 +3004,29 @@ int snd_soc_of_parse_aux_devs(struct snd_soc_card *card, const char *propname) } EXPORT_SYMBOL_GPL(snd_soc_of_parse_aux_devs); +unsigned int snd_soc_daifmt_clock_provider_fliped(unsigned int dai_fmt) +{ + unsigned int inv_dai_fmt = dai_fmt & ~SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK; + + switch (dai_fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { + case SND_SOC_DAIFMT_CBP_CFP: + inv_dai_fmt |= SND_SOC_DAIFMT_CBC_CFC; + break; + case SND_SOC_DAIFMT_CBP_CFC: + inv_dai_fmt |= SND_SOC_DAIFMT_CBC_CFP; + break; + case SND_SOC_DAIFMT_CBC_CFP: + inv_dai_fmt |= SND_SOC_DAIFMT_CBP_CFC; + break; + case SND_SOC_DAIFMT_CBC_CFC: + inv_dai_fmt |= SND_SOC_DAIFMT_CBP_CFP; + break; + } + + return inv_dai_fmt; +} +EXPORT_SYMBOL_GPL(snd_soc_daifmt_clock_provider_fliped); + unsigned int snd_soc_daifmt_clock_provider_from_bitmap(unsigned int bit_frame) { /* Codec base */ -- cgit v1.3-18-gd494 From 7766861d1f8d3afc35361ab599eee6851fcd4416 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Mon, 14 Jun 2021 09:57:08 +0900 Subject: ASoC: soc-core: add snd_soc_daifmt_parse_format/clock_provider() snd_soc_of_parse_daifmt() parses daifmt, but bitclock/frame provider parsing part is one of headacke, because we are assuming below both cases. A) node { bitclock-master; frame-master; ... }; B) link { bitclock-master = <&xxx>; frame-master = <&xxx>; ... }; The original was style A), and style B) was added later by commit b3ca11ff59bc ("ASoC: simple-card: Move dai-link level properties away from dai subnodes"). snd_soc_of_parse_daifmt() parses it as style A), and user need to update it to style B) if needed. To handle it more flexibile, this patch adds new functions which separates snd_soc_of_parse_daifmt() helper function. snd_soc_daifmt_parse_format() :for DAI format snd_soc_daifmt_parse_clock_provider_as_flag() :for style A) snd_soc_daifmt_parse_clock_provider_as_phandl() :for style B) snd_soc_daifmt_parse_clock_provider_as_bitmap() :use with _from_bitmap This means snd_soc_of_parse_daifmt() == snd_soc_daifmt_parse_format() | snd_soc_daifmt_parse_clock_provider_as_flag() This patch also indicate relatesionship comment for snd_soc_daifmt_clock_provider_from_bitmap(). Signed-off-by: Kuninori Morimoto Link: https://lore.kernel.org/r/877dixw9ej.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Mark Brown --- include/sound/soc.h | 14 ++++++ sound/soc/soc-core.c | 124 +++++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 138 insertions(+) (limited to 'include') diff --git a/include/sound/soc.h b/include/sound/soc.h index 45f3da277c5d..63194a8773cd 100644 --- a/include/sound/soc.h +++ b/include/sound/soc.h @@ -1235,6 +1235,20 @@ int snd_soc_of_parse_aux_devs(struct snd_soc_card *card, const char *propname); unsigned int snd_soc_daifmt_clock_provider_fliped(unsigned int dai_fmt); unsigned int snd_soc_daifmt_clock_provider_from_bitmap(unsigned int bit_frame); + +unsigned int snd_soc_daifmt_parse_format(struct device_node *np, const char *prefix); +unsigned int snd_soc_daifmt_parse_clock_provider_raw(struct device_node *np, + const char *prefix, + struct device_node **bitclkmaster, + struct device_node **framemaster); +#define snd_soc_daifmt_parse_clock_provider_as_bitmap(np, prefix) \ + snd_soc_daifmt_parse_clock_provider_raw(np, prefix, NULL, NULL) +#define snd_soc_daifmt_parse_clock_provider_as_phandle \ + snd_soc_daifmt_parse_clock_provider_raw +#define snd_soc_daifmt_parse_clock_provider_as_flag(np, prefix) \ + snd_soc_daifmt_clock_provider_from_bitmap( \ + snd_soc_daifmt_parse_clock_provider_as_bitmap(np, prefix)) + unsigned int snd_soc_of_parse_daifmt(struct device_node *np, const char *prefix, struct device_node **bitclkmaster, diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c index 6050f44d49b2..c22e8b547821 100644 --- a/sound/soc/soc-core.c +++ b/sound/soc/soc-core.c @@ -3029,6 +3029,11 @@ EXPORT_SYMBOL_GPL(snd_soc_daifmt_clock_provider_fliped); unsigned int snd_soc_daifmt_clock_provider_from_bitmap(unsigned int bit_frame) { + /* + * bit_frame is return value from + * snd_soc_daifmt_parse_clock_provider_raw() + */ + /* Codec base */ switch (bit_frame) { case 0x11: @@ -3045,6 +3050,125 @@ unsigned int snd_soc_daifmt_clock_provider_from_bitmap(unsigned int bit_frame) } EXPORT_SYMBOL_GPL(snd_soc_daifmt_clock_provider_from_bitmap); +unsigned int snd_soc_daifmt_parse_format(struct device_node *np, + const char *prefix) +{ + int ret, i; + char prop[128]; + unsigned int format = 0; + int bit, frame; + const char *str; + struct { + char *name; + unsigned int val; + } of_fmt_table[] = { + { "i2s", SND_SOC_DAIFMT_I2S }, + { "right_j", SND_SOC_DAIFMT_RIGHT_J }, + { "left_j", SND_SOC_DAIFMT_LEFT_J }, + { "dsp_a", SND_SOC_DAIFMT_DSP_A }, + { "dsp_b", SND_SOC_DAIFMT_DSP_B }, + { "ac97", SND_SOC_DAIFMT_AC97 }, + { "pdm", SND_SOC_DAIFMT_PDM}, + { "msb", SND_SOC_DAIFMT_MSB }, + { "lsb", SND_SOC_DAIFMT_LSB }, + }; + + if (!prefix) + prefix = ""; + + /* + * check "dai-format = xxx" + * or "[prefix]format = xxx" + * SND_SOC_DAIFMT_FORMAT_MASK area + */ + ret = of_property_read_string(np, "dai-format", &str); + if (ret < 0) { + snprintf(prop, sizeof(prop), "%sformat", prefix); + ret = of_property_read_string(np, prop, &str); + } + if (ret == 0) { + for (i = 0; i < ARRAY_SIZE(of_fmt_table); i++) { + if (strcmp(str, of_fmt_table[i].name) == 0) { + format |= of_fmt_table[i].val; + break; + } + } + } + + /* + * check "[prefix]continuous-clock" + * SND_SOC_DAIFMT_CLOCK_MASK area + */ + snprintf(prop, sizeof(prop), "%scontinuous-clock", prefix); + if (of_property_read_bool(np, prop)) + format |= SND_SOC_DAIFMT_CONT; + else + format |= SND_SOC_DAIFMT_GATED; + + /* + * check "[prefix]bitclock-inversion" + * check "[prefix]frame-inversion" + * SND_SOC_DAIFMT_INV_MASK area + */ + snprintf(prop, sizeof(prop), "%sbitclock-inversion", prefix); + bit = !!of_get_property(np, prop, NULL); + + snprintf(prop, sizeof(prop), "%sframe-inversion", prefix); + frame = !!of_get_property(np, prop, NULL); + + switch ((bit << 4) + frame) { + case 0x11: + format |= SND_SOC_DAIFMT_IB_IF; + break; + case 0x10: + format |= SND_SOC_DAIFMT_IB_NF; + break; + case 0x01: + format |= SND_SOC_DAIFMT_NB_IF; + break; + default: + /* SND_SOC_DAIFMT_NB_NF is default */ + break; + } + + return format; +} +EXPORT_SYMBOL_GPL(snd_soc_daifmt_parse_format); + +unsigned int snd_soc_daifmt_parse_clock_provider_raw(struct device_node *np, + const char *prefix, + struct device_node **bitclkmaster, + struct device_node **framemaster) +{ + char prop[128]; + unsigned int bit, frame; + + if (!prefix) + prefix = ""; + + /* + * check "[prefix]bitclock-master" + * check "[prefix]frame-master" + */ + snprintf(prop, sizeof(prop), "%sbitclock-master", prefix); + bit = !!of_get_property(np, prop, NULL); + if (bit && bitclkmaster) + *bitclkmaster = of_parse_phandle(np, prop, 0); + + snprintf(prop, sizeof(prop), "%sframe-master", prefix); + frame = !!of_get_property(np, prop, NULL); + if (frame && framemaster) + *framemaster = of_parse_phandle(np, prop, 0); + + /* + * return bitmap. + * It will be parameter of + * snd_soc_daifmt_clock_provider_from_bitmap() + */ + return (bit << 4) + frame; +} +EXPORT_SYMBOL_GPL(snd_soc_daifmt_parse_clock_provider_raw); + unsigned int snd_soc_of_parse_daifmt(struct device_node *np, const char *prefix, struct device_node **bitclkmaster, -- cgit v1.3-18-gd494 From 8439c5861cf0c88037f6e9cdd3ba5f1c472f847a Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Mon, 14 Jun 2021 09:58:35 +0900 Subject: ASoC: soc-core: remove snd_soc_of_parse_daifmt() No driver is using snd_soc_of_parse_daifmt(). This patch removes it. Signed-off-by: Kuninori Morimoto Link: https://lore.kernel.org/r/87zgvtuuro.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Mark Brown --- include/sound/soc.h | 4 -- sound/soc/soc-core.c | 104 --------------------------------------------------- 2 files changed, 108 deletions(-) (limited to 'include') diff --git a/include/sound/soc.h b/include/sound/soc.h index 63194a8773cd..675849d07284 100644 --- a/include/sound/soc.h +++ b/include/sound/soc.h @@ -1249,10 +1249,6 @@ unsigned int snd_soc_daifmt_parse_clock_provider_raw(struct device_node *np, snd_soc_daifmt_clock_provider_from_bitmap( \ snd_soc_daifmt_parse_clock_provider_as_bitmap(np, prefix)) -unsigned int snd_soc_of_parse_daifmt(struct device_node *np, - const char *prefix, - struct device_node **bitclkmaster, - struct device_node **framemaster); int snd_soc_get_dai_id(struct device_node *ep); int snd_soc_get_dai_name(const struct of_phandle_args *args, const char **dai_name); diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c index c22e8b547821..11974d27060e 100644 --- a/sound/soc/soc-core.c +++ b/sound/soc/soc-core.c @@ -3169,110 +3169,6 @@ unsigned int snd_soc_daifmt_parse_clock_provider_raw(struct device_node *np, } EXPORT_SYMBOL_GPL(snd_soc_daifmt_parse_clock_provider_raw); -unsigned int snd_soc_of_parse_daifmt(struct device_node *np, - const char *prefix, - struct device_node **bitclkmaster, - struct device_node **framemaster) -{ - int ret, i; - char prop[128]; - unsigned int format = 0; - int bit, frame; - const char *str; - struct { - char *name; - unsigned int val; - } of_fmt_table[] = { - { "i2s", SND_SOC_DAIFMT_I2S }, - { "right_j", SND_SOC_DAIFMT_RIGHT_J }, - { "left_j", SND_SOC_DAIFMT_LEFT_J }, - { "dsp_a", SND_SOC_DAIFMT_DSP_A }, - { "dsp_b", SND_SOC_DAIFMT_DSP_B }, - { "ac97", SND_SOC_DAIFMT_AC97 }, - { "pdm", SND_SOC_DAIFMT_PDM}, - { "msb", SND_SOC_DAIFMT_MSB }, - { "lsb", SND_SOC_DAIFMT_LSB }, - }; - - if (!prefix) - prefix = ""; - - /* - * check "dai-format = xxx" - * or "[prefix]format = xxx" - * SND_SOC_DAIFMT_FORMAT_MASK area - */ - ret = of_property_read_string(np, "dai-format", &str); - if (ret < 0) { - snprintf(prop, sizeof(prop), "%sformat", prefix); - ret = of_property_read_string(np, prop, &str); - } - if (ret == 0) { - for (i = 0; i < ARRAY_SIZE(of_fmt_table); i++) { - if (strcmp(str, of_fmt_table[i].name) == 0) { - format |= of_fmt_table[i].val; - break; - } - } - } - - /* - * check "[prefix]continuous-clock" - * SND_SOC_DAIFMT_CLOCK_MASK area - */ - snprintf(prop, sizeof(prop), "%scontinuous-clock", prefix); - if (of_property_read_bool(np, prop)) - format |= SND_SOC_DAIFMT_CONT; - else - format |= SND_SOC_DAIFMT_GATED; - - /* - * check "[prefix]bitclock-inversion" - * check "[prefix]frame-inversion" - * SND_SOC_DAIFMT_INV_MASK area - */ - snprintf(prop, sizeof(prop), "%sbitclock-inversion", prefix); - bit = !!of_get_property(np, prop, NULL); - - snprintf(prop, sizeof(prop), "%sframe-inversion", prefix); - frame = !!of_get_property(np, prop, NULL); - - switch ((bit << 4) + frame) { - case 0x11: - format |= SND_SOC_DAIFMT_IB_IF; - break; - case 0x10: - format |= SND_SOC_DAIFMT_IB_NF; - break; - case 0x01: - format |= SND_SOC_DAIFMT_NB_IF; - break; - default: - /* SND_SOC_DAIFMT_NB_NF is default */ - break; - } - - /* - * check "[prefix]bitclock-master" - * check "[prefix]frame-master" - * SND_SOC_DAIFMT_MASTER_MASK area - */ - snprintf(prop, sizeof(prop), "%sbitclock-master", prefix); - bit = !!of_get_property(np, prop, NULL); - if (bit && bitclkmaster) - *bitclkmaster = of_parse_phandle(np, prop, 0); - - snprintf(prop, sizeof(prop), "%sframe-master", prefix); - frame = !!of_get_property(np, prop, NULL); - if (frame && framemaster) - *framemaster = of_parse_phandle(np, prop, 0); - - format |= snd_soc_daifmt_clock_provider_from_bitmap((bit << 4) + frame); - - return format; -} -EXPORT_SYMBOL_GPL(snd_soc_of_parse_daifmt); - int snd_soc_get_dai_id(struct device_node *ep) { struct snd_soc_component *component; -- cgit v1.3-18-gd494