From 6b8777b46823fb0b42fba69b5311682124e5a71c Mon Sep 17 00:00:00 2001 From: Vladimir Barinov Date: Thu, 29 Mar 2007 16:29:20 +0100 Subject: [ARM] 4296/1: ixp4xx: compile fix Fix compilation fail for ixp4xx platforms for the case when CONFIG_IXP4XX_INDIRECT_PCI is set. That is due to the check_signature() is appeared in include/linux/io.h. Signed-off-by: Vladimir Barinov Signed-off-by: Russell King --- include/asm-arm/arch-ixp4xx/io.h | 17 ----------------- 1 file changed, 17 deletions(-) (limited to 'include') diff --git a/include/asm-arm/arch-ixp4xx/io.h b/include/asm-arm/arch-ixp4xx/io.h index b7b5414d9320..a41ba229c564 100644 --- a/include/asm-arm/arch-ixp4xx/io.h +++ b/include/asm-arm/arch-ixp4xx/io.h @@ -238,23 +238,6 @@ __ixp4xx_readsl(const volatile void __iomem *bus_addr, u32 *vaddr, u32 count) #define memcpy_fromio(a,c,l) _memcpy_fromio((a),(c),(l)) #define memcpy_toio(c,a,l) _memcpy_toio((c),(a),(l)) -static inline int -check_signature(const unsigned char __iomem *bus_addr, const unsigned char *signature, - int length) -{ - int retval = 0; - do { - if (readb(bus_addr) != *signature) - goto out; - bus_addr++; - signature++; - length--; - } while (length); - retval = 1; -out: - return retval; -} - #endif #ifndef CONFIG_PCI -- cgit v1.2.3-59-g8ed1b From 6c330ba72c45007a9ef681396925c22d11029008 Mon Sep 17 00:00:00 2001 From: Russell King Date: Sun, 1 Apr 2007 22:35:01 +0100 Subject: [ARM] Fix __NR_kexec_load It's __NR_kexec_load, not __NR_sys_kexec_load Signed-off-by: Russell King --- include/asm-arm/unistd.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-arm/unistd.h b/include/asm-arm/unistd.h index 0991b7bc3f78..c025ab47e4b9 100644 --- a/include/asm-arm/unistd.h +++ b/include/asm-arm/unistd.h @@ -372,7 +372,7 @@ #define __NR_move_pages (__NR_SYSCALL_BASE+344) #define __NR_getcpu (__NR_SYSCALL_BASE+345) /* 346 for epoll_pwait */ -#define __NR_sys_kexec_load (__NR_SYSCALL_BASE+347) +#define __NR_kexec_load (__NR_SYSCALL_BASE+347) /* * The following SWIs are ARM private. -- cgit v1.2.3-59-g8ed1b From 398e692fd5cecdd25d311b47bbae69f7bac3a3cb Mon Sep 17 00:00:00 2001 From: Lennert Buytenhek Date: Sat, 31 Mar 2007 12:03:20 +0100 Subject: [ARM] 4298/1: fix memory barriers for DMA coherent and SMP platforms This patch: - Switches mb/rmb/wmb back to being full-blown DMBs on ARM SMP systems, since mb/rmb/wmb are required to order Normal memory accesses as well. - Enables the use of DMB and ISB on XSC3 (which is an ARMv5TE ISA core but conforms to the ARMv6 memory ordering model and supports the various ARMv6 barriers.) - Makes DMA coherent platforms (only ixp23xx at the moment) map mb/rmb/wmb to dmb(), as on DMA coherent platforms, DMA consistent mappings are done as Normal mappings, which are weakly ordered. Signed-off-by: Lennert Buytenhek Acked-by: David Howells Acked-by: Catalin Marinas Acked-by: Paul E. McKenney Acked-by: Dan Williams Signed-off-by: Russell King --- include/asm-arm/system.h | 34 ++++++++++++++++++---------------- 1 file changed, 18 insertions(+), 16 deletions(-) (limited to 'include') diff --git a/include/asm-arm/system.h b/include/asm-arm/system.h index f06d8a43fdee..69134c7518c1 100644 --- a/include/asm-arm/system.h +++ b/include/asm-arm/system.h @@ -3,6 +3,7 @@ #ifdef __KERNEL__ +#include #define CPU_ARCH_UNKNOWN 0 #define CPU_ARCH_ARMv3 1 @@ -154,7 +155,7 @@ extern unsigned int user_debug; #define vectors_high() (0) #endif -#if __LINUX_ARM_ARCH__ >= 6 +#if defined(CONFIG_CPU_XSC3) || __LINUX_ARM_ARCH__ >= 6 #define isb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c5, 4" \ : : "r" (0) : "memory") #define dsb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \ @@ -168,22 +169,23 @@ extern unsigned int user_debug; #define dmb() __asm__ __volatile__ ("" : : : "memory") #endif -#define mb() barrier() -#define rmb() barrier() -#define wmb() barrier() -#define read_barrier_depends() do { } while(0) - -#ifdef CONFIG_SMP -#define smp_mb() dmb() -#define smp_rmb() dmb() -#define smp_wmb() dmb() -#define smp_read_barrier_depends() read_barrier_depends() +#ifndef CONFIG_SMP +#define mb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0) +#define rmb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0) +#define wmb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0) +#define smp_mb() barrier() +#define smp_rmb() barrier() +#define smp_wmb() barrier() #else -#define smp_mb() barrier() -#define smp_rmb() barrier() -#define smp_wmb() barrier() -#define smp_read_barrier_depends() read_barrier_depends() -#endif /* CONFIG_SMP */ +#define mb() dmb() +#define rmb() dmb() +#define wmb() dmb() +#define smp_mb() dmb() +#define smp_rmb() dmb() +#define smp_wmb() dmb() +#endif +#define read_barrier_depends() do { } while(0) +#define smp_read_barrier_depends() do { } while(0) #define set_mb(var, value) do { var = value; smp_mb(); } while (0) #define nop() __asm__ __volatile__("mov\tr0,r0\t@ nop\n\t"); -- cgit v1.2.3-59-g8ed1b