From 52142e756e9bf6485d3d53596e8aff2e816a7253 Mon Sep 17 00:00:00 2001 From: Benjamin Herrenschmidt Date: Mon, 19 Nov 2007 19:25:06 +1100 Subject: [POWERPC] Fix kmalloc alignment on non-coherent DMA platforms On platforms doing non-coherent DMA (4xx, 8xx, ...), it's important that the kmalloc minimum alignment is set to the cache line size, to avoid sharing cache lines between different objects, so that DMA to one of the objects doesn't corrupt the other. Signed-off-by: Benjamin Herrenschmidt Signed-off-by: Paul Mackerras --- include/asm-powerpc/page_32.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include') diff --git a/include/asm-powerpc/page_32.h b/include/asm-powerpc/page_32.h index 374d0db37e1c..17110aff26e7 100644 --- a/include/asm-powerpc/page_32.h +++ b/include/asm-powerpc/page_32.h @@ -6,6 +6,10 @@ #define PPC_MEMSTART 0 +#ifdef CONFIG_NOT_COHERENT_CACHE +#define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES +#endif + #ifndef __ASSEMBLY__ /* * The basic type of a PTE - 64 bits for those CPUs with > 32 bit -- cgit v1.2.3-59-g8ed1b