From 7ab3f8d595a1b1e5cf8d726b72fd476fe0d0226c Mon Sep 17 00:00:00 2001 From: Russell King Date: Fri, 2 Mar 2007 15:01:36 +0000 Subject: [ARM] Add ability to dump exception stacks to kernel backtraces Signed-off-by: Russell King --- include/asm-arm/system.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/asm-arm/system.h b/include/asm-arm/system.h index 69134c7518c1..63b3080bdac4 100644 --- a/include/asm-arm/system.h +++ b/include/asm-arm/system.h @@ -76,6 +76,8 @@ #include #include +#define __exception __attribute__((section(".exception.text"))) + struct thread_info; struct task_struct; -- cgit v1.2.3-59-g8ed1b From 27350afdfc94a78adbdee20bb00f6058a0ef1eab Mon Sep 17 00:00:00 2001 From: Russell King Date: Sat, 3 Mar 2007 11:51:31 +0000 Subject: [ARM] EBSA110: Add readsw/readsl/writesw/writesl Signed-off-by: Russell King --- arch/arm/mach-ebsa110/io.c | 40 +++++++++++++++++++++++++++++++++++++++ include/asm-arm/arch-ebsa110/io.h | 8 ++++++++ 2 files changed, 48 insertions(+) (limited to 'include') diff --git a/arch/arm/mach-ebsa110/io.c b/arch/arm/mach-ebsa110/io.c index db38afb2aa88..bbf0d332407e 100644 --- a/arch/arm/mach-ebsa110/io.c +++ b/arch/arm/mach-ebsa110/io.c @@ -102,6 +102,26 @@ EXPORT_SYMBOL(__readb); EXPORT_SYMBOL(__readw); EXPORT_SYMBOL(__readl); +void readsw(void __iomem *addr, void *data, int len) +{ + void __iomem *a = __isamem_convert_addr(addr); + + BUG_ON((unsigned long)addr & 1); + + __raw_readsw(a, data, len); +} +EXPORT_SYMBOL(readsw); + +void readsl(void __iomem *addr, void *data, int len) +{ + void __iomem *a = __isamem_convert_addr(addr); + + BUG_ON((unsigned long)addr & 3); + + __raw_readsl(a, data, len); +} +EXPORT_SYMBOL(readsl); + void __writeb(u8 val, void __iomem *addr) { void __iomem *a = __isamem_convert_addr(addr); @@ -137,6 +157,26 @@ EXPORT_SYMBOL(__writeb); EXPORT_SYMBOL(__writew); EXPORT_SYMBOL(__writel); +void writesw(void __iomem *addr, void *data, int len) +{ + void __iomem *a = __isamem_convert_addr(addr); + + BUG_ON((unsigned long)addr & 1); + + __raw_writesw(a, data, len); +} +EXPORT_SYMBOL(writesw); + +void writesl(void __iomem *addr, void *data, int len) +{ + void __iomem *a = __isamem_convert_addr(addr); + + BUG_ON((unsigned long)addr & 3); + + __raw_writesl(a, data, len); +} +EXPORT_SYMBOL(writesl); + #define SUPERIO_PORT(p) \ (((p) >> 3) == (0x3f8 >> 3) || \ ((p) >> 3) == (0x2f8 >> 3) || \ diff --git a/include/asm-arm/arch-ebsa110/io.h b/include/asm-arm/arch-ebsa110/io.h index 722c5e086285..44a4001de807 100644 --- a/include/asm-arm/arch-ebsa110/io.h +++ b/include/asm-arm/arch-ebsa110/io.h @@ -81,4 +81,12 @@ extern void outsb(unsigned int port, const void *buf, int sz); extern void outsw(unsigned int port, const void *buf, int sz); extern void outsl(unsigned int port, const void *buf, int sz); +/* can't support writesb atm */ +extern void writesw(void __iomem *addr, const void *data, int wordlen); +extern void writesl(void __iomem *addr, const void *data, int longlen); + +/* can't support readsb atm */ +extern void readsw(const void __iomem *addr, void *data, int wordlen); +extern void readsl(const void __iomem *addr, void *data, int longlen); + #endif -- cgit v1.2.3-59-g8ed1b From a79220b7633b3926a9bd3527bdac3f04dbe6845c Mon Sep 17 00:00:00 2001 From: Matej Kenda Date: Mon, 5 Mar 2007 13:06:40 +0100 Subject: [ARM] 4246/1: i2c-pxa: add adapter class to platform specific data Reposted patch for kernel 2.6.21-rc2. The driver i2c-pxa doesn't set the class member in i2c_adapter, which is used to register the I2C adapter. The hwmon (sensors) drivers (e.g. adm1021) that are connected to a i2c-pxa adapter don't attach because they expect that the adapter supports class I2C_CLASS_HWMON. This patch adds functionality to allow platforms to set the class and pass it as platform_data to the i2c-pxa driver. Sample usage in platform code: static struct i2c_pxa_platform_data my_i2c_platform_data = { .class = I2C_CLASS_HWMON }; static void __init my_platform_init(void) { (void) platform_add_devices(devices, ARRAY_SIZE(devices)); pxa_set_i2c_info(&my_i2c_platform_data); } Signed-off-by: Matej Kenda Signed-off-by: Russell King --- drivers/i2c/busses/i2c-pxa.c | 6 ++++-- include/asm-arm/arch-pxa/i2c.h | 1 + 2 files changed, 5 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/drivers/i2c/busses/i2c-pxa.c b/drivers/i2c/busses/i2c-pxa.c index 14e83d0aac8c..11c7477a0ffa 100644 --- a/drivers/i2c/busses/i2c-pxa.c +++ b/drivers/i2c/busses/i2c-pxa.c @@ -839,9 +839,7 @@ static int i2c_pxa_probe(struct platform_device *dev) { struct pxa_i2c *i2c = &i2c_pxa; struct resource *res; -#ifdef CONFIG_I2C_PXA_SLAVE struct i2c_pxa_platform_data *plat = dev->dev.platform_data; -#endif int ret; int irq; @@ -911,6 +909,10 @@ static int i2c_pxa_probe(struct platform_device *dev) i2c->adap.algo_data = i2c; i2c->adap.dev.parent = &dev->dev; + if (plat) { + i2c->adap.class = plat->class; + } + ret = i2c_add_adapter(&i2c->adap); if (ret < 0) { printk(KERN_INFO "I2C: Failed to add bus\n"); diff --git a/include/asm-arm/arch-pxa/i2c.h b/include/asm-arm/arch-pxa/i2c.h index 46ec2243974a..e404b233d8a8 100644 --- a/include/asm-arm/arch-pxa/i2c.h +++ b/include/asm-arm/arch-pxa/i2c.h @@ -64,6 +64,7 @@ struct i2c_slave_client; struct i2c_pxa_platform_data { unsigned int slave_addr; struct i2c_slave_client *slave; + unsigned int class; }; extern void pxa_set_i2c_info(struct i2c_pxa_platform_data *info); -- cgit v1.2.3-59-g8ed1b From fee64d1b55af57d7dba41f554769db83d7a32fde Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Wed, 28 Mar 2007 17:18:30 +0100 Subject: [ARM] 4292/1: ns9xxx: Make REGGET consistant with REGSET MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This implies that REGGET gets a new parameter "var" to allow to hold the actual register value in a variable. Moreover REGGET was broken because it used "field" instead of "reg ## _ ## field" which proves that there are no callers to fix :-) Signed-off-by: Uwe Kleine-König Signed-off-by: Russell King --- include/asm-arm/arch-ns9xxx/hardware.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/asm-arm/arch-ns9xxx/hardware.h b/include/asm-arm/arch-ns9xxx/hardware.h index 6819da7c48d4..25600554c4fe 100644 --- a/include/asm-arm/arch-ns9xxx/hardware.h +++ b/include/asm-arm/arch-ns9xxx/hardware.h @@ -51,8 +51,9 @@ ~(__REGVAL(reg ## _ ## field, value)))) \ | (__REGVAL(reg ## _ ## field, value)))) -# define REGGET(reg, field) \ - ((reg & (reg ## _ ## field)) / (field & (-field))) +# define REGGET(var, reg, field) \ + ((var & (reg ## _ ## field)) / \ + ((reg ## _ ## field) & (-(reg ## _ ## field)))) #else -- cgit v1.2.3-59-g8ed1b From 940089e007e8ed33295ef408b39a53e5ad518ebd Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Wed, 28 Mar 2007 17:54:22 +0100 Subject: [ARM] 4293/1: ns9xxx: Add bit fields FS and ND to the definition of SYS_PLL register MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Uwe Kleine-König Signed-off-by: Russell King --- include/asm-arm/arch-ns9xxx/regs-sys.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'include') diff --git a/include/asm-arm/arch-ns9xxx/regs-sys.h b/include/asm-arm/arch-ns9xxx/regs-sys.h index 8162a50bb273..a42546aeb92a 100644 --- a/include/asm-arm/arch-ns9xxx/regs-sys.h +++ b/include/asm-arm/arch-ns9xxx/regs-sys.h @@ -48,6 +48,12 @@ /* PLL Configuration register */ #define SYS_PLL __REG(0xa0900188) +/* PLL FS status */ +#define SYS_PLL_FS __REGBITS(24, 23) + +/* PLL ND status */ +#define SYS_PLL_ND __REGBITS(20, 16) + /* PLL Configuration register: PLL SW change */ #define SYS_PLL_SWC __REGBIT(15) #define SYS_PLL_SWC_NO __REGVAL(SYS_PLL_SWC, 0) -- cgit v1.2.3-59-g8ed1b From f86bd61fd70af02e666a893aaf22653181423e99 Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Wed, 28 Mar 2007 18:06:41 +0100 Subject: [ARM] 4294/1: ns9xxx: Determine system clock from PLL register settings MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The function attribute const is abused here as the PLL register is read. But I think this is all right because the PLL register cannot change without a reset. Note: This patch depends on 4293/1 Signed-off-by: Uwe Kleine-König Signed-off-by: Russell King --- include/asm-arm/arch-ns9xxx/clock.h | 34 ++++++++++++++++++++++++++++++++-- 1 file changed, 32 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/asm-arm/arch-ns9xxx/clock.h b/include/asm-arm/arch-ns9xxx/clock.h index a7c5ab3d9011..bf30cbdcc2bf 100644 --- a/include/asm-arm/arch-ns9xxx/clock.h +++ b/include/asm-arm/arch-ns9xxx/clock.h @@ -11,13 +11,43 @@ #ifndef __ASM_ARCH_CLOCK_H #define __ASM_ARCH_CLOCK_H +#include + +#define CRYSTAL 29491200 /* Hz */ + +/* The HRM calls this value f_vco */ static inline u32 ns9xxx_systemclock(void) __attribute__((const)); static inline u32 ns9xxx_systemclock(void) { + u32 pll = SYS_PLL; + /* - * This should be a multiple of HZ * TIMERCLOCKSELECT (in time.c) + * The system clock should be a multiple of HZ * TIMERCLOCKSELECT (in + * time.c). + * + * The following values are given: + * - TIMERCLOCKSELECT == 2^i for an i in {0 .. 6} + * - CRYSTAL == 29491200 == 2^17 * 3^2 * 5^2 + * - ND in {0 .. 31} + * - FS in {0 .. 3} + * + * Assuming the worst, we consider: + * - TIMERCLOCKSELECT == 64 + * - ND == 0 + * - FS == 3 + * + * So HZ should be a divisor of: + * (CRYSTAL * (ND + 1) >> FS) / TIMERCLOCKSELECT + * == (2^17 * 3^2 * 5^2 * 1 >> 3) / 64 + * == 2^8 * 3^2 * 5^2 + * == 57600 + * + * Currently HZ is defined to be 100 for this platform. + * + * Fine. */ - return 353894400; + return CRYSTAL * (REGGET(pll, SYS_PLL, ND) + 1) + >> REGGET(pll, SYS_PLL, FS); } static inline u32 ns9xxx_cpuclock(void) __attribute__((const)); -- cgit v1.2.3-59-g8ed1b From 25735d10ba477d5128b1e5ccef42062bea429075 Mon Sep 17 00:00:00 2001 From: Milan Svoboda Date: Wed, 21 Mar 2007 14:04:08 +0100 Subject: [ARM] 4275/1: generic gpio layer for ixp4xx This patch brings generic gpio layer support to ixp4xx. It creates functions needed for gpio->irq and irq->gpio translation. It expects and initial value to be passed to gpio_direction_output() which has been introduced by commit 28735a7253a6c24364765e80a5428b4a151fccc2 in Linus git tree. Generic gpio layer is going to be used by pxa2xx_udc driver. Signed-off-by: Milan Svoboda Signed-off-by: Russell King --- arch/arm/mach-ixp4xx/common.c | 23 ++++++++++++ include/asm-arm/arch-ixp4xx/gpio.h | 73 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 96 insertions(+) create mode 100644 include/asm-arm/arch-ixp4xx/gpio.h (limited to 'include') diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c index 45068c3d8dcc..39f2eeb219b4 100644 --- a/arch/arm/mach-ixp4xx/common.c +++ b/arch/arm/mach-ixp4xx/common.c @@ -102,6 +102,29 @@ static signed char irq2gpio[32] = { 7, 8, 9, 10, 11, 12, -1, -1, }; +int gpio_to_irq(int gpio) +{ + int irq; + + for (irq = 0; irq < 32; irq++) { + if (irq2gpio[irq] == gpio) + return irq; + } + return -EINVAL; +} +EXPORT_SYMBOL(gpio_to_irq); + +int irq_to_gpio(int irq) +{ + int gpio = (irq < 32) ? irq2gpio[irq] : -EINVAL; + + if (gpio == -1) + return -EINVAL; + + return gpio; +} +EXPORT_SYMBOL(irq_to_gpio); + static int ixp4xx_set_irq_type(unsigned int irq, unsigned int type) { int line = irq2gpio[irq]; diff --git a/include/asm-arm/arch-ixp4xx/gpio.h b/include/asm-arm/arch-ixp4xx/gpio.h new file mode 100644 index 000000000000..3a4c5b8ae9e1 --- /dev/null +++ b/include/asm-arm/arch-ixp4xx/gpio.h @@ -0,0 +1,73 @@ +/* + * linux/include/asm-arm/arch-ixp4xx/gpio.h + * + * IXP4XX GPIO wrappers for arch-neutral GPIO calls + * + * Written by Milan Svoboda + * Based on PXA implementation by Philipp Zabel + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + +#ifndef __ASM_ARCH_IXP4XX_GPIO_H +#define __ASM_ARCH_IXP4XX_GPIO_H + +#include + +static inline int gpio_request(unsigned gpio, const char *label) +{ + return 0; +} + +static inline void gpio_free(unsigned gpio) +{ + return; +} + +static inline int gpio_direction_input(unsigned gpio) +{ + gpio_line_config(gpio, IXP4XX_GPIO_IN); + return 0; +} + +static inline int gpio_direction_output(unsigned gpio, int level) +{ + gpio_line_set(gpio, level); + gpio_line_config(gpio, IXP4XX_GPIO_OUT); + return 0; +} + +static inline int gpio_get_value(unsigned gpio) +{ + int value; + + gpio_line_get(gpio, &value); + + return value; +} + +static inline void gpio_set_value(unsigned gpio, int value) +{ + gpio_line_set(gpio, value); +} + +#include /* cansleep wrappers */ + +extern int gpio_to_irq(int gpio); +extern int irq_to_gpio(int gpio); + +#endif + -- cgit v1.2.3-59-g8ed1b From 45fba0846f5a5a48ed3c394aa4f8ca93699e7655 Mon Sep 17 00:00:00 2001 From: "Ruslan V. Sushko" Date: Fri, 6 Apr 2007 15:00:31 +0100 Subject: [ARM] 4311/1: ixp4xx: add KIXRP435 platform Add Intel KIXRP435 Reference Platform based on IXP43x processor. Fixed after review : access to cp15 removed in identification functions, used access to global processor_id instead Signed-off-by: Vladimir Barinov Signed-off-by: Ruslan Sushko Signed-off-by: Russell King --- arch/arm/configs/ixp4xx_defconfig | 2 ++ arch/arm/mach-ixp4xx/Kconfig | 13 ++++++++++- arch/arm/mach-ixp4xx/common-pci.c | 4 ++-- arch/arm/mach-ixp4xx/common.c | 6 +++--- arch/arm/mach-ixp4xx/ixdp425-pci.c | 2 +- arch/arm/mach-ixp4xx/ixdp425-setup.c | 18 ++++++++++++++++ arch/arm/mm/proc-xscale.S | 28 ++++++++++++++++++++++++ include/asm-arm/arch-ixp4xx/entry-macro.S | 4 ++-- include/asm-arm/arch-ixp4xx/hardware.h | 4 ++-- include/asm-arm/arch-ixp4xx/io.h | 2 +- include/asm-arm/arch-ixp4xx/irqs.h | 6 +++--- include/asm-arm/arch-ixp4xx/ixp4xx-regs.h | 36 +++++++++++++++++++++++++++---- 12 files changed, 106 insertions(+), 19 deletions(-) (limited to 'include') diff --git a/arch/arm/configs/ixp4xx_defconfig b/arch/arm/configs/ixp4xx_defconfig index fabf74c51a88..db850a5689eb 100644 --- a/arch/arm/configs/ixp4xx_defconfig +++ b/arch/arm/configs/ixp4xx_defconfig @@ -117,11 +117,13 @@ CONFIG_ARCH_ADI_COYOTE=y CONFIG_ARCH_IXDP425=y CONFIG_MACH_IXDPG425=y CONFIG_MACH_IXDP465=y +CONFIG_MACH_KIXRP435=y CONFIG_ARCH_IXCDP1100=y CONFIG_ARCH_PRPMC1100=y CONFIG_MACH_NAS100D=y CONFIG_ARCH_IXDP4XX=y CONFIG_CPU_IXP46X=y +CONFIG_CPU_IXP43X=y # CONFIG_MACH_GTWX5715 is not set # diff --git a/arch/arm/mach-ixp4xx/Kconfig b/arch/arm/mach-ixp4xx/Kconfig index 8a339cdfe222..dd0fb7239a80 100644 --- a/arch/arm/mach-ixp4xx/Kconfig +++ b/arch/arm/mach-ixp4xx/Kconfig @@ -62,6 +62,12 @@ config MACH_IXDP465 IXDP465 Development Platform (Also known as BMP). For more information on this platform, see . +config MACH_KIXRP435 + bool "KIXRP435" + help + Say 'Y' here if you want your kernel to support Intel's + KIXRP435 Reference Platform. + For more information on this platform, see . # # IXCDP1100 is the exact same HW as IXDP425, but with a different machine @@ -94,7 +100,7 @@ config MACH_NAS100D # config ARCH_IXDP4XX bool - depends on ARCH_IXDP425 || MACH_IXDP465 + depends on ARCH_IXDP425 || MACH_IXDP465 || MACH_KIXRP435 default y # @@ -105,6 +111,11 @@ config CPU_IXP46X depends on MACH_IXDP465 default y +config CPU_IXP43X + bool + depends on MACH_KIXRP435 + default y + config MACH_GTWX5715 bool "Gemtek WX5715 (Linksys WRV54G)" depends on ARCH_IXP4XX diff --git a/arch/arm/mach-ixp4xx/common-pci.c b/arch/arm/mach-ixp4xx/common-pci.c index 9562177b5fe1..bf04121d1a31 100644 --- a/arch/arm/mach-ixp4xx/common-pci.c +++ b/arch/arm/mach-ixp4xx/common-pci.c @@ -374,7 +374,7 @@ void __init ixp4xx_pci_preinit(void) * Determine which PCI read method to use. * Rev 0 IXP425 requires workaround. */ - if (!(processor_id & 0xf) && !cpu_is_ixp46x()) { + if (!(processor_id & 0xf) && cpu_is_ixp42x()) { printk("PCI: IXP42x A0 silicon detected - " "PCI Non-Prefetch Workaround Enabled\n"); ixp4xx_pci_read = ixp4xx_pci_read_errata; @@ -480,7 +480,7 @@ int ixp4xx_setup(int nr, struct pci_sys_data *sys) res[0].flags = IORESOURCE_IO; res[1].name = "PCI Memory Space"; - res[1].start = 0x48000000; + res[1].start = PCIBIOS_MIN_MEM; #ifndef CONFIG_IXP4XX_INDIRECT_PCI res[1].end = 0x4bffffff; #else diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c index 39f2eeb219b4..030dd75d053a 100644 --- a/arch/arm/mach-ixp4xx/common.c +++ b/arch/arm/mach-ixp4xx/common.c @@ -192,7 +192,7 @@ static int ixp4xx_set_irq_type(unsigned int irq, unsigned int type) static void ixp4xx_irq_mask(unsigned int irq) { - if (cpu_is_ixp46x() && irq >= 32) + if ((cpu_is_ixp46x() || cpu_is_ixp43x()) && irq >= 32) *IXP4XX_ICMR2 &= ~(1 << (irq - 32)); else *IXP4XX_ICMR &= ~(1 << irq); @@ -215,7 +215,7 @@ static void ixp4xx_irq_unmask(unsigned int irq) if (!(ixp4xx_irq_edge & (1 << irq))) ixp4xx_irq_ack(irq); - if (cpu_is_ixp46x() && irq >= 32) + if ((cpu_is_ixp46x() || cpu_is_ixp43x()) && irq >= 32) *IXP4XX_ICMR2 |= (1 << (irq - 32)); else *IXP4XX_ICMR |= (1 << irq); @@ -239,7 +239,7 @@ void __init ixp4xx_init_irq(void) /* Disable all interrupt */ *IXP4XX_ICMR = 0x0; - if (cpu_is_ixp46x()) { + if (cpu_is_ixp46x() || cpu_is_ixp43x()) { /* Route upper 32 sources to IRQ instead of FIQ */ *IXP4XX_ICLR2 = 0x00; diff --git a/arch/arm/mach-ixp4xx/ixdp425-pci.c b/arch/arm/mach-ixp4xx/ixdp425-pci.c index 99c1dc8033c8..408796004812 100644 --- a/arch/arm/mach-ixp4xx/ixdp425-pci.c +++ b/arch/arm/mach-ixp4xx/ixdp425-pci.c @@ -66,7 +66,7 @@ struct hw_pci ixdp425_pci __initdata = { int __init ixdp425_pci_init(void) { if (machine_is_ixdp425() || machine_is_ixcdp1100() || - machine_is_ixdp465()) + machine_is_ixdp465() || machine_is_kixrp435()) pci_common_init(&ixdp425_pci); return 0; } diff --git a/arch/arm/mach-ixp4xx/ixdp425-setup.c b/arch/arm/mach-ixp4xx/ixdp425-setup.c index 04b1d56396a0..ec4f07950ec6 100644 --- a/arch/arm/mach-ixp4xx/ixdp425-setup.c +++ b/arch/arm/mach-ixp4xx/ixdp425-setup.c @@ -115,6 +115,11 @@ static void __init ixdp425_init(void) ixdp425_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1; + if (cpu_is_ixp43x()) { + ixdp425_uart.num_resources = 1; + ixdp425_uart_data[1].flags = 0; + } + platform_add_devices(ixdp425_devices, ARRAY_SIZE(ixdp425_devices)); } @@ -156,3 +161,16 @@ MACHINE_START(IXCDP1100, "Intel IXCDP1100 Development Platform") .init_machine = ixdp425_init, MACHINE_END #endif + +#ifdef CONFIG_MACH_KIXRP435 +MACHINE_START(KIXRP435, "Intel KIXRP435 Reference Platform") + /* Maintainer: MontaVista Software, Inc. */ + .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS, + .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc, + .map_io = ixp4xx_map_io, + .init_irq = ixp4xx_init_irq, + .timer = &ixp4xx_timer, + .boot_params = 0x0100, + .init_machine = ixdp425_init, +MACHINE_END +#endif diff --git a/arch/arm/mm/proc-xscale.S b/arch/arm/mm/proc-xscale.S index d29fe927ee9e..c156ddab9a2d 100644 --- a/arch/arm/mm/proc-xscale.S +++ b/arch/arm/mm/proc-xscale.S @@ -584,6 +584,11 @@ cpu_ixp42x_name: .asciz "XScale-IXP42x Family" .size cpu_ixp42x_name, . - cpu_ixp42x_name + .type cpu_ixp43x_name, #object +cpu_ixp43x_name: + .asciz "XScale-IXP43x Family" + .size cpu_ixp43x_name, . - cpu_ixp43x_name + .type cpu_ixp46x_name, #object cpu_ixp46x_name: .asciz "XScale-IXP46x Family" @@ -843,6 +848,29 @@ __ixp42x_proc_info: .long xscale_cache_fns .size __ixp42x_proc_info, . - __ixp42x_proc_info + .type __ixp43x_proc_info, #object +__ixp43x_proc_info: + .long 0x69054040 + .long 0xfffffff0 + .long PMD_TYPE_SECT | \ + PMD_SECT_BUFFERABLE | \ + PMD_SECT_CACHEABLE | \ + PMD_SECT_AP_WRITE | \ + PMD_SECT_AP_READ + .long PMD_TYPE_SECT | \ + PMD_SECT_AP_WRITE | \ + PMD_SECT_AP_READ + b __xscale_setup + .long cpu_arch_name + .long cpu_elf_name + .long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP + .long cpu_ixp43x_name + .long xscale_processor_functions + .long v4wbi_tlb_fns + .long xscale_mc_user_fns + .long xscale_cache_fns + .size __ixp43x_proc_info, . - __ixp43x_proc_info + .type __ixp46x_proc_info, #object __ixp46x_proc_info: .long 0x69054200 diff --git a/include/asm-arm/arch-ixp4xx/entry-macro.S b/include/asm-arm/arch-ixp4xx/entry-macro.S index dadb568b7ef0..f144a005ed95 100644 --- a/include/asm-arm/arch-ixp4xx/entry-macro.S +++ b/include/asm-arm/arch-ixp4xx/entry-macro.S @@ -31,9 +31,9 @@ 1001: /* - * IXP465 has an upper IRQ status register + * IXP465/IXP435 has an upper IRQ status register */ -#if defined(CONFIG_CPU_IXP46X) +#if defined(CONFIG_CPU_IXP46X) || defined(CONFIG_CPU_IXP43X) ldr \irqstat, =(IXP4XX_INTC_BASE_VIRT+IXP4XX_ICIP2_OFFSET) ldr \irqstat, [\irqstat] @ get upper interrupts mov \irqnr, #63 diff --git a/include/asm-arm/arch-ixp4xx/hardware.h b/include/asm-arm/arch-ixp4xx/hardware.h index 88fd0877dcc1..24bc5883fa56 100644 --- a/include/asm-arm/arch-ixp4xx/hardware.h +++ b/include/asm-arm/arch-ixp4xx/hardware.h @@ -17,8 +17,8 @@ #ifndef __ASM_ARCH_HARDWARE_H__ #define __ASM_ARCH_HARDWARE_H__ -#define PCIBIOS_MIN_IO 0x00001000 -#define PCIBIOS_MIN_MEM 0x48000000 +#define PCIBIOS_MIN_IO 0x00001000 +#define PCIBIOS_MIN_MEM (cpu_is_ixp43x() ? 0x40000000 : 0x48000000) /* * We override the standard dma-mask routines for bouncing. diff --git a/include/asm-arm/arch-ixp4xx/io.h b/include/asm-arm/arch-ixp4xx/io.h index a41ba229c564..b8b3cbcd2d3a 100644 --- a/include/asm-arm/arch-ixp4xx/io.h +++ b/include/asm-arm/arch-ixp4xx/io.h @@ -61,7 +61,7 @@ extern int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data); static inline void __iomem * __ixp4xx_ioremap(unsigned long addr, size_t size, unsigned long flags) { - if((addr < 0x48000000) || (addr > 0x4fffffff)) + if((addr < PCIBIOS_MIN_MEM) || (addr > 0x4fffffff)) return __ioremap(addr, size, flags); return (void *)addr; diff --git a/include/asm-arm/arch-ixp4xx/irqs.h b/include/asm-arm/arch-ixp4xx/irqs.h index e44a563d00ff..73a9aa583745 100644 --- a/include/asm-arm/arch-ixp4xx/irqs.h +++ b/include/asm-arm/arch-ixp4xx/irqs.h @@ -62,10 +62,10 @@ /* * Only first 32 sources are valid if running on IXP42x systems */ -#ifndef CONFIG_CPU_IXP46X -#define NR_IRQS 32 -#else +#if defined(CONFIG_CPU_IXP46X) || defined(CONFIG_CPU_IXP43X) #define NR_IRQS 64 +#else +#define NR_IRQS 32 #endif #define XSCALE_PMU_IRQ (IRQ_IXP4XX_XSCALE_PMU) diff --git a/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h b/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h index ed35e5c94f40..deb989950c52 100644 --- a/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h +++ b/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h @@ -607,15 +607,43 @@ #define DCMD_LENGTH 0x01fff /* length mask (max = 8K - 1) */ +/* Processor id value in CP15 Register 0 */ +#define IXP425_PROCESSOR_ID_VALUE 0x690541c0 +#define IXP435_PROCESSOR_ID_VALUE 0x69054040 +#define IXP465_PROCESSOR_ID_VALUE 0x69054200 +#define IXP4XX_PROCESSOR_ID_MASK 0xfffffff0 + #ifndef __ASSEMBLY__ +static inline int cpu_is_ixp42x(void) +{ + extern unsigned int processor_id; + + if ((processor_id & IXP4XX_PROCESSOR_ID_MASK) == + IXP425_PROCESSOR_ID_VALUE ) + return 1; + + return 0; +} + +static inline int cpu_is_ixp43x(void) +{ +#ifdef CONFIG_CPU_IXP43X + extern unsigned int processor_id; + + if ((processor_id & IXP4XX_PROCESSOR_ID_MASK) == + IXP435_PROCESSOR_ID_VALUE ) + return 1; +#endif + return 0; +} + static inline int cpu_is_ixp46x(void) { #ifdef CONFIG_CPU_IXP46X - unsigned int processor_id; - - asm("mrc p15, 0, %0, cr0, cr0, 0;" : "=r"(processor_id) :); + extern unsigned int processor_id; - if ((processor_id & 0xffffff00) == 0x69054200) + if ((processor_id & IXP4XX_PROCESSOR_ID_MASK) == + IXP465_PROCESSOR_ID_VALUE ) return 1; #endif return 0; -- cgit v1.2.3-59-g8ed1b From 53b2e01be55f3c140e2704cf8d5f99ddba0ff823 Mon Sep 17 00:00:00 2001 From: Vladimir Barinov Date: Wed, 11 Apr 2007 16:32:46 +0100 Subject: [ARM] 4320/1: ixp4xx: cpu type detection stuff cleanup Move IXP4XX cpu detection stuff in a separate include file and remove unused definition. Signed-off-by: Vladimir Barinov Signed-off-by: Ruslan Sushko Signed-off-by: Deepak Saxena Signed-off-by: Russell King --- include/asm-arm/arch-ixp4xx/cpu.h | 31 ++++++++++++++++++++++ include/asm-arm/arch-ixp4xx/hardware.h | 7 ++--- include/asm-arm/arch-ixp4xx/ixp4xx-regs.h | 43 ------------------------------- 3 files changed, 33 insertions(+), 48 deletions(-) create mode 100644 include/asm-arm/arch-ixp4xx/cpu.h (limited to 'include') diff --git a/include/asm-arm/arch-ixp4xx/cpu.h b/include/asm-arm/arch-ixp4xx/cpu.h new file mode 100644 index 000000000000..d2523b326c6c --- /dev/null +++ b/include/asm-arm/arch-ixp4xx/cpu.h @@ -0,0 +1,31 @@ +/* + * include/asm-arm/arch-ixp4xx/cpu.h + * + * IXP4XX cpu type detection + * + * Copyright (C) 2007 MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#ifndef __ASM_ARCH_CPU_H__ +#define __ASM_ARCH_CPU_H__ + +extern unsigned int processor_id; +/* Processor id value in CP15 Register 0 */ +#define IXP425_PROCESSOR_ID_VALUE 0x690541c0 +#define IXP435_PROCESSOR_ID_VALUE 0x69054040 +#define IXP465_PROCESSOR_ID_VALUE 0x69054200 +#define IXP4XX_PROCESSOR_ID_MASK 0xfffffff0 + +#define cpu_is_ixp42x() ((processor_id & IXP4XX_PROCESSOR_ID_MASK) == \ + IXP425_PROCESSOR_ID_VALUE) +#define cpu_is_ixp43x() ((processor_id & IXP4XX_PROCESSOR_ID_MASK) == \ + IXP435_PROCESSOR_ID_VALUE) +#define cpu_is_ixp46x() ((processor_id & IXP4XX_PROCESSOR_ID_MASK) == \ + IXP465_PROCESSOR_ID_VALUE) + +#endif /* _ASM_ARCH_CPU_H */ diff --git a/include/asm-arm/arch-ixp4xx/hardware.h b/include/asm-arm/arch-ixp4xx/hardware.h index 24bc5883fa56..a0acde3b8862 100644 --- a/include/asm-arm/arch-ixp4xx/hardware.h +++ b/include/asm-arm/arch-ixp4xx/hardware.h @@ -27,11 +27,8 @@ #define pcibios_assign_all_busses() 1 -#if defined(CONFIG_CPU_IXP46X) && !defined(__ASSEMBLY__) -extern unsigned int processor_id; -#define cpu_is_ixp465() ((processor_id & 0xffffffc0) == 0x69054200) -#else -#define cpu_is_ixp465() (0) +#ifndef __ASSEMBLER__ +#include #endif /* Register locations and bits */ diff --git a/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h b/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h index deb989950c52..5d949d763a91 100644 --- a/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h +++ b/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h @@ -607,47 +607,4 @@ #define DCMD_LENGTH 0x01fff /* length mask (max = 8K - 1) */ -/* Processor id value in CP15 Register 0 */ -#define IXP425_PROCESSOR_ID_VALUE 0x690541c0 -#define IXP435_PROCESSOR_ID_VALUE 0x69054040 -#define IXP465_PROCESSOR_ID_VALUE 0x69054200 -#define IXP4XX_PROCESSOR_ID_MASK 0xfffffff0 - -#ifndef __ASSEMBLY__ -static inline int cpu_is_ixp42x(void) -{ - extern unsigned int processor_id; - - if ((processor_id & IXP4XX_PROCESSOR_ID_MASK) == - IXP425_PROCESSOR_ID_VALUE ) - return 1; - - return 0; -} - -static inline int cpu_is_ixp43x(void) -{ -#ifdef CONFIG_CPU_IXP43X - extern unsigned int processor_id; - - if ((processor_id & IXP4XX_PROCESSOR_ID_MASK) == - IXP435_PROCESSOR_ID_VALUE ) - return 1; -#endif - return 0; -} - -static inline int cpu_is_ixp46x(void) -{ -#ifdef CONFIG_CPU_IXP46X - extern unsigned int processor_id; - - if ((processor_id & IXP4XX_PROCESSOR_ID_MASK) == - IXP465_PROCESSOR_ID_VALUE ) - return 1; -#endif - return 0; -} -#endif - #endif -- cgit v1.2.3-59-g8ed1b From 13ea55b04eaafb60cd7df759c8d92566d1f19351 Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Mon, 2 Apr 2007 21:09:31 +0100 Subject: [ARM] 4301/1: add mach type cc9p9360js MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The support for that machine is not yet complete, but it's enough to be useful as a test platform for the serial and ethernet driver. Moreover a typo in the product name is fixed that I missed in the last patch. Signed-off-by: Uwe Kleine-König Signed-off-by: Russell King --- arch/arm/mach-ns9xxx/Kconfig | 15 +++++++++++++-- arch/arm/mach-ns9xxx/Makefile | 1 + arch/arm/mach-ns9xxx/board-jscc9p9360.c | 17 +++++++++++++++++ arch/arm/mach-ns9xxx/board-jscc9p9360.h | 13 +++++++++++++ arch/arm/mach-ns9xxx/mach-cc9p9360js.c | 29 +++++++++++++++++++++++++++++ include/asm-arm/arch-ns9xxx/board.h | 2 ++ include/asm-arm/arch-ns9xxx/processor.h | 3 ++- 7 files changed, 77 insertions(+), 3 deletions(-) create mode 100644 arch/arm/mach-ns9xxx/board-jscc9p9360.c create mode 100644 arch/arm/mach-ns9xxx/board-jscc9p9360.h create mode 100644 arch/arm/mach-ns9xxx/mach-cc9p9360js.c (limited to 'include') diff --git a/arch/arm/mach-ns9xxx/Kconfig b/arch/arm/mach-ns9xxx/Kconfig index 8175ba92a2fa..8584ed107991 100644 --- a/arch/arm/mach-ns9xxx/Kconfig +++ b/arch/arm/mach-ns9xxx/Kconfig @@ -3,19 +3,30 @@ if ARCH_NS9XXX menu "NS9xxx Implementations" config MACH_CC9P9360DEV - bool "Connect Core 9P 9360 on an A9M9750 Devboard" + bool "ConnectCore 9P 9360 on an A9M9750 Devboard" select PROCESSOR_NS9360 select BOARD_A9M9750DEV help - Say Y here if you are using the Digi Connect Core 9P 9360 + Say Y here if you are using the Digi ConnectCore 9P 9360 on an A9M9750 Development Board. +config MACH_CC9P9360JS + bool "ConnectCore 9P 9360 on a JSCC9P9360 Devboard" + select PROCESSOR_NS9360 + select BOARD_JSCC9P9360 + help + Say Y here if you are using the Digi ConnectCore 9P 9360 + on an JSCC9P9360 Development Board. + config PROCESSOR_NS9360 bool config BOARD_A9M9750DEV bool +config BOARD_JSCC9P9360 + bool + endmenu endif diff --git a/arch/arm/mach-ns9xxx/Makefile b/arch/arm/mach-ns9xxx/Makefile index 91e945f5e16d..53213a69f601 100644 --- a/arch/arm/mach-ns9xxx/Makefile +++ b/arch/arm/mach-ns9xxx/Makefile @@ -3,3 +3,4 @@ obj-y := irq.o time.o generic.o obj-$(CONFIG_MACH_CC9P9360DEV) += mach-cc9p9360dev.o obj-$(CONFIG_BOARD_A9M9750DEV) += board-a9m9750dev.o +obj-$(CONFIG_BOARD_JSCC9P9360) += board-jscc9p9360.o diff --git a/arch/arm/mach-ns9xxx/board-jscc9p9360.c b/arch/arm/mach-ns9xxx/board-jscc9p9360.c new file mode 100644 index 000000000000..4bd3eec04bfe --- /dev/null +++ b/arch/arm/mach-ns9xxx/board-jscc9p9360.c @@ -0,0 +1,17 @@ +/* + * arch/arm/mach-ns9xxx/board-jscc9p9360.c + * + * Copyright (C) 2006,2007 by Digi International Inc. + * All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published by + * the Free Software Foundation. + */ +#include "board-jscc9p9360.h" + +void __init board_jscc9p9360_init_machine(void) +{ + /* TODO: reserve GPIOs for push buttons, etc pp */ +} + diff --git a/arch/arm/mach-ns9xxx/board-jscc9p9360.h b/arch/arm/mach-ns9xxx/board-jscc9p9360.h new file mode 100644 index 000000000000..1a81a074df45 --- /dev/null +++ b/arch/arm/mach-ns9xxx/board-jscc9p9360.h @@ -0,0 +1,13 @@ +/* + * arch/arm/mach-ns9xxx/board-jscc9p9360.h + * + * Copyright (C) 2006 by Digi International Inc. + * All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published by + * the Free Software Foundation. + */ +#include + +void __init board_jscc9p9360_init_machine(void); diff --git a/arch/arm/mach-ns9xxx/mach-cc9p9360js.c b/arch/arm/mach-ns9xxx/mach-cc9p9360js.c new file mode 100644 index 000000000000..d09d5fa5620a --- /dev/null +++ b/arch/arm/mach-ns9xxx/mach-cc9p9360js.c @@ -0,0 +1,29 @@ +/* + * arch/arm/mach-ns9xxx/mach-cc9p9360js.c + * + * Copyright (C) 2006 by Digi International Inc. + * All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published by + * the Free Software Foundation. + */ +#include +#include + +#include "board-jscc9p9360.h" +#include "generic.h" + +static void __init mach_cc9p9360js_init_machine(void) +{ + ns9xxx_init_machine(); + board_jscc9p9360_init_machine(); +} + +MACHINE_START(CC9P9360DEV, "Digi ConnectCore 9P 9360 on an JSCC9P9360 Devboard") + .map_io = ns9xxx_map_io, + .init_irq = ns9xxx_init_irq, + .init_machine = mach_cc9p9360js_init_machine, + .timer = &ns9xxx_timer, + .boot_params = 0x100, +MACHINE_END diff --git a/include/asm-arm/arch-ns9xxx/board.h b/include/asm-arm/arch-ns9xxx/board.h index 91dc8fb1027f..716f34fdb716 100644 --- a/include/asm-arm/arch-ns9xxx/board.h +++ b/include/asm-arm/arch-ns9xxx/board.h @@ -15,4 +15,6 @@ #define board_is_a9m9750dev() (machine_is_cc9p9360dev()) +#define board_is_jscc9p9360() (machine_is_cc9p9360js()) + #endif /* ifndef __ASM_ARCH_BOARD_H */ diff --git a/include/asm-arm/arch-ns9xxx/processor.h b/include/asm-arm/arch-ns9xxx/processor.h index 716c106ac0bf..223e51b8e104 100644 --- a/include/asm-arm/arch-ns9xxx/processor.h +++ b/include/asm-arm/arch-ns9xxx/processor.h @@ -13,6 +13,7 @@ #include -#define processor_is_ns9360() (machine_is_cc9p9360dev()) +#define processor_is_ns9360() (machine_is_cc9p9360dev() \ + || machine_is_cc9p9360js()) #endif /* ifndef __ASM_ARCH_PROCESSOR_H */ -- cgit v1.2.3-59-g8ed1b From ef08574729bcf65bbd1f0c9ad9b9baa9bbd7a830 Mon Sep 17 00:00:00 2001 From: Graeme Gregory Date: Mon, 2 Apr 2007 12:00:33 +0100 Subject: [ARM] 4299/1: S3C AC97 fill in register bit defines Create defines in the same styles as other s3c include files giving names to bits in registers within the AC97 IO unit. Signed-off-by: Graeme Gregory Signed-off-by: Ben Dooks Signed-off-by: Russell King --- include/asm-arm/arch-s3c2410/regs-ac97.h | 56 ++++++++++++++++++++++++++++---- 1 file changed, 50 insertions(+), 6 deletions(-) (limited to 'include') diff --git a/include/asm-arm/arch-s3c2410/regs-ac97.h b/include/asm-arm/arch-s3c2410/regs-ac97.h index bdd6a4f93d7f..b004dee6bcaf 100644 --- a/include/asm-arm/arch-s3c2410/regs-ac97.h +++ b/include/asm-arm/arch-s3c2410/regs-ac97.h @@ -13,11 +13,55 @@ #ifndef __ASM_ARCH_REGS_AC97_H #define __ASM_ARCH_REGS_AC97_H __FILE__ -#define S3C_AC97_GLBCTRL (0x00) -#define S3C_AC97_GLBSTAT (0x04) -#define S3C_AC97_CODEC_CMD (0x08) -#define S3C_AC97_PCM_ADDR (0x10) -#define S3C_AC97_PCM_DATA (0x18) -#define S3C_AC97_MIC_DATA (0x1C) +#define S3C_AC97_GLBCTRL (0x00) + +#define S3C_AC97_GLBCTRL_CODECREADYIE (1<<22) +#define S3C_AC97_GLBCTRL_PCMOUTURIE (1<<21) +#define S3C_AC97_GLBCTRL_PCMINORIE (1<<20) +#define S3C_AC97_GLBCTRL_MICINORIE (1<<19) +#define S3C_AC97_GLBCTRL_PCMOUTTIE (1<<18) +#define S3C_AC97_GLBCTRL_PCMINTIE (1<<17) +#define S3C_AC97_GLBCTRL_MICINTIE (1<<16) +#define S3C_AC97_GLBCTRL_PCMOUTTM_OFF (0<<12) +#define S3C_AC97_GLBCTRL_PCMOUTTM_PIO (1<<12) +#define S3C_AC97_GLBCTRL_PCMOUTTM_DMA (2<<12) +#define S3C_AC97_GLBCTRL_PCMOUTTM_MASK (3<<12) +#define S3C_AC97_GLBCTRL_PCMINTM_OFF (0<<10) +#define S3C_AC97_GLBCTRL_PCMINTM_PIO (1<<10) +#define S3C_AC97_GLBCTRL_PCMINTM_DMA (2<<10) +#define S3C_AC97_GLBCTRL_PCMINTM_MASK (3<<10) +#define S3C_AC97_GLBCTRL_MICINTM_OFF (0<<8) +#define S3C_AC97_GLBCTRL_MICINTM_PIO (1<<8) +#define S3C_AC97_GLBCTRL_MICINTM_DMA (2<<8) +#define S3C_AC97_GLBCTRL_MICINTM_MASK (3<<8) +#define S3C_AC97_GLBCTRL_TRANSFERDATAENABLE (1<<3) +#define S3C_AC97_GLBCTRL_ACLINKON (1<<2) +#define S3C_AC97_GLBCTRL_WARMRESET (1<<1) +#define S3C_AC97_GLBCTRL_COLDRESET (1<<0) + +#define S3C_AC97_GLBSTAT (0x04) + +#define S3C_AC97_GLBSTAT_CODECREADY (1<<22) +#define S3C_AC97_GLBSTAT_PCMOUTUR (1<<21) +#define S3C_AC97_GLBSTAT_PCMINORI (1<<20) +#define S3C_AC97_GLBSTAT_MICINORI (1<<19) +#define S3C_AC97_GLBSTAT_PCMOUTTI (1<<18) +#define S3C_AC97_GLBSTAT_PCMINTI (1<<17) +#define S3C_AC97_GLBSTAT_MICINTI (1<<16) +#define S3C_AC97_GLBSTAT_MAINSTATE_IDLE (0<<0) +#define S3C_AC97_GLBSTAT_MAINSTATE_INIT (1<<0) +#define S3C_AC97_GLBSTAT_MAINSTATE_READY (2<<0) +#define S3C_AC97_GLBSTAT_MAINSTATE_ACTIVE (3<<0) +#define S3C_AC97_GLBSTAT_MAINSTATE_LP (4<<0) +#define S3C_AC97_GLBSTAT_MAINSTATE_WARM (5<<0) + +#define S3C_AC97_CODEC_CMD (0x08) + +#define S3C_AC97_CODEC_CMD_READ (1<<23) + +#define S3C_AC97_STAT (0x0c) +#define S3C_AC97_PCM_ADDR (0x10) +#define S3C_AC97_PCM_DATA (0x18) +#define S3C_AC97_MIC_DATA (0x1C) #endif /* __ASM_ARCH_REGS_AC97_H */ -- cgit v1.2.3-59-g8ed1b From ce89c206ac03dfec700cfa538dcbcc347c0683ce Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Fri, 20 Apr 2007 11:15:27 +0100 Subject: [ARM] 4324/1: S3C24XX: remove clocks from s3c24xx_board Remove the clocks from the s3c24xx_board as part of the process of simplifying the initialisation sequence by removing struct s3c24xx_board. Signed-off-by: Ben Dooks Signed-off-by: Russell King --- arch/arm/mach-s3c2410/mach-bast.c | 4 ++-- arch/arm/mach-s3c2410/mach-vr1000.c | 4 ++-- arch/arm/mach-s3c2440/mach-anubis.c | 4 ++-- arch/arm/mach-s3c2440/mach-osiris.c | 4 ++-- arch/arm/plat-s3c24xx/clock.c | 12 ++++++++++++ arch/arm/plat-s3c24xx/cpu.c | 9 --------- include/asm-arm/plat-s3c24xx/clock.h | 1 + include/asm-arm/plat-s3c24xx/cpu.h | 3 --- 8 files changed, 21 insertions(+), 20 deletions(-) (limited to 'include') diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c index 7b81296427eb..0bb2e8b2dd28 100644 --- a/arch/arm/mach-s3c2410/mach-bast.c +++ b/arch/arm/mach-s3c2410/mach-bast.c @@ -467,8 +467,6 @@ static struct clk *bast_clocks[] = { static struct s3c24xx_board bast_board __initdata = { .devices = bast_devices, .devices_count = ARRAY_SIZE(bast_devices), - .clocks = bast_clocks, - .clocks_count = ARRAY_SIZE(bast_clocks), }; static void __init bast_map_io(void) @@ -486,6 +484,8 @@ static void __init bast_map_io(void) s3c24xx_uclk.parent = &s3c24xx_clkout1; + s3c24xx_register_clocks(bast_clocks, ARRAY_SIZE(bast_clocks)); + s3c_device_nand.dev.platform_data = &bast_nand_info; s3c_device_i2c.dev.platform_data = &bast_i2c_info; diff --git a/arch/arm/mach-s3c2410/mach-vr1000.c b/arch/arm/mach-s3c2410/mach-vr1000.c index c947c75bcbf0..9380a1360890 100644 --- a/arch/arm/mach-s3c2410/mach-vr1000.c +++ b/arch/arm/mach-s3c2410/mach-vr1000.c @@ -387,8 +387,6 @@ static struct clk *vr1000_clocks[] = { static struct s3c24xx_board vr1000_board __initdata = { .devices = vr1000_devices, .devices_count = ARRAY_SIZE(vr1000_devices), - .clocks = vr1000_clocks, - .clocks_count = ARRAY_SIZE(vr1000_clocks), }; static void vr1000_power_off(void) @@ -412,6 +410,8 @@ static void __init vr1000_map_io(void) s3c24xx_uclk.parent = &s3c24xx_clkout1; + s3c24xx_register_clocks(vr1000_clocks, ARRAY_SIZE(vr1000_clocks)); + pm_power_off = vr1000_power_off; s3c24xx_init_io(vr1000_iodesc, ARRAY_SIZE(vr1000_iodesc)); diff --git a/arch/arm/mach-s3c2440/mach-anubis.c b/arch/arm/mach-s3c2440/mach-anubis.c index 3f0288eb1ed5..0f4e2882aa13 100644 --- a/arch/arm/mach-s3c2440/mach-anubis.c +++ b/arch/arm/mach-s3c2440/mach-anubis.c @@ -284,8 +284,6 @@ static struct clk *anubis_clocks[] = { static struct s3c24xx_board anubis_board __initdata = { .devices = anubis_devices, .devices_count = ARRAY_SIZE(anubis_devices), - .clocks = anubis_clocks, - .clocks_count = ARRAY_SIZE(anubis_clocks), }; static void __init anubis_map_io(void) @@ -303,6 +301,8 @@ static void __init anubis_map_io(void) s3c24xx_uclk.parent = &s3c24xx_clkout1; + s3c24xx_register_clocks(anubis_clocks, ARRAY_SIZE(anubis_clocks)); + s3c_device_nand.dev.platform_data = &anubis_nand_info; s3c24xx_init_io(anubis_iodesc, ARRAY_SIZE(anubis_iodesc)); diff --git a/arch/arm/mach-s3c2440/mach-osiris.c b/arch/arm/mach-s3c2440/mach-osiris.c index 2ed8e51f20c8..c9872210ab5a 100644 --- a/arch/arm/mach-s3c2440/mach-osiris.c +++ b/arch/arm/mach-s3c2440/mach-osiris.c @@ -254,8 +254,6 @@ static struct clk *osiris_clocks[] = { static struct s3c24xx_board osiris_board __initdata = { .devices = osiris_devices, .devices_count = ARRAY_SIZE(osiris_devices), - .clocks = osiris_clocks, - .clocks_count = ARRAY_SIZE(osiris_clocks), }; static void __init osiris_map_io(void) @@ -275,6 +273,8 @@ static void __init osiris_map_io(void) s3c24xx_uclk.parent = &s3c24xx_clkout1; + s3c24xx_register_clocks(osiris_clocks, ARRAY_SIZE(osiris_clocks)); + s3c_device_nand.dev.platform_data = &osiris_nand_info; s3c24xx_init_io(osiris_iodesc, ARRAY_SIZE(osiris_iodesc)); diff --git a/arch/arm/plat-s3c24xx/clock.c b/arch/arm/plat-s3c24xx/clock.c index d3dc03a7383a..79cda0faec86 100644 --- a/arch/arm/plat-s3c24xx/clock.c +++ b/arch/arm/plat-s3c24xx/clock.c @@ -404,6 +404,18 @@ int s3c24xx_register_clock(struct clk *clk) return 0; } +int s3c24xx_register_clocks(struct clk **clks, int nr_clks) +{ + int fails = 0; + + for (; nr_clks > 0; nr_clks--, clks++) { + if (s3c24xx_register_clock(*clks) < 0) + fails++; + } + + return fails; +} + /* initalise all the clocks */ int __init s3c24xx_setup_clocks(unsigned long xtal, diff --git a/arch/arm/plat-s3c24xx/cpu.c b/arch/arm/plat-s3c24xx/cpu.c index 6a2d1070e5a0..3e314a296255 100644 --- a/arch/arm/plat-s3c24xx/cpu.c +++ b/arch/arm/plat-s3c24xx/cpu.c @@ -187,16 +187,7 @@ static struct s3c24xx_board *board; void s3c24xx_set_board(struct s3c24xx_board *b) { - int i; - board = b; - - if (b->clocks_count != 0) { - struct clk **ptr = b->clocks; - - for (i = b->clocks_count; i > 0; i--, ptr++) - s3c24xx_register_clock(*ptr); - } } /* cpu information */ diff --git a/include/asm-arm/plat-s3c24xx/clock.h b/include/asm-arm/plat-s3c24xx/clock.h index f6135dbb9fa9..235b753cd877 100644 --- a/include/asm-arm/plat-s3c24xx/clock.h +++ b/include/asm-arm/plat-s3c24xx/clock.h @@ -56,6 +56,7 @@ extern struct mutex clocks_mutex; extern int s3c2410_clkcon_enable(struct clk *clk, int enable); extern int s3c24xx_register_clock(struct clk *clk); +extern int s3c24xx_register_clocks(struct clk **clk, int nr_clks); extern int s3c24xx_setup_clocks(unsigned long xtal, unsigned long fclk, diff --git a/include/asm-arm/plat-s3c24xx/cpu.h b/include/asm-arm/plat-s3c24xx/cpu.h index 15dd18810905..8c17ca4348f1 100644 --- a/include/asm-arm/plat-s3c24xx/cpu.h +++ b/include/asm-arm/plat-s3c24xx/cpu.h @@ -49,9 +49,6 @@ extern void s3c24xx_init_uartdevs(char *name, struct s3c24xx_board { struct platform_device **devices; unsigned int devices_count; - - struct clk **clocks; - unsigned int clocks_count; }; extern void s3c24xx_set_board(struct s3c24xx_board *board); -- cgit v1.2.3-59-g8ed1b From 57e5171c9ff817d56344d8473e484d6870ae2bf3 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Fri, 20 Apr 2007 11:19:16 +0100 Subject: [ARM] 4325/1: S3C24XX: remove s3c24xx_board Remove the use of struct s3c24xx_board as this is just as easily done by using the platform device registration functions to make the initialisation sequence easier. Signed-off-by: Ben Dooks Signed-off-by: Russell King --- arch/arm/mach-s3c2410/mach-amlm5900.c | 7 +------ arch/arm/mach-s3c2410/mach-bast.c | 8 ++------ arch/arm/mach-s3c2410/mach-h1940.c | 9 ++------- arch/arm/mach-s3c2410/mach-n30.c | 8 ++------ arch/arm/mach-s3c2410/mach-otom.c | 12 +++++------- arch/arm/mach-s3c2410/mach-qt2410.c | 7 +------ arch/arm/mach-s3c2410/mach-smdk2410.c | 14 +++++++------- arch/arm/mach-s3c2410/mach-vr1000.c | 12 +++++------- arch/arm/mach-s3c2412/mach-smdk2413.c | 7 +------ arch/arm/mach-s3c2412/mach-vstms.c | 12 ++++++------ arch/arm/mach-s3c2440/mach-anubis.c | 13 +++++++------ arch/arm/mach-s3c2440/mach-nexcoder.c | 13 ++++++------- arch/arm/mach-s3c2440/mach-osiris.c | 12 ++++++------ arch/arm/mach-s3c2440/mach-rx3715.c | 8 +------- arch/arm/mach-s3c2440/mach-smdk2440.c | 7 +------ arch/arm/mach-s3c2443/mach-smdk2443.c | 7 +------ arch/arm/plat-s3c24xx/cpu.c | 29 ----------------------------- include/asm-arm/plat-s3c24xx/cpu.h | 13 ------------- 18 files changed, 54 insertions(+), 144 deletions(-) (limited to 'include') diff --git a/arch/arm/mach-s3c2410/mach-amlm5900.c b/arch/arm/mach-s3c2410/mach-amlm5900.c index 72f2cc4fcd03..bc308ceb91c3 100644 --- a/arch/arm/mach-s3c2410/mach-amlm5900.c +++ b/arch/arm/mach-s3c2410/mach-amlm5900.c @@ -160,17 +160,11 @@ static struct platform_device *amlm5900_devices[] __initdata = { #endif }; -static struct s3c24xx_board amlm5900_board __initdata = { - .devices = amlm5900_devices, - .devices_count = ARRAY_SIZE(amlm5900_devices) -}; - void __init amlm5900_map_io(void) { s3c24xx_init_io(amlm5900_iodesc, ARRAY_SIZE(amlm5900_iodesc)); s3c24xx_init_clocks(0); s3c24xx_init_uarts(amlm5900_uartcfgs, ARRAY_SIZE(amlm5900_uartcfgs)); - s3c24xx_set_board(&amlm5900_board); } #ifdef CONFIG_FB_S3C2410 @@ -247,6 +241,7 @@ static void __init amlm5900_init(void) #ifdef CONFIG_FB_S3C2410 s3c24xx_fb_set_platdata(&amlm5900_lcd_info); #endif + platform_add_devices(amlm5900_devices, ARRAY_SIZE(amlm5900_devices)); } MACHINE_START(AML_M5900, "AML_M5900") diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c index 0bb2e8b2dd28..f01de807b72f 100644 --- a/arch/arm/mach-s3c2410/mach-bast.c +++ b/arch/arm/mach-s3c2410/mach-bast.c @@ -464,11 +464,6 @@ static struct clk *bast_clocks[] = { &s3c24xx_uclk, }; -static struct s3c24xx_board bast_board __initdata = { - .devices = bast_devices, - .devices_count = ARRAY_SIZE(bast_devices), -}; - static void __init bast_map_io(void) { /* initialise the clocks */ @@ -492,13 +487,14 @@ static void __init bast_map_io(void) s3c24xx_init_io(bast_iodesc, ARRAY_SIZE(bast_iodesc)); s3c24xx_init_clocks(0); s3c24xx_init_uarts(bast_uartcfgs, ARRAY_SIZE(bast_uartcfgs)); - s3c24xx_set_board(&bast_board); + usb_simtec_init(); } static void __init bast_init(void) { s3c24xx_fb_set_platdata(&bast_lcd_info); + platform_add_devices(bast_devices, ARRAY_SIZE(bast_devices)); } MACHINE_START(BAST, "Simtec-BAST") diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c index d052ab2d9377..5d5f00e9c462 100644 --- a/arch/arm/mach-s3c2410/mach-h1940.c +++ b/arch/arm/mach-s3c2410/mach-h1940.c @@ -129,7 +129,6 @@ static struct s3c2410_udc_mach_info h1940_udc_cfg __initdata = { }; - /** * Set lcd on or off **/ @@ -188,17 +187,11 @@ static struct platform_device *h1940_devices[] __initdata = { &s3c_device_leds, }; -static struct s3c24xx_board h1940_board __initdata = { - .devices = h1940_devices, - .devices_count = ARRAY_SIZE(h1940_devices) -}; - static void __init h1940_map_io(void) { s3c24xx_init_io(h1940_iodesc, ARRAY_SIZE(h1940_iodesc)); s3c24xx_init_clocks(0); s3c24xx_init_uarts(h1940_uartcfgs, ARRAY_SIZE(h1940_uartcfgs)); - s3c24xx_set_board(&h1940_board); /* setup PM */ @@ -232,6 +225,8 @@ static void __init h1940_init(void) | (0x02 << S3C2410_PLLCON_PDIVSHIFT) | (0x03 << S3C2410_PLLCON_SDIVSHIFT); writel(tmp, S3C2410_UPLLCON); + + platform_add_devices(h1940_devices, ARRAY_SIZE(h1940_devices)); } MACHINE_START(H1940, "IPAQ-H1940") diff --git a/arch/arm/mach-s3c2410/mach-n30.c b/arch/arm/mach-s3c2410/mach-n30.c index 261aa4cc0770..412e50c3d28a 100644 --- a/arch/arm/mach-s3c2410/mach-n30.c +++ b/arch/arm/mach-s3c2410/mach-n30.c @@ -90,17 +90,11 @@ static struct s3c2410_platform_i2c n30_i2ccfg = { .max_freq = 10*1000, }; -static struct s3c24xx_board n30_board __initdata = { - .devices = n30_devices, - .devices_count = ARRAY_SIZE(n30_devices) -}; - static void __init n30_map_io(void) { s3c24xx_init_io(n30_iodesc, ARRAY_SIZE(n30_iodesc)); s3c24xx_init_clocks(0); s3c24xx_init_uarts(n30_uartcfgs, ARRAY_SIZE(n30_uartcfgs)); - s3c24xx_set_board(&n30_board); } static void __init n30_init_irq(void) @@ -120,6 +114,8 @@ static void __init n30_init(void) s3c2410_modify_misccr(S3C2410_MISCCR_USBHOST | S3C2410_MISCCR_USBSUSPND0 | S3C2410_MISCCR_USBSUSPND1, 0x0); + + platform_add_devices(n30_devices, ARRAY_SIZE(n30_devices)); } MACHINE_START(N30, "Acer-N30") diff --git a/arch/arm/mach-s3c2410/mach-otom.c b/arch/arm/mach-s3c2410/mach-otom.c index c78ab75b44f3..1f899fa588df 100644 --- a/arch/arm/mach-s3c2410/mach-otom.c +++ b/arch/arm/mach-s3c2410/mach-otom.c @@ -100,20 +100,17 @@ static struct platform_device *otom11_devices[] __initdata = { &otom_device_nor, }; -static struct s3c24xx_board otom11_board __initdata = { - .devices = otom11_devices, - .devices_count = ARRAY_SIZE(otom11_devices) -}; - - static void __init otom11_map_io(void) { s3c24xx_init_io(otom11_iodesc, ARRAY_SIZE(otom11_iodesc)); s3c24xx_init_clocks(0); s3c24xx_init_uarts(otom11_uartcfgs, ARRAY_SIZE(otom11_uartcfgs)); - s3c24xx_set_board(&otom11_board); } +static void __init otom11_init(void) +{ + platform_add_devices(otom11_devices, ARRAY_SIZE(otom11_devices)); +} MACHINE_START(OTOM, "Nex Vision - Otom 1.1") /* Maintainer: Guillaume GOURAT */ @@ -121,6 +118,7 @@ MACHINE_START(OTOM, "Nex Vision - Otom 1.1") .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, .boot_params = S3C2410_SDRAM_PA + 0x100, .map_io = otom11_map_io, + .init_machine = otom11_init, .init_irq = s3c24xx_init_irq, .timer = &s3c24xx_timer, MACHINE_END diff --git a/arch/arm/mach-s3c2410/mach-qt2410.c b/arch/arm/mach-s3c2410/mach-qt2410.c index c6a41593de21..caf6778472d3 100644 --- a/arch/arm/mach-s3c2410/mach-qt2410.c +++ b/arch/arm/mach-s3c2410/mach-qt2410.c @@ -331,11 +331,6 @@ static struct platform_device *qt2410_devices[] __initdata = { &qt2410_led, }; -static struct s3c24xx_board qt2410_board __initdata = { - .devices = qt2410_devices, - .devices_count = ARRAY_SIZE(qt2410_devices) -}; - static struct mtd_partition qt2410_nand_part[] = { [0] = { .name = "U-Boot", @@ -405,7 +400,6 @@ static void __init qt2410_map_io(void) s3c24xx_init_io(qt2410_iodesc, ARRAY_SIZE(qt2410_iodesc)); s3c24xx_init_clocks(12*1000*1000); s3c24xx_init_uarts(smdk2410_uartcfgs, ARRAY_SIZE(smdk2410_uartcfgs)); - s3c24xx_set_board(&qt2410_board); } static void __init qt2410_machine_init(void) @@ -432,6 +426,7 @@ static void __init qt2410_machine_init(void) s3c2410_gpio_cfgpin(S3C2410_GPB5, S3C2410_GPIO_OUTPUT); + platform_add_devices(qt2410_devices, ARRAY_SIZE(qt2410_devices)); s3c2410_pm_init(); } diff --git a/arch/arm/mach-s3c2410/mach-smdk2410.c b/arch/arm/mach-s3c2410/mach-smdk2410.c index 57b8a80f33d0..5852d300d52f 100644 --- a/arch/arm/mach-s3c2410/mach-smdk2410.c +++ b/arch/arm/mach-s3c2410/mach-smdk2410.c @@ -94,17 +94,17 @@ static struct platform_device *smdk2410_devices[] __initdata = { &s3c_device_iis, }; -static struct s3c24xx_board smdk2410_board __initdata = { - .devices = smdk2410_devices, - .devices_count = ARRAY_SIZE(smdk2410_devices) -}; - static void __init smdk2410_map_io(void) { s3c24xx_init_io(smdk2410_iodesc, ARRAY_SIZE(smdk2410_iodesc)); s3c24xx_init_clocks(0); s3c24xx_init_uarts(smdk2410_uartcfgs, ARRAY_SIZE(smdk2410_uartcfgs)); - s3c24xx_set_board(&smdk2410_board); +} + +static void __init smdk2410_init(void) +{ + platform_add_devices(smdk2410_devices, ARRAY_SIZE(smdk2410_devices)); + smdk_machine_init(); } MACHINE_START(SMDK2410, "SMDK2410") /* @TODO: request a new identifier and switch @@ -115,7 +115,7 @@ MACHINE_START(SMDK2410, "SMDK2410") /* @TODO: request a new identifier and switc .boot_params = S3C2410_SDRAM_PA + 0x100, .map_io = smdk2410_map_io, .init_irq = s3c24xx_init_irq, - .init_machine = smdk_machine_init, + .init_machine = smdk2410_init, .timer = &s3c24xx_timer, MACHINE_END diff --git a/arch/arm/mach-s3c2410/mach-vr1000.c b/arch/arm/mach-s3c2410/mach-vr1000.c index 9380a1360890..7b624bb00490 100644 --- a/arch/arm/mach-s3c2410/mach-vr1000.c +++ b/arch/arm/mach-s3c2410/mach-vr1000.c @@ -384,11 +384,6 @@ static struct clk *vr1000_clocks[] = { &s3c24xx_uclk, }; -static struct s3c24xx_board vr1000_board __initdata = { - .devices = vr1000_devices, - .devices_count = ARRAY_SIZE(vr1000_devices), -}; - static void vr1000_power_off(void) { s3c2410_gpio_cfgpin(S3C2410_GPB9, S3C2410_GPB9_OUTP); @@ -417,10 +412,12 @@ static void __init vr1000_map_io(void) s3c24xx_init_io(vr1000_iodesc, ARRAY_SIZE(vr1000_iodesc)); s3c24xx_init_clocks(0); s3c24xx_init_uarts(vr1000_uartcfgs, ARRAY_SIZE(vr1000_uartcfgs)); - s3c24xx_set_board(&vr1000_board); - usb_simtec_init(); } +static void __init vr1000_init(void) +{ + platform_add_devices(vr1000_devices, ARRAY_SIZE(vr1000_devices)); +} MACHINE_START(VR1000, "Thorcom-VR1000") /* Maintainer: Ben Dooks */ @@ -428,6 +425,7 @@ MACHINE_START(VR1000, "Thorcom-VR1000") .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, .boot_params = S3C2410_SDRAM_PA + 0x100, .map_io = vr1000_map_io, + .init_machine = vr1000_init, .init_irq = s3c24xx_init_irq, .timer = &s3c24xx_timer, MACHINE_END diff --git a/arch/arm/mach-s3c2412/mach-smdk2413.c b/arch/arm/mach-s3c2412/mach-smdk2413.c index b5befce6c8d3..063af09f899d 100644 --- a/arch/arm/mach-s3c2412/mach-smdk2413.c +++ b/arch/arm/mach-s3c2412/mach-smdk2413.c @@ -110,11 +110,6 @@ static struct platform_device *smdk2413_devices[] __initdata = { &s3c_device_usbgadget, }; -static struct s3c24xx_board smdk2413_board __initdata = { - .devices = smdk2413_devices, - .devices_count = ARRAY_SIZE(smdk2413_devices) -}; - static void __init smdk2413_fixup(struct machine_desc *desc, struct tag *tags, char **cmdline, struct meminfo *mi) @@ -132,7 +127,6 @@ static void __init smdk2413_map_io(void) s3c24xx_init_io(smdk2413_iodesc, ARRAY_SIZE(smdk2413_iodesc)); s3c24xx_init_clocks(12000000); s3c24xx_init_uarts(smdk2413_uartcfgs, ARRAY_SIZE(smdk2413_uartcfgs)); - s3c24xx_set_board(&smdk2413_board); } static void __init smdk2413_machine_init(void) @@ -149,6 +143,7 @@ static void __init smdk2413_machine_init(void) s3c24xx_udc_set_platdata(&smdk2413_udc_cfg); + platform_add_devices(smdk2413_devices, ARRAY_SIZE(smdk2413_devices)); smdk_machine_init(); } diff --git a/arch/arm/mach-s3c2412/mach-vstms.c b/arch/arm/mach-s3c2412/mach-vstms.c index 4231b549d797..f2fbd65956ac 100644 --- a/arch/arm/mach-s3c2412/mach-vstms.c +++ b/arch/arm/mach-s3c2412/mach-vstms.c @@ -129,11 +129,6 @@ static struct platform_device *vstms_devices[] __initdata = { &s3c_device_nand, }; -static struct s3c24xx_board vstms_board __initdata = { - .devices = vstms_devices, - .devices_count = ARRAY_SIZE(vstms_devices) -}; - static void __init vstms_fixup(struct machine_desc *desc, struct tag *tags, char **cmdline, struct meminfo *mi) @@ -153,7 +148,11 @@ static void __init vstms_map_io(void) s3c24xx_init_io(vstms_iodesc, ARRAY_SIZE(vstms_iodesc)); s3c24xx_init_clocks(12000000); s3c24xx_init_uarts(vstms_uartcfgs, ARRAY_SIZE(vstms_uartcfgs)); - s3c24xx_set_board(&vstms_board); +} + +static void __init vstms_init(void) +{ + platform_add_devices(vstms_devices, ARRAY_SIZE(vstms_devices)); } MACHINE_START(VSTMS, "VSTMS") @@ -163,6 +162,7 @@ MACHINE_START(VSTMS, "VSTMS") .fixup = vstms_fixup, .init_irq = s3c24xx_init_irq, + .init_machine = vstms_init, .map_io = vstms_map_io, .timer = &s3c24xx_timer, MACHINE_END diff --git a/arch/arm/mach-s3c2440/mach-anubis.c b/arch/arm/mach-s3c2440/mach-anubis.c index 0f4e2882aa13..b5d387ef37e1 100644 --- a/arch/arm/mach-s3c2440/mach-anubis.c +++ b/arch/arm/mach-s3c2440/mach-anubis.c @@ -281,11 +281,6 @@ static struct clk *anubis_clocks[] = { &s3c24xx_uclk, }; -static struct s3c24xx_board anubis_board __initdata = { - .devices = anubis_devices, - .devices_count = ARRAY_SIZE(anubis_devices), -}; - static void __init anubis_map_io(void) { /* initialise the clocks */ @@ -308,18 +303,24 @@ static void __init anubis_map_io(void) s3c24xx_init_io(anubis_iodesc, ARRAY_SIZE(anubis_iodesc)); s3c24xx_init_clocks(0); s3c24xx_init_uarts(anubis_uartcfgs, ARRAY_SIZE(anubis_uartcfgs)); - s3c24xx_set_board(&anubis_board); /* ensure that the GPIO is setup */ s3c2410_gpio_setpin(S3C2410_GPA0, 1); } +static void __init anubis_init(void) +{ + platform_add_devices(anubis_devices, ARRAY_SIZE(anubis_devices)); +} + + MACHINE_START(ANUBIS, "Simtec-Anubis") /* Maintainer: Ben Dooks */ .phys_io = S3C2410_PA_UART, .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, .boot_params = S3C2410_SDRAM_PA + 0x100, .map_io = anubis_map_io, + .init_machine = anubis_init, .init_irq = s3c24xx_init_irq, .timer = &s3c24xx_timer, MACHINE_END diff --git a/arch/arm/mach-s3c2440/mach-nexcoder.c b/arch/arm/mach-s3c2440/mach-nexcoder.c index 6d551d88330b..5e61f2166c76 100644 --- a/arch/arm/mach-s3c2440/mach-nexcoder.c +++ b/arch/arm/mach-s3c2440/mach-nexcoder.c @@ -116,12 +116,6 @@ static struct platform_device *nexcoder_devices[] __initdata = { &nexcoder_device_nor, }; -static struct s3c24xx_board nexcoder_board __initdata = { - .devices = nexcoder_devices, - .devices_count = ARRAY_SIZE(nexcoder_devices), -}; - - static void __init nexcoder_sensorboard_init(void) { // Initialize SCCB bus @@ -142,10 +136,14 @@ static void __init nexcoder_map_io(void) s3c24xx_init_io(nexcoder_iodesc, ARRAY_SIZE(nexcoder_iodesc)); s3c24xx_init_clocks(0); s3c24xx_init_uarts(nexcoder_uartcfgs, ARRAY_SIZE(nexcoder_uartcfgs)); - s3c24xx_set_board(&nexcoder_board); + nexcoder_sensorboard_init(); } +static void __init nexcoder_init(void) +{ + platform_add_devices(nexcoder_devices, ARRAY_SIZE(nexcoder_devices)); +}; MACHINE_START(NEXCODER_2440, "NexVision - Nexcoder 2440") /* Maintainer: Guillaume GOURAT */ @@ -153,6 +151,7 @@ MACHINE_START(NEXCODER_2440, "NexVision - Nexcoder 2440") .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, .boot_params = S3C2410_SDRAM_PA + 0x100, .map_io = nexcoder_map_io, + .init_machine = nexcoder_init, .init_irq = s3c24xx_init_irq, .timer = &s3c24xx_timer, MACHINE_END diff --git a/arch/arm/mach-s3c2440/mach-osiris.c b/arch/arm/mach-s3c2440/mach-osiris.c index c9872210ab5a..324f5a237921 100644 --- a/arch/arm/mach-s3c2440/mach-osiris.c +++ b/arch/arm/mach-s3c2440/mach-osiris.c @@ -251,11 +251,6 @@ static struct clk *osiris_clocks[] = { &s3c24xx_uclk, }; -static struct s3c24xx_board osiris_board __initdata = { - .devices = osiris_devices, - .devices_count = ARRAY_SIZE(osiris_devices), -}; - static void __init osiris_map_io(void) { unsigned long flags; @@ -280,7 +275,6 @@ static void __init osiris_map_io(void) s3c24xx_init_io(osiris_iodesc, ARRAY_SIZE(osiris_iodesc)); s3c24xx_init_clocks(0); s3c24xx_init_uarts(osiris_uartcfgs, ARRAY_SIZE(osiris_uartcfgs)); - s3c24xx_set_board(&osiris_board); /* fix bus configuration (nBE settings wrong on ABLE pre v2.20) */ @@ -292,12 +286,18 @@ static void __init osiris_map_io(void) s3c2410_gpio_setpin(S3C2410_GPA0, 1); } +static void __init osiris_init(void) +{ + platform_add_devices(osiris_devices, ARRAY_SIZE(osiris_devices)); +}; + MACHINE_START(OSIRIS, "Simtec-OSIRIS") /* Maintainer: Ben Dooks */ .phys_io = S3C2410_PA_UART, .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, .boot_params = S3C2410_SDRAM_PA + 0x100, .map_io = osiris_map_io, + .init_machine = osiris_init, .init_irq = s3c24xx_init_irq, .timer = &s3c24xx_timer, MACHINE_END diff --git a/arch/arm/mach-s3c2440/mach-rx3715.c b/arch/arm/mach-s3c2440/mach-rx3715.c index ae1d0a81fd6a..c3cc4bf158f6 100644 --- a/arch/arm/mach-s3c2440/mach-rx3715.c +++ b/arch/arm/mach-s3c2440/mach-rx3715.c @@ -202,11 +202,6 @@ static struct platform_device *rx3715_devices[] __initdata = { &s3c_device_nand, }; -static struct s3c24xx_board rx3715_board __initdata = { - .devices = rx3715_devices, - .devices_count = ARRAY_SIZE(rx3715_devices) -}; - static void __init rx3715_map_io(void) { s3c_device_nand.dev.platform_data = &rx3715_nand_info; @@ -214,7 +209,6 @@ static void __init rx3715_map_io(void) s3c24xx_init_io(rx3715_iodesc, ARRAY_SIZE(rx3715_iodesc)); s3c24xx_init_clocks(16934000); s3c24xx_init_uarts(rx3715_uartcfgs, ARRAY_SIZE(rx3715_uartcfgs)); - s3c24xx_set_board(&rx3715_board); } static void __init rx3715_init_irq(void) @@ -230,9 +224,9 @@ static void __init rx3715_init_machine(void) s3c2410_pm_init(); s3c24xx_fb_set_platdata(&rx3715_lcdcfg); + platform_add_devices(rx3715_devices, ARRAY_SIZE(rx3715_devices)); } - MACHINE_START(RX3715, "IPAQ-RX3715") /* Maintainer: Ben Dooks */ .phys_io = S3C2410_PA_UART, diff --git a/arch/arm/mach-s3c2440/mach-smdk2440.c b/arch/arm/mach-s3c2440/mach-smdk2440.c index c17eb5b1f6b4..e167254e232e 100644 --- a/arch/arm/mach-s3c2440/mach-smdk2440.c +++ b/arch/arm/mach-s3c2440/mach-smdk2440.c @@ -174,23 +174,18 @@ static struct platform_device *smdk2440_devices[] __initdata = { &s3c_device_iis, }; -static struct s3c24xx_board smdk2440_board __initdata = { - .devices = smdk2440_devices, - .devices_count = ARRAY_SIZE(smdk2440_devices) -}; - static void __init smdk2440_map_io(void) { s3c24xx_init_io(smdk2440_iodesc, ARRAY_SIZE(smdk2440_iodesc)); s3c24xx_init_clocks(16934400); s3c24xx_init_uarts(smdk2440_uartcfgs, ARRAY_SIZE(smdk2440_uartcfgs)); - s3c24xx_set_board(&smdk2440_board); } static void __init smdk2440_machine_init(void) { s3c24xx_fb_set_platdata(&smdk2440_lcd_cfg); + platform_add_devices(smdk2440_devices, ARRAY_SIZE(smdk2440_devices)); smdk_machine_init(); } diff --git a/arch/arm/mach-s3c2443/mach-smdk2443.c b/arch/arm/mach-s3c2443/mach-smdk2443.c index e82aaff7dee4..b71ee53c2865 100644 --- a/arch/arm/mach-s3c2443/mach-smdk2443.c +++ b/arch/arm/mach-s3c2443/mach-smdk2443.c @@ -106,21 +106,16 @@ static struct platform_device *smdk2443_devices[] __initdata = { &s3c_device_i2c, }; -static struct s3c24xx_board smdk2443_board __initdata = { - .devices = smdk2443_devices, - .devices_count = ARRAY_SIZE(smdk2443_devices) -}; - static void __init smdk2443_map_io(void) { s3c24xx_init_io(smdk2443_iodesc, ARRAY_SIZE(smdk2443_iodesc)); s3c24xx_init_clocks(12000000); s3c24xx_init_uarts(smdk2443_uartcfgs, ARRAY_SIZE(smdk2443_uartcfgs)); - s3c24xx_set_board(&smdk2443_board); } static void __init smdk2443_machine_init(void) { + platform_add_devices(smdk2443_devices, ARRAY_SIZE(smdk2443_devices)); smdk_machine_init(); } diff --git a/arch/arm/plat-s3c24xx/cpu.c b/arch/arm/plat-s3c24xx/cpu.c index 3e314a296255..8ce4904d3131 100644 --- a/arch/arm/plat-s3c24xx/cpu.c +++ b/arch/arm/plat-s3c24xx/cpu.c @@ -181,15 +181,6 @@ s3c_lookup_cpu(unsigned long idcode) return NULL; } -/* board information */ - -static struct s3c24xx_board *board; - -void s3c24xx_set_board(struct s3c24xx_board *b) -{ - board = b; -} - /* cpu information */ static struct cpu_table *cpu; @@ -333,26 +324,6 @@ static int __init s3c_arch_init(void) return ret; ret = platform_add_devices(s3c24xx_uart_devs, nr_uarts); - if (ret != 0) - return ret; - - if (board != NULL) { - struct platform_device **ptr = board->devices; - int i; - - for (i = 0; i < board->devices_count; i++, ptr++) { - ret = platform_device_register(*ptr); - - if (ret) { - printk(KERN_ERR "s3c24xx: failed to add board device %s (%d) @%p\n", (*ptr)->name, ret, *ptr); - } - } - - /* mask any error, we may not need all these board - * devices */ - ret = 0; - } - return ret; } diff --git a/include/asm-arm/plat-s3c24xx/cpu.h b/include/asm-arm/plat-s3c24xx/cpu.h index 8c17ca4348f1..23e420e8bd5b 100644 --- a/include/asm-arm/plat-s3c24xx/cpu.h +++ b/include/asm-arm/plat-s3c24xx/cpu.h @@ -40,19 +40,6 @@ extern void s3c24xx_init_uartdevs(char *name, struct s3c24xx_uart_resources *res, struct s3c2410_uartcfg *cfg, int no); -/* the board structure is used at first initialsation time - * to get info such as the devices to register for this - * board. This is done because platfrom_add_devices() cannot - * be called from the map_io entry. -*/ - -struct s3c24xx_board { - struct platform_device **devices; - unsigned int devices_count; -}; - -extern void s3c24xx_set_board(struct s3c24xx_board *board); - /* timer for 2410/2440 */ struct sys_timer; -- cgit v1.2.3-59-g8ed1b From 7053acbd78336abf5d4bc3d8a875a03624cfb83f Mon Sep 17 00:00:00 2001 From: Eric Miao Date: Thu, 5 Apr 2007 04:07:20 +0100 Subject: [ARM] 4304/1: removes the unnecessary bit number from CKENnn_XXXX This patch removes the unnecessary bit number from CKENnn_XXXX definitions for PXA, so that CKEN0_PWM0 --> CKEN_PWM0 CKEN1_PWM1 --> CKEN_PWM1 ... CKEN24_CAMERA --> CKEN_CAMERA The reasons for the change of these defitions are: 1. they do not scale - they are currently valid for pxa2xx, but definitely not valid for pxa3xx, e.g., pxa3xx has bit 3 for camera instead of bit 24 2. they are unnecessary - the peripheral name within the definition has already announced its usage, we don't need those bit numbers to know which peripheral we are going to enable/disable clock for 3. they are inconvenient - think about this: a driver programmer for pxa has to remember which bit in the CKEN register to turn on/off Another change in the patch is to make the definitions equal to its clock bit index, so that #define CKEN_CAMERA (24) instead of #define CKEN_CAMERA (1 << 24) this change, however, will add a run-time bit shift operation in pxa_set_cken(), but the benefit of this change is that it scales when bit index exceeds 32, e.g., pxa3xx has two registers CKENA and CKENB, totally 64 bit for this, suppose CAMERA clock enabling bit is CKENB:10, one can simply define CKEN_CAMERA to be (32 + 10) and so that pxa_set_cken() need minimum change to adapt to that. Signed-off-by: eric miao Signed-off-by: Russell King --- Documentation/spi/pxa2xx | 2 +- arch/arm/mach-pxa/generic.c | 4 +-- arch/arm/mach-pxa/lpd270.c | 4 +-- arch/arm/mach-pxa/lubbock.c | 2 +- arch/arm/mach-pxa/mainstone.c | 4 +-- arch/arm/mach-pxa/pxa27x.c | 4 +-- arch/arm/mach-pxa/ssp.c | 12 ++++---- drivers/i2c/busses/i2c-pxa.c | 12 ++++---- drivers/mmc/pxamci.c | 4 +-- drivers/net/irda/pxaficp_ir.c | 12 ++++---- drivers/serial/pxa.c | 8 ++--- drivers/usb/gadget/pxa2xx_udc.c | 4 +-- drivers/usb/host/ohci-pxa27x.c | 4 +-- drivers/video/pxafb.c | 4 +-- include/asm-arm/arch-pxa/pxa-regs.h | 58 ++++++++++++++++++------------------- sound/arm/pxa2xx-ac97.c | 12 ++++---- sound/soc/pxa/pxa2xx-ac97.c | 12 ++++---- sound/soc/pxa/pxa2xx-i2s.c | 4 +-- 18 files changed, 83 insertions(+), 83 deletions(-) (limited to 'include') diff --git a/Documentation/spi/pxa2xx b/Documentation/spi/pxa2xx index f9717fe9bd85..215e3b8e7266 100644 --- a/Documentation/spi/pxa2xx +++ b/Documentation/spi/pxa2xx @@ -62,7 +62,7 @@ static struct resource pxa_spi_nssp_resources[] = { static struct pxa2xx_spi_master pxa_nssp_master_info = { .ssp_type = PXA25x_NSSP, /* Type of SSP */ - .clock_enable = CKEN9_NSSP, /* NSSP Peripheral clock */ + .clock_enable = CKEN_NSSP, /* NSSP Peripheral clock */ .num_chipselect = 1, /* Matches the number of chips attached to NSSP */ .enable_dma = 1, /* Enables NSSP DMA */ }; diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c index b8cb79f899d5..64b08b744f9f 100644 --- a/arch/arm/mach-pxa/generic.c +++ b/arch/arm/mach-pxa/generic.c @@ -164,9 +164,9 @@ void pxa_set_cken(int clock, int enable) local_irq_save(flags); if (enable) - CKEN |= clock; + CKEN |= (1 << clock); else - CKEN &= ~clock; + CKEN &= ~(1 << clock); local_irq_restore(flags); } diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c index 8e27a64fa9f4..e3097664ffe1 100644 --- a/arch/arm/mach-pxa/lpd270.c +++ b/arch/arm/mach-pxa/lpd270.c @@ -234,7 +234,7 @@ static void lpd270_backlight_power(int on) { if (on) { pxa_gpio_mode(GPIO16_PWM0_MD); - pxa_set_cken(CKEN0_PWM0, 1); + pxa_set_cken(CKEN_PWM0, 1); PWM_CTRL0 = 0; PWM_PWDUTY0 = 0x3ff; PWM_PERVAL0 = 0x3ff; @@ -242,7 +242,7 @@ static void lpd270_backlight_power(int on) PWM_CTRL0 = 0; PWM_PWDUTY0 = 0x0; PWM_PERVAL0 = 0x3FF; - pxa_set_cken(CKEN0_PWM0, 0); + pxa_set_cken(CKEN_PWM0, 0); } } diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c index 055de7f4f00a..6377b2e29ff0 100644 --- a/arch/arm/mach-pxa/lubbock.c +++ b/arch/arm/mach-pxa/lubbock.c @@ -220,7 +220,7 @@ static struct resource pxa_ssp_resources[] = { static struct pxa2xx_spi_master pxa_ssp_master_info = { .ssp_type = PXA25x_SSP, - .clock_enable = CKEN3_SSP, + .clock_enable = CKEN_SSP, .num_chipselect = 0, }; diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c index 56d94d88d5ca..ed99a81b98f3 100644 --- a/arch/arm/mach-pxa/mainstone.c +++ b/arch/arm/mach-pxa/mainstone.c @@ -266,7 +266,7 @@ static void mainstone_backlight_power(int on) { if (on) { pxa_gpio_mode(GPIO16_PWM0_MD); - pxa_set_cken(CKEN0_PWM0, 1); + pxa_set_cken(CKEN_PWM0, 1); PWM_CTRL0 = 0; PWM_PWDUTY0 = 0x3ff; PWM_PERVAL0 = 0x3ff; @@ -274,7 +274,7 @@ static void mainstone_backlight_power(int on) PWM_CTRL0 = 0; PWM_PWDUTY0 = 0x0; PWM_PERVAL0 = 0x3FF; - pxa_set_cken(CKEN0_PWM0, 0); + pxa_set_cken(CKEN_PWM0, 0); } } diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c index 74eeada1e2fc..c64bab49efc4 100644 --- a/arch/arm/mach-pxa/pxa27x.c +++ b/arch/arm/mach-pxa/pxa27x.c @@ -140,9 +140,9 @@ void pxa_cpu_pm_enter(suspend_state_t state) extern void pxa_cpu_resume(void); if (state == PM_SUSPEND_STANDBY) - CKEN = CKEN22_MEMC | CKEN9_OSTIMER | CKEN16_LCD |CKEN0_PWM0; + CKEN = CKEN_MEMC | CKEN_OSTIMER | CKEN_LCD | CKEN_PWM0; else - CKEN = CKEN22_MEMC | CKEN9_OSTIMER; + CKEN = CKEN_MEMC | CKEN_OSTIMER; /* ensure voltage-change sequencer not initiated, which hangs */ PCFR &= ~PCFR_FVC; diff --git a/arch/arm/mach-pxa/ssp.c b/arch/arm/mach-pxa/ssp.c index 6cc202755fb4..71766ac0328b 100644 --- a/arch/arm/mach-pxa/ssp.c +++ b/arch/arm/mach-pxa/ssp.c @@ -52,13 +52,13 @@ struct ssp_info_ { */ static const struct ssp_info_ ssp_info[PXA_SSP_PORTS] = { #if defined (CONFIG_PXA27x) - {IRQ_SSP, CKEN23_SSP1}, - {IRQ_SSP2, CKEN3_SSP2}, - {IRQ_SSP3, CKEN4_SSP3}, + {IRQ_SSP, CKEN_SSP1}, + {IRQ_SSP2, CKEN_SSP2}, + {IRQ_SSP3, CKEN_SSP3}, #else - {IRQ_SSP, CKEN3_SSP}, - {IRQ_NSSP, CKEN9_NSSP}, - {IRQ_ASSP, CKEN10_ASSP}, + {IRQ_SSP, CKEN_SSP}, + {IRQ_NSSP, CKEN_NSSP}, + {IRQ_ASSP, CKEN_ASSP}, #endif }; diff --git a/drivers/i2c/busses/i2c-pxa.c b/drivers/i2c/busses/i2c-pxa.c index 11c7477a0ffa..4443d3bb3fbf 100644 --- a/drivers/i2c/busses/i2c-pxa.c +++ b/drivers/i2c/busses/i2c-pxa.c @@ -887,14 +887,14 @@ static int i2c_pxa_probe(struct platform_device *dev) pxa_gpio_mode(GPIO117_I2CSCL_MD); pxa_gpio_mode(GPIO118_I2CSDA_MD); #endif - pxa_set_cken(CKEN14_I2C, 1); + pxa_set_cken(CKEN_I2C, 1); break; #ifdef CONFIG_PXA27x case 1: local_irq_disable(); PCFR |= PCFR_PI2CEN; local_irq_enable(); - pxa_set_cken(CKEN15_PWRI2C, 1); + pxa_set_cken(CKEN_PWRI2C, 1); #endif } @@ -935,11 +935,11 @@ eadapt: ereqirq: switch (dev->id) { case 0: - pxa_set_cken(CKEN14_I2C, 0); + pxa_set_cken(CKEN_I2C, 0); break; #ifdef CONFIG_PXA27x case 1: - pxa_set_cken(CKEN15_PWRI2C, 0); + pxa_set_cken(CKEN_PWRI2C, 0); local_irq_disable(); PCFR &= ~PCFR_PI2CEN; local_irq_enable(); @@ -962,11 +962,11 @@ static int i2c_pxa_remove(struct platform_device *dev) free_irq(i2c->irq, i2c); switch (dev->id) { case 0: - pxa_set_cken(CKEN14_I2C, 0); + pxa_set_cken(CKEN_I2C, 0); break; #ifdef CONFIG_PXA27x case 1: - pxa_set_cken(CKEN15_PWRI2C, 0); + pxa_set_cken(CKEN_PWRI2C, 0); local_irq_disable(); PCFR &= ~PCFR_PI2CEN; local_irq_enable(); diff --git a/drivers/mmc/pxamci.c b/drivers/mmc/pxamci.c index 9774fc68b61a..fca894e55f4a 100644 --- a/drivers/mmc/pxamci.c +++ b/drivers/mmc/pxamci.c @@ -369,14 +369,14 @@ static void pxamci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) if (CLOCKRATE / clk > ios->clock) clk <<= 1; host->clkrt = fls(clk) - 1; - pxa_set_cken(CKEN12_MMC, 1); + pxa_set_cken(CKEN_MMC, 1); /* * we write clkrt on the next command */ } else { pxamci_stop_clock(host); - pxa_set_cken(CKEN12_MMC, 0); + pxa_set_cken(CKEN_MMC, 0); } if (host->power_mode != ios->power_mode) { diff --git a/drivers/net/irda/pxaficp_ir.c b/drivers/net/irda/pxaficp_ir.c index 2272156af31e..d6d5361f0936 100644 --- a/drivers/net/irda/pxaficp_ir.c +++ b/drivers/net/irda/pxaficp_ir.c @@ -134,7 +134,7 @@ static int pxa_irda_set_speed(struct pxa_irda *si, int speed) DCSR(si->rxdma) &= ~DCSR_RUN; /* disable FICP */ ICCR0 = 0; - pxa_set_cken(CKEN13_FICP, 0); + pxa_set_cken(CKEN_FICP, 0); /* set board transceiver to SIR mode */ si->pdata->transceiver_mode(si->dev, IR_SIRMODE); @@ -144,7 +144,7 @@ static int pxa_irda_set_speed(struct pxa_irda *si, int speed) pxa_gpio_mode(GPIO47_STTXD_MD); /* enable the STUART clock */ - pxa_set_cken(CKEN5_STUART, 1); + pxa_set_cken(CKEN_STUART, 1); } /* disable STUART first */ @@ -169,7 +169,7 @@ static int pxa_irda_set_speed(struct pxa_irda *si, int speed) /* disable STUART */ STIER = 0; STISR = 0; - pxa_set_cken(CKEN5_STUART, 0); + pxa_set_cken(CKEN_STUART, 0); /* disable FICP first */ ICCR0 = 0; @@ -182,7 +182,7 @@ static int pxa_irda_set_speed(struct pxa_irda *si, int speed) pxa_gpio_mode(GPIO47_ICPTXD_MD); /* enable the FICP clock */ - pxa_set_cken(CKEN13_FICP, 1); + pxa_set_cken(CKEN_FICP, 1); si->speed = speed; pxa_irda_fir_dma_rx_start(si); @@ -593,7 +593,7 @@ static void pxa_irda_shutdown(struct pxa_irda *si) /* disable STUART SIR mode */ STISR = 0; /* disable the STUART clock */ - pxa_set_cken(CKEN5_STUART, 0); + pxa_set_cken(CKEN_STUART, 0); /* disable DMA */ DCSR(si->txdma) &= ~DCSR_RUN; @@ -601,7 +601,7 @@ static void pxa_irda_shutdown(struct pxa_irda *si) /* disable FICP */ ICCR0 = 0; /* disable the FICP clock */ - pxa_set_cken(CKEN13_FICP, 0); + pxa_set_cken(CKEN_FICP, 0); DRCMR17 = 0; DRCMR18 = 0; diff --git a/drivers/serial/pxa.c b/drivers/serial/pxa.c index d403aaa55092..e9c6cb391a23 100644 --- a/drivers/serial/pxa.c +++ b/drivers/serial/pxa.c @@ -717,7 +717,7 @@ struct uart_ops serial_pxa_pops = { static struct uart_pxa_port serial_pxa_ports[] = { { /* FFUART */ .name = "FFUART", - .cken = CKEN6_FFUART, + .cken = CKEN_FFUART, .port = { .type = PORT_PXA, .iotype = UPIO_MEM, @@ -731,7 +731,7 @@ static struct uart_pxa_port serial_pxa_ports[] = { }, }, { /* BTUART */ .name = "BTUART", - .cken = CKEN7_BTUART, + .cken = CKEN_BTUART, .port = { .type = PORT_PXA, .iotype = UPIO_MEM, @@ -745,7 +745,7 @@ static struct uart_pxa_port serial_pxa_ports[] = { }, }, { /* STUART */ .name = "STUART", - .cken = CKEN5_STUART, + .cken = CKEN_STUART, .port = { .type = PORT_PXA, .iotype = UPIO_MEM, @@ -759,7 +759,7 @@ static struct uart_pxa_port serial_pxa_ports[] = { }, }, { /* HWUART */ .name = "HWUART", - .cken = CKEN4_HWUART, + .cken = CKEN_HWUART, .port = { .type = PORT_PXA, .iotype = UPIO_MEM, diff --git a/drivers/usb/gadget/pxa2xx_udc.c b/drivers/usb/gadget/pxa2xx_udc.c index f01890dc8751..018b0d65765a 100644 --- a/drivers/usb/gadget/pxa2xx_udc.c +++ b/drivers/usb/gadget/pxa2xx_udc.c @@ -1497,7 +1497,7 @@ static void udc_disable(struct pxa2xx_udc *dev) #ifdef CONFIG_ARCH_PXA /* Disable clock for USB device */ - pxa_set_cken(CKEN11_USB, 0); + pxa_set_cken(CKEN_USB, 0); #endif ep0_idle (dev); @@ -1543,7 +1543,7 @@ static void udc_enable (struct pxa2xx_udc *dev) #ifdef CONFIG_ARCH_PXA /* Enable clock for USB device */ - pxa_set_cken(CKEN11_USB, 1); + pxa_set_cken(CKEN_USB, 1); udelay(5); #endif diff --git a/drivers/usb/host/ohci-pxa27x.c b/drivers/usb/host/ohci-pxa27x.c index f1563dc319d3..23d2fe5a62f4 100644 --- a/drivers/usb/host/ohci-pxa27x.c +++ b/drivers/usb/host/ohci-pxa27x.c @@ -80,7 +80,7 @@ static int pxa27x_start_hc(struct device *dev) inf = dev->platform_data; - pxa_set_cken(CKEN10_USBHOST, 1); + pxa_set_cken(CKEN_USBHOST, 1); UHCHR |= UHCHR_FHR; udelay(11); @@ -123,7 +123,7 @@ static void pxa27x_stop_hc(struct device *dev) UHCCOMS |= 1; udelay(10); - pxa_set_cken(CKEN10_USBHOST, 0); + pxa_set_cken(CKEN_USBHOST, 0); } diff --git a/drivers/video/pxafb.c b/drivers/video/pxafb.c index b4947c810706..0b195f33f84f 100644 --- a/drivers/video/pxafb.c +++ b/drivers/video/pxafb.c @@ -803,7 +803,7 @@ static void pxafb_enable_controller(struct pxafb_info *fbi) pr_debug("reg_lccr3 0x%08x\n", (unsigned int) fbi->reg_lccr3); /* enable LCD controller clock */ - pxa_set_cken(CKEN16_LCD, 1); + pxa_set_cken(CKEN_LCD, 1); /* Sequence from 11.7.10 */ LCCR3 = fbi->reg_lccr3; @@ -840,7 +840,7 @@ static void pxafb_disable_controller(struct pxafb_info *fbi) remove_wait_queue(&fbi->ctrlr_wait, &wait); /* disable LCD controller clock */ - pxa_set_cken(CKEN16_LCD, 0); + pxa_set_cken(CKEN_LCD, 0); } /* diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h index 139c9d954818..dbcc9298b0c8 100644 --- a/include/asm-arm/arch-pxa/pxa-regs.h +++ b/include/asm-arm/arch-pxa/pxa-regs.h @@ -1801,35 +1801,35 @@ #define CCCR_M_MASK 0x0060 /* Memory Frequency to Run Mode Frequency Multiplier */ #define CCCR_L_MASK 0x001f /* Crystal Frequency to Memory Frequency Multiplier */ -#define CKEN24_CAMERA (1 << 24) /* Camera Interface Clock Enable */ -#define CKEN23_SSP1 (1 << 23) /* SSP1 Unit Clock Enable */ -#define CKEN22_MEMC (1 << 22) /* Memory Controller Clock Enable */ -#define CKEN21_MEMSTK (1 << 21) /* Memory Stick Host Controller */ -#define CKEN20_IM (1 << 20) /* Internal Memory Clock Enable */ -#define CKEN19_KEYPAD (1 << 19) /* Keypad Interface Clock Enable */ -#define CKEN18_USIM (1 << 18) /* USIM Unit Clock Enable */ -#define CKEN17_MSL (1 << 17) /* MSL Unit Clock Enable */ -#define CKEN16_LCD (1 << 16) /* LCD Unit Clock Enable */ -#define CKEN15_PWRI2C (1 << 15) /* PWR I2C Unit Clock Enable */ -#define CKEN14_I2C (1 << 14) /* I2C Unit Clock Enable */ -#define CKEN13_FICP (1 << 13) /* FICP Unit Clock Enable */ -#define CKEN12_MMC (1 << 12) /* MMC Unit Clock Enable */ -#define CKEN11_USB (1 << 11) /* USB Unit Clock Enable */ -#define CKEN10_ASSP (1 << 10) /* ASSP (SSP3) Clock Enable */ -#define CKEN10_USBHOST (1 << 10) /* USB Host Unit Clock Enable */ -#define CKEN9_OSTIMER (1 << 9) /* OS Timer Unit Clock Enable */ -#define CKEN9_NSSP (1 << 9) /* NSSP (SSP2) Clock Enable */ -#define CKEN8_I2S (1 << 8) /* I2S Unit Clock Enable */ -#define CKEN7_BTUART (1 << 7) /* BTUART Unit Clock Enable */ -#define CKEN6_FFUART (1 << 6) /* FFUART Unit Clock Enable */ -#define CKEN5_STUART (1 << 5) /* STUART Unit Clock Enable */ -#define CKEN4_HWUART (1 << 4) /* HWUART Unit Clock Enable */ -#define CKEN4_SSP3 (1 << 4) /* SSP3 Unit Clock Enable */ -#define CKEN3_SSP (1 << 3) /* SSP Unit Clock Enable */ -#define CKEN3_SSP2 (1 << 3) /* SSP2 Unit Clock Enable */ -#define CKEN2_AC97 (1 << 2) /* AC97 Unit Clock Enable */ -#define CKEN1_PWM1 (1 << 1) /* PWM1 Clock Enable */ -#define CKEN0_PWM0 (1 << 0) /* PWM0 Clock Enable */ +#define CKEN_CAMERA (24) /* Camera Interface Clock Enable */ +#define CKEN_SSP1 (23) /* SSP1 Unit Clock Enable */ +#define CKEN_MEMC (22) /* Memory Controller Clock Enable */ +#define CKEN_MEMSTK (21) /* Memory Stick Host Controller */ +#define CKEN_IM (20) /* Internal Memory Clock Enable */ +#define CKEN_KEYPAD (19) /* Keypad Interface Clock Enable */ +#define CKEN_USIM (18) /* USIM Unit Clock Enable */ +#define CKEN_MSL (17) /* MSL Unit Clock Enable */ +#define CKEN_LCD (16) /* LCD Unit Clock Enable */ +#define CKEN_PWRI2C (15) /* PWR I2C Unit Clock Enable */ +#define CKEN_I2C (14) /* I2C Unit Clock Enable */ +#define CKEN_FICP (13) /* FICP Unit Clock Enable */ +#define CKEN_MMC (12) /* MMC Unit Clock Enable */ +#define CKEN_USB (11) /* USB Unit Clock Enable */ +#define CKEN_ASSP (10) /* ASSP (SSP3) Clock Enable */ +#define CKEN_USBHOST (10) /* USB Host Unit Clock Enable */ +#define CKEN_OSTIMER (9) /* OS Timer Unit Clock Enable */ +#define CKEN_NSSP (9) /* NSSP (SSP2) Clock Enable */ +#define CKEN_I2S (8) /* I2S Unit Clock Enable */ +#define CKEN_BTUART (7) /* BTUART Unit Clock Enable */ +#define CKEN_FFUART (6) /* FFUART Unit Clock Enable */ +#define CKEN_STUART (5) /* STUART Unit Clock Enable */ +#define CKEN_HWUART (4) /* HWUART Unit Clock Enable */ +#define CKEN_SSP3 (4) /* SSP3 Unit Clock Enable */ +#define CKEN_SSP (3) /* SSP Unit Clock Enable */ +#define CKEN_SSP2 (3) /* SSP2 Unit Clock Enable */ +#define CKEN_AC97 (2) /* AC97 Unit Clock Enable */ +#define CKEN_PWM1 (1) /* PWM1 Clock Enable */ +#define CKEN_PWM0 (0) /* PWM0 Clock Enable */ #define OSCC_OON (1 << 1) /* 32.768kHz OON (write-once only bit) */ #define OSCC_OOK (1 << 0) /* 32.768kHz OOK (read-only bit) */ diff --git a/sound/arm/pxa2xx-ac97.c b/sound/arm/pxa2xx-ac97.c index 28db4be7a16f..19c65a8d86a7 100644 --- a/sound/arm/pxa2xx-ac97.c +++ b/sound/arm/pxa2xx-ac97.c @@ -260,7 +260,7 @@ static int pxa2xx_ac97_do_suspend(struct snd_card *card, pm_message_t state) if (platform_ops && platform_ops->suspend) platform_ops->suspend(platform_ops->priv); GCR |= GCR_ACLINK_OFF; - pxa_set_cken(CKEN2_AC97, 0); + pxa_set_cken(CKEN_AC97, 0); return 0; } @@ -269,7 +269,7 @@ static int pxa2xx_ac97_do_resume(struct snd_card *card) { pxa2xx_audio_ops_t *platform_ops = card->dev->platform_data; - pxa_set_cken(CKEN2_AC97, 1); + pxa_set_cken(CKEN_AC97, 1); if (platform_ops && platform_ops->resume) platform_ops->resume(platform_ops->priv); snd_ac97_resume(pxa2xx_ac97_ac97); @@ -337,7 +337,7 @@ static int __devinit pxa2xx_ac97_probe(struct platform_device *dev) /* Use GPIO 113 as AC97 Reset on Bulverde */ pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT); #endif - pxa_set_cken(CKEN2_AC97, 1); + pxa_set_cken(CKEN_AC97, 1); ret = snd_ac97_bus(card, 0, &pxa2xx_ac97_ops, NULL, &ac97_bus); if (ret) @@ -361,10 +361,10 @@ static int __devinit pxa2xx_ac97_probe(struct platform_device *dev) err: if (card) snd_card_free(card); - if (CKEN & CKEN2_AC97) { + if (CKEN & CKEN_AC97) { GCR |= GCR_ACLINK_OFF; free_irq(IRQ_AC97, NULL); - pxa_set_cken(CKEN2_AC97, 0); + pxa_set_cken(CKEN_AC97, 0); } return ret; } @@ -378,7 +378,7 @@ static int __devexit pxa2xx_ac97_remove(struct platform_device *dev) platform_set_drvdata(dev, NULL); GCR |= GCR_ACLINK_OFF; free_irq(IRQ_AC97, NULL); - pxa_set_cken(CKEN2_AC97, 0); + pxa_set_cken(CKEN_AC97, 0); } return 0; diff --git a/sound/soc/pxa/pxa2xx-ac97.c b/sound/soc/pxa/pxa2xx-ac97.c index 1bbbeff84ef0..b222755763e7 100644 --- a/sound/soc/pxa/pxa2xx-ac97.c +++ b/sound/soc/pxa/pxa2xx-ac97.c @@ -256,7 +256,7 @@ static int pxa2xx_ac97_suspend(struct platform_device *pdev, struct snd_soc_cpu_dai *dai) { GCR |= GCR_ACLINK_OFF; - pxa_set_cken(CKEN2_AC97, 0); + pxa_set_cken(CKEN_AC97, 0); return 0; } @@ -271,7 +271,7 @@ static int pxa2xx_ac97_resume(struct platform_device *pdev, /* Use GPIO 113 as AC97 Reset on Bulverde */ pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT); #endif - pxa_set_cken(CKEN2_AC97, 1); + pxa_set_cken(CKEN_AC97, 1); return 0; } @@ -296,14 +296,14 @@ static int pxa2xx_ac97_probe(struct platform_device *pdev) /* Use GPIO 113 as AC97 Reset on Bulverde */ pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT); #endif - pxa_set_cken(CKEN2_AC97, 1); + pxa_set_cken(CKEN_AC97, 1); return 0; err: - if (CKEN & CKEN2_AC97) { + if (CKEN & CKEN_AC97) { GCR |= GCR_ACLINK_OFF; free_irq(IRQ_AC97, NULL); - pxa_set_cken(CKEN2_AC97, 0); + pxa_set_cken(CKEN_AC97, 0); } return ret; } @@ -312,7 +312,7 @@ static void pxa2xx_ac97_remove(struct platform_device *pdev) { GCR |= GCR_ACLINK_OFF; free_irq(IRQ_AC97, NULL); - pxa_set_cken(CKEN2_AC97, 0); + pxa_set_cken(CKEN_AC97, 0); } static int pxa2xx_ac97_hw_params(struct snd_pcm_substream *substream, diff --git a/sound/soc/pxa/pxa2xx-i2s.c b/sound/soc/pxa/pxa2xx-i2s.c index 575a6137c040..50c5c83f67db 100644 --- a/sound/soc/pxa/pxa2xx-i2s.c +++ b/sound/soc/pxa/pxa2xx-i2s.c @@ -149,7 +149,7 @@ static int pxa2xx_i2s_hw_params(struct snd_pcm_substream *substream, pxa_gpio_mode(gpio_bus[pxa_i2s.master].tx); pxa_gpio_mode(gpio_bus[pxa_i2s.master].frm); pxa_gpio_mode(gpio_bus[pxa_i2s.master].clk); - pxa_set_cken(CKEN8_I2S, 1); + pxa_set_cken(CKEN_I2S, 1); pxa_i2s_wait(); if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) @@ -234,7 +234,7 @@ static void pxa2xx_i2s_shutdown(struct snd_pcm_substream *substream) if (SACR1 & (SACR1_DREC | SACR1_DRPL)) { SACR0 &= ~SACR0_ENB; pxa_i2s_wait(); - pxa_set_cken(CKEN8_I2S, 0); + pxa_set_cken(CKEN_I2S, 0); } } -- cgit v1.2.3-59-g8ed1b From 56fca7cc337752e3d31e107db050f7fff2402e7d Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Thu, 26 Apr 2007 12:11:24 +0100 Subject: [ARM] 4330/1: S3C24XX: add S3C2410_UDC_FUNCADDR_UPDATE Add definition for S3C2410_UDC_FUNCADDR_UDPATE register definition for UDC driver. Signed-off-by: Ben Dooks Signed-off-by: Russell King --- include/asm-arm/arch-s3c2410/regs-udc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-arm/arch-s3c2410/regs-udc.h b/include/asm-arm/arch-s3c2410/regs-udc.h index 3c8354619b60..26be920049eb 100644 --- a/include/asm-arm/arch-s3c2410/regs-udc.h +++ b/include/asm-arm/arch-s3c2410/regs-udc.h @@ -75,7 +75,7 @@ #define S3C2410_UDC_OUT_FIFO_CNT1_REG S3C2410_USBDREG(0x0198) #define S3C2410_UDC_OUT_FIFO_CNT2_REG S3C2410_USBDREG(0x019c) - +#define S3C2410_UDC_FUNCADDR_UPDATE (1<<7) #define S3C2410_UDC_PWR_ISOUP (1<<7) // R/W #define S3C2410_UDC_PWR_RESET (1<<3) // R -- cgit v1.2.3-59-g8ed1b From 7dcad376e85b6eff56f29ee21e10e1fe855f1ed7 Mon Sep 17 00:00:00 2001 From: Dan Williams Date: Sun, 29 Apr 2007 09:31:51 +0100 Subject: [ARM] 4341/1: iop13xx: fix i/o address translation PCI devices were being programmed with an incorrect base address value. This patch moves I/O space into a 16-bit addressable region and corrects the i/o offset. Much thanks to Martin Michlmayr for tracking this issue and testing debug patches. Cc: Martin Michlmayr Signed-off-by: Dan Williams Signed-off-by: Russell King --- arch/arm/mach-iop13xx/pci.c | 8 ++++---- include/asm-arm/arch-iop13xx/iop13xx.h | 22 +++++++++++++--------- 2 files changed, 17 insertions(+), 13 deletions(-) (limited to 'include') diff --git a/arch/arm/mach-iop13xx/pci.c b/arch/arm/mach-iop13xx/pci.c index 89ec70ea3187..d907a2aadfe6 100644 --- a/arch/arm/mach-iop13xx/pci.c +++ b/arch/arm/mach-iop13xx/pci.c @@ -1023,7 +1023,7 @@ int iop13xx_pci_setup(int nr, struct pci_sys_data *sys) << IOP13XX_ATUX_PCIXSR_FUNC_NUM; __raw_writel(pcixsr, IOP13XX_ATUX_PCIXSR); - res[0].start = IOP13XX_PCIX_LOWER_IO_PA; + res[0].start = IOP13XX_PCIX_LOWER_IO_PA + IOP13XX_PCIX_IO_BUS_OFFSET; res[0].end = IOP13XX_PCIX_UPPER_IO_PA; res[0].name = "IQ81340 ATUX PCI I/O Space"; res[0].flags = IORESOURCE_IO; @@ -1033,7 +1033,7 @@ int iop13xx_pci_setup(int nr, struct pci_sys_data *sys) res[1].name = "IQ81340 ATUX PCI Memory Space"; res[1].flags = IORESOURCE_MEM; sys->mem_offset = IOP13XX_PCIX_MEM_OFFSET; - sys->io_offset = IOP13XX_PCIX_IO_OFFSET; + sys->io_offset = IOP13XX_PCIX_LOWER_IO_PA; break; case IOP13XX_INIT_ATU_ATUE: /* Note: the function number field in the PCSR is ro */ @@ -1044,7 +1044,7 @@ int iop13xx_pci_setup(int nr, struct pci_sys_data *sys) __raw_writel(pcsr, IOP13XX_ATUE_PCSR); - res[0].start = IOP13XX_PCIE_LOWER_IO_PA; + res[0].start = IOP13XX_PCIE_LOWER_IO_PA + IOP13XX_PCIE_IO_BUS_OFFSET; res[0].end = IOP13XX_PCIE_UPPER_IO_PA; res[0].name = "IQ81340 ATUE PCI I/O Space"; res[0].flags = IORESOURCE_IO; @@ -1054,7 +1054,7 @@ int iop13xx_pci_setup(int nr, struct pci_sys_data *sys) res[1].name = "IQ81340 ATUE PCI Memory Space"; res[1].flags = IORESOURCE_MEM; sys->mem_offset = IOP13XX_PCIE_MEM_OFFSET; - sys->io_offset = IOP13XX_PCIE_IO_OFFSET; + sys->io_offset = IOP13XX_PCIE_LOWER_IO_PA; sys->map_irq = iop13xx_pcie_map_irq; break; default: diff --git a/include/asm-arm/arch-iop13xx/iop13xx.h b/include/asm-arm/arch-iop13xx/iop13xx.h index d26b755a9879..2d1e23ba67c6 100644 --- a/include/asm-arm/arch-iop13xx/iop13xx.h +++ b/include/asm-arm/arch-iop13xx/iop13xx.h @@ -27,19 +27,24 @@ static inline int iop13xx_cpu_id(void) #define IOP13XX_PCI_OFFSET IOP13XX_MAX_RAM_SIZE /* PCI MAP - * 0x0000.0000 - 0x8000.0000 1:1 mapping with Physical RAM - * 0x8000.0000 - 0x8800.0000 PCIX/PCIE memory window (128MB) -*/ + * bus range cpu phys cpu virt note + * 0x0000.0000 + 2GB (n/a) (n/a) inbound, 1:1 mapping with Physical RAM + * 0x8000.0000 + 928M 0x1.8000.0000 (ioremap) PCIX outbound memory window + * 0x8000.0000 + 928M 0x2.8000.0000 (ioremap) PCIE outbound memory window + * + * IO MAP + * 0x1000 + 64K 0x0.fffb.1000 0xfec6.1000 PCIX outbound i/o window + * 0x1000 + 64K 0x0.fffd.1000 0xfed7.1000 PCIE outbound i/o window + */ #define IOP13XX_PCIX_IO_WINDOW_SIZE 0x10000UL #define IOP13XX_PCIX_LOWER_IO_PA 0xfffb0000UL #define IOP13XX_PCIX_LOWER_IO_VA 0xfec60000UL -#define IOP13XX_PCIX_LOWER_IO_BA 0x0fff0000UL +#define IOP13XX_PCIX_LOWER_IO_BA 0x0UL /* OIOTVR */ +#define IOP13XX_PCIX_IO_BUS_OFFSET 0x1000UL #define IOP13XX_PCIX_UPPER_IO_PA (IOP13XX_PCIX_LOWER_IO_PA +\ IOP13XX_PCIX_IO_WINDOW_SIZE - 1) #define IOP13XX_PCIX_UPPER_IO_VA (IOP13XX_PCIX_LOWER_IO_VA +\ IOP13XX_PCIX_IO_WINDOW_SIZE - 1) -#define IOP13XX_PCIX_IO_OFFSET (IOP13XX_PCIX_LOWER_IO_VA -\ - IOP13XX_PCIX_LOWER_IO_BA) #define IOP13XX_PCIX_IO_PHYS_TO_VIRT(addr) (u32) ((u32) addr -\ (IOP13XX_PCIX_LOWER_IO_PA\ - IOP13XX_PCIX_LOWER_IO_VA)) @@ -65,15 +70,14 @@ static inline int iop13xx_cpu_id(void) #define IOP13XX_PCIE_IO_WINDOW_SIZE 0x10000UL #define IOP13XX_PCIE_LOWER_IO_PA 0xfffd0000UL #define IOP13XX_PCIE_LOWER_IO_VA 0xfed70000UL -#define IOP13XX_PCIE_LOWER_IO_BA 0x0fff0000UL +#define IOP13XX_PCIE_LOWER_IO_BA 0x0UL /* OIOTVR */ +#define IOP13XX_PCIE_IO_BUS_OFFSET 0x1000UL #define IOP13XX_PCIE_UPPER_IO_PA (IOP13XX_PCIE_LOWER_IO_PA +\ IOP13XX_PCIE_IO_WINDOW_SIZE - 1) #define IOP13XX_PCIE_UPPER_IO_VA (IOP13XX_PCIE_LOWER_IO_VA +\ IOP13XX_PCIE_IO_WINDOW_SIZE - 1) #define IOP13XX_PCIE_UPPER_IO_BA (IOP13XX_PCIE_LOWER_IO_BA +\ IOP13XX_PCIE_IO_WINDOW_SIZE - 1) -#define IOP13XX_PCIE_IO_OFFSET (IOP13XX_PCIE_LOWER_IO_VA -\ - IOP13XX_PCIE_LOWER_IO_BA) #define IOP13XX_PCIE_IO_PHYS_TO_VIRT(addr) (u32) ((u32) addr -\ (IOP13XX_PCIE_LOWER_IO_PA\ - IOP13XX_PCIE_LOWER_IO_VA)) -- cgit v1.2.3-59-g8ed1b From 84c981ffb371828ad6d1d220f076453b54734302 Mon Sep 17 00:00:00 2001 From: Dan Williams Date: Sun, 29 Apr 2007 09:32:51 +0100 Subject: [ARM] 4343/1: iop13xx: automatically detect the internal bus frequency Signed-off-by: Dan Williams Signed-off-by: Russell King --- arch/arm/mach-iop13xx/iq81340mc.c | 4 ++- arch/arm/mach-iop13xx/iq81340sc.c | 4 ++- include/asm-arm/arch-iop13xx/iop13xx.h | 1 + include/asm-arm/arch-iop13xx/time.h | 56 ++++++++++++++++++++++++++++++++++ 4 files changed, 63 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/arch/arm/mach-iop13xx/iq81340mc.c b/arch/arm/mach-iop13xx/iq81340mc.c index a519d707571c..1ae08cc04b48 100644 --- a/arch/arm/mach-iop13xx/iq81340mc.c +++ b/arch/arm/mach-iop13xx/iq81340mc.c @@ -79,7 +79,9 @@ static void __init iq81340mc_init(void) static void __init iq81340mc_timer_init(void) { - iop_init_time(400000000); + unsigned long bus_freq = iop13xx_core_freq() / iop13xx_xsi_bus_ratio(); + printk(KERN_DEBUG "%s: bus frequency: %lu\n", __FUNCTION__, bus_freq); + iop_init_time(bus_freq); } static struct sys_timer iq81340mc_timer = { diff --git a/arch/arm/mach-iop13xx/iq81340sc.c b/arch/arm/mach-iop13xx/iq81340sc.c index 0e71fbcabe00..0f8801406f23 100644 --- a/arch/arm/mach-iop13xx/iq81340sc.c +++ b/arch/arm/mach-iop13xx/iq81340sc.c @@ -81,7 +81,9 @@ static void __init iq81340sc_init(void) static void __init iq81340sc_timer_init(void) { - iop_init_time(400000000); + unsigned long bus_freq = iop13xx_core_freq() / iop13xx_xsi_bus_ratio(); + printk(KERN_DEBUG "%s: bus frequency: %lu\n", __FUNCTION__, bus_freq); + iop_init_time(bus_freq); } static struct sys_timer iq81340sc_timer = { diff --git a/include/asm-arm/arch-iop13xx/iop13xx.h b/include/asm-arm/arch-iop13xx/iop13xx.h index 2d1e23ba67c6..c8762ae8f628 100644 --- a/include/asm-arm/arch-iop13xx/iop13xx.h +++ b/include/asm-arm/arch-iop13xx/iop13xx.h @@ -455,4 +455,5 @@ static inline int iop13xx_cpu_id(void) #define IOP13XX_PBI_BAR1 IOP13XX_PBI_OFFSET(0x10) #define IOP13XX_PBI_LR1 IOP13XX_PBI_OFFSET(0x14) +#define IOP13XX_PROCESSOR_FREQ IOP13XX_REG_ADDR32(0x2180) #endif /* _IOP13XX_HW_H_ */ diff --git a/include/asm-arm/arch-iop13xx/time.h b/include/asm-arm/arch-iop13xx/time.h index 77a837a02dec..49213d9d7cad 100644 --- a/include/asm-arm/arch-iop13xx/time.h +++ b/include/asm-arm/arch-iop13xx/time.h @@ -7,9 +7,65 @@ #define IOP_TMR_PRIVILEGED 0x08 #define IOP_TMR_RATIO_1_1 0x00 +#define IOP13XX_XSI_FREQ_RATIO_MASK (3 << 19) +#define IOP13XX_XSI_FREQ_RATIO_2 (0 << 19) +#define IOP13XX_XSI_FREQ_RATIO_3 (1 << 19) +#define IOP13XX_XSI_FREQ_RATIO_4 (2 << 19) +#define IOP13XX_CORE_FREQ_MASK (7 << 16) +#define IOP13XX_CORE_FREQ_600 (0 << 16) +#define IOP13XX_CORE_FREQ_667 (1 << 16) +#define IOP13XX_CORE_FREQ_800 (2 << 16) +#define IOP13XX_CORE_FREQ_933 (3 << 16) +#define IOP13XX_CORE_FREQ_1000 (4 << 16) +#define IOP13XX_CORE_FREQ_1200 (5 << 16) + void iop_init_time(unsigned long tickrate); unsigned long iop_gettimeoffset(void); +static inline unsigned long iop13xx_core_freq(void) +{ + unsigned long freq = __raw_readl(IOP13XX_PROCESSOR_FREQ); + freq &= IOP13XX_CORE_FREQ_MASK; + switch (freq) { + case IOP13XX_CORE_FREQ_600: + return 600000000; + case IOP13XX_CORE_FREQ_667: + return 667000000; + case IOP13XX_CORE_FREQ_800: + return 800000000; + case IOP13XX_CORE_FREQ_933: + return 933000000; + case IOP13XX_CORE_FREQ_1000: + return 1000000000; + case IOP13XX_CORE_FREQ_1200: + return 1200000000; + default: + printk("%s: warning unknown frequency, defaulting to 800Mhz\n", + __FUNCTION__); + } + + return 800000000; +} + +static inline unsigned long iop13xx_xsi_bus_ratio(void) +{ + unsigned long ratio = __raw_readl(IOP13XX_PROCESSOR_FREQ); + ratio &= IOP13XX_XSI_FREQ_RATIO_MASK; + switch (ratio) { + case IOP13XX_XSI_FREQ_RATIO_2: + return 2; + case IOP13XX_XSI_FREQ_RATIO_3: + return 3; + case IOP13XX_XSI_FREQ_RATIO_4: + return 4; + default: + printk("%s: warning unknown ratio, defaulting to 2\n", + __FUNCTION__); + } + + return 2; +} + static inline void write_tmr0(u32 val) { asm volatile("mcr p6, 0, %0, c0, c9, 0" : : "r" (val)); -- cgit v1.2.3-59-g8ed1b From e90ddd813df7897af34226ed1cd442f7a182816e Mon Sep 17 00:00:00 2001 From: Dan Williams Date: Wed, 2 May 2007 17:59:44 +0100 Subject: [ARM] 4348/4: iop3xx: Give Linux control over PCI initialization Currently the iop3xx platform support code assumes that RedBoot is the bootloader and has already initialized the ATU. Linux should handle this initialization for three reasons: 1/ The memory map that RedBoot sets up is not optimal (page_to_dma and virt_to_phys return different addresses). The effect of this is that using the dma mapping API for the internal bus dma units generates pci bus addresses that are incorrect for the internal bus. 2/ Not all iop platforms use RedBoot 3/ If the ATU is already initialized it indicates that the iop is an add-in card in another host, it does not own the PCI bus, and should not be re-initialized. Changelog: * rather than change nr_controllers to zero, simply do not call pci_common_init Cc: Lennert Buytenhek Signed-off-by: Dan Williams Signed-off-by: Russell King --- arch/arm/mach-iop32x/Kconfig | 8 ++ arch/arm/mach-iop32x/iq31244.c | 11 ++- arch/arm/mach-iop32x/iq80321.c | 3 +- arch/arm/mach-iop33x/Kconfig | 8 ++ arch/arm/mach-iop33x/iq80331.c | 3 +- arch/arm/mach-iop33x/iq80332.c | 3 +- arch/arm/plat-iop/pci.c | 140 ++++++++++++++++++++++++++++++++++- include/asm-arm/arch-iop32x/iop32x.h | 9 +++ include/asm-arm/arch-iop32x/memory.h | 4 +- include/asm-arm/arch-iop33x/iop33x.h | 10 +++ include/asm-arm/arch-iop33x/memory.h | 4 +- include/asm-arm/hardware/iop3xx.h | 22 +++++- 12 files changed, 209 insertions(+), 16 deletions(-) (limited to 'include') diff --git a/arch/arm/mach-iop32x/Kconfig b/arch/arm/mach-iop32x/Kconfig index 9dd49cff21ff..9bb02b6d7ae1 100644 --- a/arch/arm/mach-iop32x/Kconfig +++ b/arch/arm/mach-iop32x/Kconfig @@ -34,6 +34,14 @@ config MACH_N2100 Say Y here if you want to run your kernel on the Thecus n2100 NAS appliance. +config IOP3XX_ATU + bool "Enable the PCI Controller" + default y + help + Say Y here if you want the IOP to initialize its PCI Controller. + Say N if the IOP is an add in card, the host system owns the PCI + bus in this case. + endmenu endif diff --git a/arch/arm/mach-iop32x/iq31244.c b/arch/arm/mach-iop32x/iq31244.c index 60e74309a458..7b21c6e13e59 100644 --- a/arch/arm/mach-iop32x/iq31244.c +++ b/arch/arm/mach-iop32x/iq31244.c @@ -178,9 +178,10 @@ static struct hw_pci iq31244_pci __initdata = { static int __init iq31244_pci_init(void) { - if (is_ep80219()) - pci_common_init(&ep80219_pci); - else if (machine_is_iq31244()) { + if (is_ep80219()) { + if (iop3xx_get_init_atu() == IOP3XX_INIT_ATU_ENABLE) + pci_common_init(&ep80219_pci); + } else if (machine_is_iq31244()) { if (is_80219()) { printk("note: iq31244 board type has been selected\n"); printk("note: to select ep80219 operation:\n"); @@ -189,7 +190,9 @@ static int __init iq31244_pci_init(void) printk("\t2/ update boot loader to pass" " the ep80219 id: %d\n", MACH_TYPE_EP80219); } - pci_common_init(&iq31244_pci); + + if (iop3xx_get_init_atu() == IOP3XX_INIT_ATU_ENABLE) + pci_common_init(&iq31244_pci); } return 0; diff --git a/arch/arm/mach-iop32x/iq80321.c b/arch/arm/mach-iop32x/iq80321.c index 361c70c0f64c..bc25fb91e7b9 100644 --- a/arch/arm/mach-iop32x/iq80321.c +++ b/arch/arm/mach-iop32x/iq80321.c @@ -113,7 +113,8 @@ static struct hw_pci iq80321_pci __initdata = { static int __init iq80321_pci_init(void) { - if (machine_is_iq80321()) + if ((iop3xx_get_init_atu() == IOP3XX_INIT_ATU_ENABLE) && + machine_is_iq80321()) pci_common_init(&iq80321_pci); return 0; diff --git a/arch/arm/mach-iop33x/Kconfig b/arch/arm/mach-iop33x/Kconfig index 9aa016bb18f9..45598e096898 100644 --- a/arch/arm/mach-iop33x/Kconfig +++ b/arch/arm/mach-iop33x/Kconfig @@ -16,6 +16,14 @@ config MACH_IQ80332 Say Y here if you want to run your kernel on the Intel IQ80332 evaluation kit for the IOP332 chipset. +config IOP3XX_ATU + bool "Enable the PCI Controller" + default y + help + Say Y here if you want the IOP to initialize its PCI Controller. + Say N if the IOP is an add in card, the host system owns the PCI + bus in this case. + endmenu endif diff --git a/arch/arm/mach-iop33x/iq80331.c b/arch/arm/mach-iop33x/iq80331.c index 1a9e36138d80..376c932830be 100644 --- a/arch/arm/mach-iop33x/iq80331.c +++ b/arch/arm/mach-iop33x/iq80331.c @@ -96,7 +96,8 @@ static struct hw_pci iq80331_pci __initdata = { static int __init iq80331_pci_init(void) { - if (machine_is_iq80331()) + if ((iop3xx_get_init_atu() == IOP3XX_INIT_ATU_ENABLE) && + machine_is_iq80331()) pci_common_init(&iq80331_pci); return 0; diff --git a/arch/arm/mach-iop33x/iq80332.c b/arch/arm/mach-iop33x/iq80332.c index 96d6f0f3cd21..58c81496c6f6 100644 --- a/arch/arm/mach-iop33x/iq80332.c +++ b/arch/arm/mach-iop33x/iq80332.c @@ -96,7 +96,8 @@ static struct hw_pci iq80332_pci __initdata = { static int __init iq80332_pci_init(void) { - if (machine_is_iq80332()) + if ((iop3xx_get_init_atu() == IOP3XX_INIT_ATU_ENABLE) && + machine_is_iq80332()) pci_common_init(&iq80332_pci); return 0; diff --git a/arch/arm/plat-iop/pci.c b/arch/arm/plat-iop/pci.c index b5f6ec35aafb..e2744b7227c5 100644 --- a/arch/arm/plat-iop/pci.c +++ b/arch/arm/plat-iop/pci.c @@ -55,7 +55,7 @@ static u32 iop3xx_cfg_address(struct pci_bus *bus, int devfn, int where) * This routine checks the status of the last configuration cycle. If an error * was detected it returns a 1, else it returns a 0. The errors being checked * are parity, master abort, target abort (master and target). These types of - * errors occure during a config cycle where there is no device, like during + * errors occur during a config cycle where there is no device, like during * the discovery stage. */ static int iop3xx_pci_status(void) @@ -223,8 +223,111 @@ struct pci_bus *iop3xx_pci_scan_bus(int nr, struct pci_sys_data *sys) return pci_scan_bus(sys->busnr, &iop3xx_ops, sys); } +void __init iop3xx_atu_setup(void) +{ + /* BAR 0 ( Disabled ) */ + *IOP3XX_IAUBAR0 = 0x0; + *IOP3XX_IABAR0 = 0x0; + *IOP3XX_IATVR0 = 0x0; + *IOP3XX_IALR0 = 0x0; + + /* BAR 1 ( Disabled ) */ + *IOP3XX_IAUBAR1 = 0x0; + *IOP3XX_IABAR1 = 0x0; + *IOP3XX_IALR1 = 0x0; + + /* BAR 2 (1:1 mapping with Physical RAM) */ + /* Set limit and enable */ + *IOP3XX_IALR2 = ~((u32)IOP3XX_MAX_RAM_SIZE - 1) & ~0x1; + *IOP3XX_IAUBAR2 = 0x0; + + /* Align the inbound bar with the base of memory */ + *IOP3XX_IABAR2 = PHYS_OFFSET | + PCI_BASE_ADDRESS_MEM_TYPE_64 | + PCI_BASE_ADDRESS_MEM_PREFETCH; + + *IOP3XX_IATVR2 = PHYS_OFFSET; + + /* Outbound window 0 */ + *IOP3XX_OMWTVR0 = IOP3XX_PCI_LOWER_MEM_PA; + *IOP3XX_OUMWTVR0 = 0; + + /* Outbound window 1 */ + *IOP3XX_OMWTVR1 = IOP3XX_PCI_LOWER_MEM_PA + IOP3XX_PCI_MEM_WINDOW_SIZE; + *IOP3XX_OUMWTVR1 = 0; + + /* BAR 3 ( Disabled ) */ + *IOP3XX_IAUBAR3 = 0x0; + *IOP3XX_IABAR3 = 0x0; + *IOP3XX_IATVR3 = 0x0; + *IOP3XX_IALR3 = 0x0; + + /* Setup the I/O Bar + */ + *IOP3XX_OIOWTVR = IOP3XX_PCI_LOWER_IO_PA;; + + /* Enable inbound and outbound cycles + */ + *IOP3XX_ATUCMD |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | + PCI_COMMAND_PARITY | PCI_COMMAND_SERR; + *IOP3XX_ATUCR |= IOP3XX_ATUCR_OUT_EN; +} + +void __init iop3xx_atu_disable(void) +{ + *IOP3XX_ATUCMD = 0; + *IOP3XX_ATUCR = 0; + + /* wait for cycles to quiesce */ + while (*IOP3XX_PCSR & (IOP3XX_PCSR_OUT_Q_BUSY | + IOP3XX_PCSR_IN_Q_BUSY)) + cpu_relax(); + + /* BAR 0 ( Disabled ) */ + *IOP3XX_IAUBAR0 = 0x0; + *IOP3XX_IABAR0 = 0x0; + *IOP3XX_IATVR0 = 0x0; + *IOP3XX_IALR0 = 0x0; + + /* BAR 1 ( Disabled ) */ + *IOP3XX_IAUBAR1 = 0x0; + *IOP3XX_IABAR1 = 0x0; + *IOP3XX_IALR1 = 0x0; + + /* BAR 2 ( Disabled ) */ + *IOP3XX_IAUBAR2 = 0x0; + *IOP3XX_IABAR2 = 0x0; + *IOP3XX_IATVR2 = 0x0; + *IOP3XX_IALR2 = 0x0; + + /* BAR 3 ( Disabled ) */ + *IOP3XX_IAUBAR3 = 0x0; + *IOP3XX_IABAR3 = 0x0; + *IOP3XX_IATVR3 = 0x0; + *IOP3XX_IALR3 = 0x0; + + /* Clear the outbound windows */ + *IOP3XX_OIOWTVR = 0; + + /* Outbound window 0 */ + *IOP3XX_OMWTVR0 = 0; + *IOP3XX_OUMWTVR0 = 0; + + /* Outbound window 1 */ + *IOP3XX_OMWTVR1 = 0; + *IOP3XX_OUMWTVR1 = 0; +} + +/* Flag to determine whether the ATU is initialized and the PCI bus scanned */ +int init_atu; + void iop3xx_pci_preinit(void) { + if (iop3xx_get_init_atu() == IOP3XX_INIT_ATU_ENABLE) { + iop3xx_atu_disable(); + iop3xx_atu_setup(); + } + DBG("PCI: Intel 803xx PCI init code.\n"); DBG("ATU: IOP3XX_ATUCMD=0x%04x\n", *IOP3XX_ATUCMD); DBG("ATU: IOP3XX_OMWTVR0=0x%04x, IOP3XX_OIOWTVR=0x%04x\n", @@ -245,3 +348,38 @@ void iop3xx_pci_preinit(void) hook_fault_code(16+6, iop3xx_pci_abort, SIGBUS, "imprecise external abort"); } + +/* allow init_atu to be user overridden */ +static int __init iop3xx_init_atu_setup(char *str) +{ + init_atu = IOP3XX_INIT_ATU_DEFAULT; + if (str) { + while (*str != '\0') { + switch (*str) { + case 'y': + case 'Y': + init_atu = IOP3XX_INIT_ATU_ENABLE; + break; + case 'n': + case 'N': + init_atu = IOP3XX_INIT_ATU_DISABLE; + break; + case ',': + case '=': + break; + default: + printk(KERN_DEBUG "\"%s\" malformed at " + "character: \'%c\'", + __FUNCTION__, + *str); + *(str + 1) = '\0'; + } + str++; + } + } + + return 1; +} + +__setup("iop3xx_init_atu", iop3xx_init_atu_setup); + diff --git a/include/asm-arm/arch-iop32x/iop32x.h b/include/asm-arm/arch-iop32x/iop32x.h index 2e9469047eb1..0d8af57221a1 100644 --- a/include/asm-arm/arch-iop32x/iop32x.h +++ b/include/asm-arm/arch-iop32x/iop32x.h @@ -24,5 +24,14 @@ #include +/* ATU Parameters + * set up a 1:1 bus to physical ram relationship + * w/ physical ram on top of pci in the memory map + */ +#define IOP32X_MAX_RAM_SIZE 0x40000000UL +#define IOP3XX_MAX_RAM_SIZE IOP32X_MAX_RAM_SIZE +#define IOP3XX_PCI_LOWER_MEM_BA 0x80000000 +#define IOP32X_PCI_MEM_WINDOW_SIZE 0x04000000 +#define IOP3XX_PCI_MEM_WINDOW_SIZE IOP32X_PCI_MEM_WINDOW_SIZE #endif diff --git a/include/asm-arm/arch-iop32x/memory.h b/include/asm-arm/arch-iop32x/memory.h index 764cd3f0d416..c51072af214e 100644 --- a/include/asm-arm/arch-iop32x/memory.h +++ b/include/asm-arm/arch-iop32x/memory.h @@ -19,8 +19,8 @@ * bus_to_virt: Used to convert an address for DMA operations * to an address that the kernel can use. */ -#define __virt_to_bus(x) (((__virt_to_phys(x)) & ~(*IOP3XX_IATVR2)) | ((*IOP3XX_IABAR2) & 0xfffffff0)) -#define __bus_to_virt(x) (__phys_to_virt(((x) & ~(*IOP3XX_IALR2)) | ( *IOP3XX_IATVR2))) +#define __virt_to_bus(x) (__virt_to_phys(x)) +#define __bus_to_virt(x) (__phys_to_virt(x)) #endif diff --git a/include/asm-arm/arch-iop33x/iop33x.h b/include/asm-arm/arch-iop33x/iop33x.h index 7ac6e93db5ff..766985b9a723 100644 --- a/include/asm-arm/arch-iop33x/iop33x.h +++ b/include/asm-arm/arch-iop33x/iop33x.h @@ -29,5 +29,15 @@ #define IOP33X_UART1_PHYS (IOP3XX_PERIPHERAL_PHYS_BASE + 0x1740) #define IOP33X_UART1_VIRT (IOP3XX_PERIPHERAL_VIRT_BASE + 0x1740) +/* ATU Parameters + * set up a 1:1 bus to physical ram relationship + * w/ pci on top of physical ram in memory map + */ +#define IOP33X_MAX_RAM_SIZE 0x80000000UL +#define IOP3XX_MAX_RAM_SIZE IOP33X_MAX_RAM_SIZE +#define IOP3XX_PCI_LOWER_MEM_BA (PHYS_OFFSET + IOP33X_MAX_RAM_SIZE) +#define IOP33X_PCI_MEM_WINDOW_SIZE 0x08000000 +#define IOP3XX_PCI_MEM_WINDOW_SIZE IOP33X_PCI_MEM_WINDOW_SIZE + #endif diff --git a/include/asm-arm/arch-iop33x/memory.h b/include/asm-arm/arch-iop33x/memory.h index 0d39139b241e..c8749127d6ab 100644 --- a/include/asm-arm/arch-iop33x/memory.h +++ b/include/asm-arm/arch-iop33x/memory.h @@ -19,8 +19,8 @@ * bus_to_virt: Used to convert an address for DMA operations * to an address that the kernel can use. */ -#define __virt_to_bus(x) (((__virt_to_phys(x)) & ~(*IOP3XX_IATVR2)) | ((*IOP3XX_IABAR2) & 0xfffffff0)) -#define __bus_to_virt(x) (__phys_to_virt(((x) & ~(*IOP3XX_IALR2)) | ( *IOP3XX_IATVR2))) +#define __virt_to_bus(x) (__virt_to_phys(x)) +#define __bus_to_virt(x) (__phys_to_virt(x)) #endif diff --git a/include/asm-arm/hardware/iop3xx.h b/include/asm-arm/hardware/iop3xx.h index 15141a9caca8..ebbcd9be3fe5 100644 --- a/include/asm-arm/hardware/iop3xx.h +++ b/include/asm-arm/hardware/iop3xx.h @@ -28,6 +28,7 @@ extern void gpio_line_config(int line, int direction); extern int gpio_line_get(int line); extern void gpio_line_set(int line, int value); +extern int init_atu; #endif @@ -103,6 +104,21 @@ extern void gpio_line_set(int line, int value); #define IOP3XX_PCIXCMD (volatile u16 *)IOP3XX_REG_ADDR(0x01e2) #define IOP3XX_PCIXSR (volatile u32 *)IOP3XX_REG_ADDR(0x01e4) #define IOP3XX_PCIIRSR (volatile u32 *)IOP3XX_REG_ADDR(0x01ec) +#define IOP3XX_PCSR_OUT_Q_BUSY (1 << 15) +#define IOP3XX_PCSR_IN_Q_BUSY (1 << 14) +#define IOP3XX_ATUCR_OUT_EN (1 << 1) + +#define IOP3XX_INIT_ATU_DEFAULT 0 +#define IOP3XX_INIT_ATU_DISABLE -1 +#define IOP3XX_INIT_ATU_ENABLE 1 + +#ifdef CONFIG_IOP3XX_ATU +#define iop3xx_get_init_atu(x) (init_atu == IOP3XX_INIT_ATU_DEFAULT ?\ + IOP3XX_INIT_ATU_ENABLE : init_atu) +#else +#define iop3xx_get_init_atu(x) (init_atu == IOP3XX_INIT_ATU_DEFAULT ?\ + IOP3XX_INIT_ATU_DISABLE : init_atu) +#endif /* Messaging Unit */ #define IOP3XX_IMR0 (volatile u32 *)IOP3XX_REG_ADDR(0x0310) @@ -253,14 +269,12 @@ extern void gpio_line_set(int line, int value); /* * IOP3XX I/O and Mem space regions for PCI autoconfiguration */ -#define IOP3XX_PCI_MEM_WINDOW_SIZE 0x04000000 -#define IOP3XX_PCI_LOWER_MEM_PA 0x80000000 -#define IOP3XX_PCI_LOWER_MEM_BA (*IOP3XX_OMWTVR0) +#define IOP3XX_PCI_LOWER_MEM_PA 0x80000000 #define IOP3XX_PCI_IO_WINDOW_SIZE 0x00010000 #define IOP3XX_PCI_LOWER_IO_PA 0x90000000 #define IOP3XX_PCI_LOWER_IO_VA 0xfe000000 -#define IOP3XX_PCI_LOWER_IO_BA (*IOP3XX_OIOWTVR) +#define IOP3XX_PCI_LOWER_IO_BA 0x90000000 #define IOP3XX_PCI_UPPER_IO_PA (IOP3XX_PCI_LOWER_IO_PA +\ IOP3XX_PCI_IO_WINDOW_SIZE - 1) #define IOP3XX_PCI_UPPER_IO_VA (IOP3XX_PCI_LOWER_IO_VA +\ -- cgit v1.2.3-59-g8ed1b From d2dd8b1fed314d22c50965f78f6895117c4abfc8 Mon Sep 17 00:00:00 2001 From: Dan Williams Date: Wed, 2 May 2007 17:47:47 +0100 Subject: [ARM] 4342/2: iop13xx: add resource definitions for the tpmi units The tpmi units interface with the SAS controller on iop348. Signed-off-by: Dan Williams Signed-off-by: Russell King --- arch/arm/mach-iop13xx/Makefile | 1 + arch/arm/mach-iop13xx/iq81340mc.c | 1 + arch/arm/mach-iop13xx/iq81340sc.c | 1 + arch/arm/mach-iop13xx/tpmi.c | 234 +++++++++++++++++++++++++++++++++ include/asm-arm/arch-iop13xx/iop13xx.h | 1 + 5 files changed, 238 insertions(+) create mode 100644 arch/arm/mach-iop13xx/tpmi.c (limited to 'include') diff --git a/arch/arm/mach-iop13xx/Makefile b/arch/arm/mach-iop13xx/Makefile index 4185e0586c33..da1609dc0dee 100644 --- a/arch/arm/mach-iop13xx/Makefile +++ b/arch/arm/mach-iop13xx/Makefile @@ -7,5 +7,6 @@ obj-$(CONFIG_ARCH_IOP13XX) += setup.o obj-$(CONFIG_ARCH_IOP13XX) += irq.o obj-$(CONFIG_ARCH_IOP13XX) += pci.o obj-$(CONFIG_ARCH_IOP13XX) += io.o +obj-$(CONFIG_ARCH_IOP13XX) += tpmi.o obj-$(CONFIG_MACH_IQ81340SC) += iq81340sc.o obj-$(CONFIG_MACH_IQ81340MC) += iq81340mc.o diff --git a/arch/arm/mach-iop13xx/iq81340mc.c b/arch/arm/mach-iop13xx/iq81340mc.c index 1ae08cc04b48..268a8d84999c 100644 --- a/arch/arm/mach-iop13xx/iq81340mc.c +++ b/arch/arm/mach-iop13xx/iq81340mc.c @@ -75,6 +75,7 @@ static void __init iq81340mc_init(void) { iop13xx_platform_init(); iq81340mc_pci_init(); + iop13xx_add_tpmi_devices(); } static void __init iq81340mc_timer_init(void) diff --git a/arch/arm/mach-iop13xx/iq81340sc.c b/arch/arm/mach-iop13xx/iq81340sc.c index 0f8801406f23..a51ffd2683e5 100644 --- a/arch/arm/mach-iop13xx/iq81340sc.c +++ b/arch/arm/mach-iop13xx/iq81340sc.c @@ -77,6 +77,7 @@ static void __init iq81340sc_init(void) { iop13xx_platform_init(); iq81340sc_pci_init(); + iop13xx_add_tpmi_devices(); } static void __init iq81340sc_timer_init(void) diff --git a/arch/arm/mach-iop13xx/tpmi.c b/arch/arm/mach-iop13xx/tpmi.c new file mode 100644 index 000000000000..d3dc278213da --- /dev/null +++ b/arch/arm/mach-iop13xx/tpmi.c @@ -0,0 +1,234 @@ +/* + * iop13xx tpmi device resources + * Copyright (c) 2005-2006, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., 59 Temple + * Place - Suite 330, Boston, MA 02111-1307 USA. + * + */ + +#include +#include +#include +#include +#include +#include +#include + +/* assumes CONTROLLER_ONLY# is never asserted in the ESSR register */ +#define IOP13XX_TPMI_MMR(dev) IOP13XX_REG_ADDR32_PHYS(0x48000 + (dev << 12)) +#define IOP13XX_TPMI_MEM(dev) IOP13XX_REG_ADDR32_PHYS(0x60000 + (dev << 13)) +#define IOP13XX_TPMI_CTRL(dev) IOP13XX_REG_ADDR32_PHYS(0x50000 + (dev << 10)) +#define IOP13XX_TPMI_MMR_SIZE (SZ_4K - 1) +#define IOP13XX_TPMI_MEM_SIZE (255) +#define IOP13XX_TPMI_MEM_CTRL (SZ_1K - 1) +#define IOP13XX_TPMI_RESOURCE_MMR 0 +#define IOP13XX_TPMI_RESOURCE_MEM 1 +#define IOP13XX_TPMI_RESOURCE_CTRL 2 +#define IOP13XX_TPMI_RESOURCE_IRQ 3 + +static struct resource iop13xx_tpmi_0_resources[] = { + [IOP13XX_TPMI_RESOURCE_MMR] = { + .start = IOP13XX_TPMI_MMR(4), /* tpmi0 starts at dev == 4 */ + .end = IOP13XX_TPMI_MMR(4) + IOP13XX_TPMI_MMR_SIZE, + .flags = IORESOURCE_MEM, + }, + [IOP13XX_TPMI_RESOURCE_MEM] = { + .start = IOP13XX_TPMI_MEM(0), + .end = IOP13XX_TPMI_MEM(0) + IOP13XX_TPMI_MEM_SIZE, + .flags = IORESOURCE_MEM, + }, + [IOP13XX_TPMI_RESOURCE_CTRL] = { + .start = IOP13XX_TPMI_CTRL(0), + .end = IOP13XX_TPMI_CTRL(0) + IOP13XX_TPMI_MEM_CTRL, + .flags = IORESOURCE_MEM, + }, + [IOP13XX_TPMI_RESOURCE_IRQ] = { + .start = IRQ_IOP13XX_TPMI0_OUT, + .end = IRQ_IOP13XX_TPMI0_OUT, + .flags = IORESOURCE_IRQ + } +}; + +static struct resource iop13xx_tpmi_1_resources[] = { + [IOP13XX_TPMI_RESOURCE_MMR] = { + .start = IOP13XX_TPMI_MMR(1), + .end = IOP13XX_TPMI_MMR(1) + IOP13XX_TPMI_MMR_SIZE, + .flags = IORESOURCE_MEM, + }, + [IOP13XX_TPMI_RESOURCE_MEM] = { + .start = IOP13XX_TPMI_MEM(1), + .end = IOP13XX_TPMI_MEM(1) + IOP13XX_TPMI_MEM_SIZE, + .flags = IORESOURCE_MEM, + }, + [IOP13XX_TPMI_RESOURCE_CTRL] = { + .start = IOP13XX_TPMI_CTRL(1), + .end = IOP13XX_TPMI_CTRL(1) + IOP13XX_TPMI_MEM_CTRL, + .flags = IORESOURCE_MEM, + }, + [IOP13XX_TPMI_RESOURCE_IRQ] = { + .start = IRQ_IOP13XX_TPMI1_OUT, + .end = IRQ_IOP13XX_TPMI1_OUT, + .flags = IORESOURCE_IRQ + } +}; + +static struct resource iop13xx_tpmi_2_resources[] = { + [IOP13XX_TPMI_RESOURCE_MMR] = { + .start = IOP13XX_TPMI_MMR(2), + .end = IOP13XX_TPMI_MMR(2) + IOP13XX_TPMI_MMR_SIZE, + .flags = IORESOURCE_MEM, + }, + [IOP13XX_TPMI_RESOURCE_MEM] = { + .start = IOP13XX_TPMI_MEM(2), + .end = IOP13XX_TPMI_MEM(2) + IOP13XX_TPMI_MEM_SIZE, + .flags = IORESOURCE_MEM, + }, + [IOP13XX_TPMI_RESOURCE_CTRL] = { + .start = IOP13XX_TPMI_CTRL(2), + .end = IOP13XX_TPMI_CTRL(2) + IOP13XX_TPMI_MEM_CTRL, + .flags = IORESOURCE_MEM, + }, + [IOP13XX_TPMI_RESOURCE_IRQ] = { + .start = IRQ_IOP13XX_TPMI2_OUT, + .end = IRQ_IOP13XX_TPMI2_OUT, + .flags = IORESOURCE_IRQ + } +}; + +static struct resource iop13xx_tpmi_3_resources[] = { + [IOP13XX_TPMI_RESOURCE_MMR] = { + .start = IOP13XX_TPMI_MMR(3), + .end = IOP13XX_TPMI_MMR(3) + IOP13XX_TPMI_MMR_SIZE, + .flags = IORESOURCE_MEM, + }, + [IOP13XX_TPMI_RESOURCE_MEM] = { + .start = IOP13XX_TPMI_MEM(3), + .end = IOP13XX_TPMI_MEM(3) + IOP13XX_TPMI_MEM_SIZE, + .flags = IORESOURCE_MEM, + }, + [IOP13XX_TPMI_RESOURCE_CTRL] = { + .start = IOP13XX_TPMI_CTRL(3), + .end = IOP13XX_TPMI_CTRL(3) + IOP13XX_TPMI_MEM_CTRL, + .flags = IORESOURCE_MEM, + }, + [IOP13XX_TPMI_RESOURCE_IRQ] = { + .start = IRQ_IOP13XX_TPMI3_OUT, + .end = IRQ_IOP13XX_TPMI3_OUT, + .flags = IORESOURCE_IRQ + } +}; + +u64 iop13xx_tpmi_mask = DMA_64BIT_MASK; +static struct platform_device iop13xx_tpmi_0_device = { + .name = "iop-tpmi", + .id = 0, + .num_resources = 4, + .resource = iop13xx_tpmi_0_resources, + .dev = { + .dma_mask = &iop13xx_tpmi_mask, + .coherent_dma_mask = DMA_64BIT_MASK, + }, +}; + +static struct platform_device iop13xx_tpmi_1_device = { + .name = "iop-tpmi", + .id = 1, + .num_resources = 4, + .resource = iop13xx_tpmi_1_resources, + .dev = { + .dma_mask = &iop13xx_tpmi_mask, + .coherent_dma_mask = DMA_64BIT_MASK, + }, +}; + +static struct platform_device iop13xx_tpmi_2_device = { + .name = "iop-tpmi", + .id = 2, + .num_resources = 4, + .resource = iop13xx_tpmi_2_resources, + .dev = { + .dma_mask = &iop13xx_tpmi_mask, + .coherent_dma_mask = DMA_64BIT_MASK, + }, +}; + +static struct platform_device iop13xx_tpmi_3_device = { + .name = "iop-tpmi", + .id = 3, + .num_resources = 4, + .resource = iop13xx_tpmi_3_resources, + .dev = { + .dma_mask = &iop13xx_tpmi_mask, + .coherent_dma_mask = DMA_64BIT_MASK, + }, +}; + +__init void iop13xx_add_tpmi_devices(void) +{ + unsigned short device_id; + + /* tpmi's not present on iop341 or iop342 */ + if (__raw_readl(IOP13XX_ESSR0) & IOP13XX_INTERFACE_SEL_PCIX) + /* ATUE must be present */ + device_id = __raw_readw(IOP13XX_ATUE_DID); + else + /* ATUX must be present */ + device_id = __raw_readw(IOP13XX_ATUX_DID); + + switch (device_id) { + /* iop34[1|2] 0-tpmi */ + case 0x3380: + case 0x3384: + case 0x3388: + case 0x338c: + case 0x3382: + case 0x3386: + case 0x338a: + case 0x338e: + return; + /* iop348 1-tpmi */ + case 0x3310: + case 0x3312: + case 0x3314: + case 0x3318: + case 0x331a: + case 0x331c: + case 0x33c0: + case 0x33c2: + case 0x33c4: + case 0x33c8: + case 0x33ca: + case 0x33cc: + case 0x33b0: + case 0x33b2: + case 0x33b4: + case 0x33b8: + case 0x33ba: + case 0x33bc: + case 0x3320: + case 0x3322: + case 0x3324: + case 0x3328: + case 0x332a: + case 0x332c: + platform_device_register(&iop13xx_tpmi_0_device); + return; + default: + platform_device_register(&iop13xx_tpmi_0_device); + platform_device_register(&iop13xx_tpmi_1_device); + platform_device_register(&iop13xx_tpmi_2_device); + platform_device_register(&iop13xx_tpmi_3_device); + return; + } +} diff --git a/include/asm-arm/arch-iop13xx/iop13xx.h b/include/asm-arm/arch-iop13xx/iop13xx.h index c8762ae8f628..85707e9c3325 100644 --- a/include/asm-arm/arch-iop13xx/iop13xx.h +++ b/include/asm-arm/arch-iop13xx/iop13xx.h @@ -8,6 +8,7 @@ extern u32 iop13xx_atue_pmmr_offset; void iop13xx_init_irq(void); void iop13xx_map_io(void); void iop13xx_platform_init(void); +void iop13xx_add_tpmi_devices(void); void iop13xx_init_irq(void); /* CPUID CP6 R0 Page 0 */ -- cgit v1.2.3-59-g8ed1b From ce813b97e58cdfd780b8f8b4e15cd3ebfe940415 Mon Sep 17 00:00:00 2001 From: Andrew Victor Date: Wed, 2 May 2007 17:08:13 +0100 Subject: [ARM] 4350/1: AT91: Hardware header for ADC peripheral Definitions for Analog-to-Digital Converter (ADC) found on the Atmel AT91SAM9260 processor. Signed-off-by: Andrew Victor Signed-off-by: Russell King --- include/asm-arm/arch-at91/at91_adc.h | 61 ++++++++++++++++++++++++++++++++++++ 1 file changed, 61 insertions(+) create mode 100644 include/asm-arm/arch-at91/at91_adc.h (limited to 'include') diff --git a/include/asm-arm/arch-at91/at91_adc.h b/include/asm-arm/arch-at91/at91_adc.h new file mode 100644 index 000000000000..1ed66eaaf83a --- /dev/null +++ b/include/asm-arm/arch-at91/at91_adc.h @@ -0,0 +1,61 @@ +/* + * include/asm-arm/arch-at91/at91_adc.h + * + * Copyright (C) SAN People + * + * Analog-to-Digital Converter (ADC) registers. + * Based on AT91SAM9260 datasheet revision D. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef AT91_ADC_H +#define AT91_ADC_H + +#define AT91_ADC_CR 0x00 /* Control Register */ +#define AT91_ADC_SWRST (1 << 0) /* Software Reset */ +#define AT91_ADC_START (1 << 1) /* Start Conversion */ + +#define AT91_ADC_MR 0x04 /* Mode Register */ +#define AT91_ADC_TRGEN (1 << 0) /* Trigger Enable */ +#define AT91_ADC_TRGSEL (7 << 1) /* Trigger Selection */ +#define AT91_ADC_TRGSEL_TC0 (0 << 1) +#define AT91_ADC_TRGSEL_TC1 (1 << 1) +#define AT91_ADC_TRGSEL_TC2 (2 << 1) +#define AT91_ADC_TRGSEL_EXTERNAL (6 << 1) +#define AT91_ADC_LOWRES (1 << 4) /* Low Resolution */ +#define AT91_ADC_SLEEP (1 << 5) /* Sleep Mode */ +#define AT91_ADC_PRESCAL (0x3f << 8) /* Prescalar Rate Selection */ +#define AT91_ADC_PRESCAL_(x) ((x) << 8) +#define AT91_ADC_STARTUP (0x1f << 16) /* Startup Up Time */ +#define AT91_ADC_STARTUP_(x) ((x) << 16) +#define AT91_ADC_SHTIM (0xf << 24) /* Sample & Hold Time */ +#define AT91_ADC_SHTIM_(x) ((x) << 24) + +#define AT91_ADC_CHER 0x10 /* Channel Enable Register */ +#define AT91_ADC_CHDR 0x14 /* Channel Disable Register */ +#define AT91_ADC_CHSR 0x18 /* Channel Status Register */ +#define AT91_ADC_CH(n) (1 << (n)) /* Channel Number */ + +#define AT91_ADC_SR 0x1C /* Status Register */ +#define AT91_ADC_EOC(n) (1 << (n)) /* End of Conversion on Channel N */ +#define AT91_ADC_OVRE(n) (1 << ((n) + 8))/* Overrun Error on Channel N */ +#define AT91_ADC_DRDY (1 << 16) /* Data Ready */ +#define AT91_ADC_GOVRE (1 << 17) /* General Overrun Error */ +#define AT91_ADC_ENDRX (1 << 18) /* End of RX Buffer */ +#define AT91_ADC_RXFUFF (1 << 19) /* RX Buffer Full */ + +#define AT91_ADC_LCDR 0x20 /* Last Converted Data Register */ +#define AT91_ADC_LDATA (0x3ff) + +#define AT91_ADC_IER 0x24 /* Interrupt Enable Register */ +#define AT91_ADC_IDR 0x28 /* Interrupt Disable Register */ +#define AT91_ADC_IMR 0x2C /* Interrupt Mask Register */ + +#define AT91_ADC_CHR(n) (0x30 + ((n) * 4) /* Channel Data Register N */ +#define AT91_ADC_DATA (0x3ff) + +#endif -- cgit v1.2.3-59-g8ed1b From 7776a94c311504f26e73060920dfb3ccf02786b7 Mon Sep 17 00:00:00 2001 From: Andrew Victor Date: Wed, 2 May 2007 17:46:49 +0100 Subject: [ARM] 4352/1: AT91: Platform data for LCD and AC97. Define resources, platform_device and device registration functions for the LCD and AC97 controllers on the AT91SAM9263. Also update the AT91SAM9261 to use the common atmel_lcdfb driver. Signed-off-by: Nicolas Ferre Signed-off-by: Andrew Victor Signed-off-by: Russell King --- arch/arm/mach-at91/at91sam9261_devices.c | 10 +-- arch/arm/mach-at91/at91sam9263_devices.c | 124 +++++++++++++++++++++++++++++++ include/asm-arm/arch-at91/board.h | 12 ++- 3 files changed, 140 insertions(+), 6 deletions(-) (limited to 'include') diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c index e1504766fd64..8e781997716a 100644 --- a/arch/arm/mach-at91/at91sam9261_devices.c +++ b/arch/arm/mach-at91/at91sam9261_devices.c @@ -430,9 +430,9 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) * LCD Controller * -------------------------------------------------------------------- */ -#if defined(CONFIG_FB_AT91) || defined(CONFIG_FB_AT91_MODULE) +#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE) static u64 lcdc_dmamask = 0xffffffffUL; -static struct at91fb_info lcdc_data; +static struct atmel_lcdfb_info lcdc_data; static struct resource lcdc_resources[] = { [0] = { @@ -455,7 +455,7 @@ static struct resource lcdc_resources[] = { }; static struct platform_device at91_lcdc_device = { - .name = "at91-fb", + .name = "atmel_lcdfb", .id = 0, .dev = { .dma_mask = &lcdc_dmamask, @@ -466,7 +466,7 @@ static struct platform_device at91_lcdc_device = { .num_resources = ARRAY_SIZE(lcdc_resources), }; -void __init at91_add_device_lcdc(struct at91fb_info *data) +void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) { if (!data) { return; @@ -499,7 +499,7 @@ void __init at91_add_device_lcdc(struct at91fb_info *data) platform_device_register(&at91_lcdc_device); } #else -void __init at91_add_device_lcdc(struct at91fb_info *data) {} +void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {} #endif diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c index b77121f27f34..2b2e18a67128 100644 --- a/arch/arm/mach-at91/at91sam9263_devices.c +++ b/arch/arm/mach-at91/at91sam9263_devices.c @@ -572,6 +572,130 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) #endif +/* -------------------------------------------------------------------- + * AC97 + * -------------------------------------------------------------------- */ + +#if defined(CONFIG_SND_AT91_AC97) || defined(CONFIG_SND_AT91_AC97_MODULE) +static u64 ac97_dmamask = 0xffffffffUL; +static struct atmel_ac97_data ac97_data; + +static struct resource ac97_resources[] = { + [0] = { + .start = AT91SAM9263_BASE_AC97C, + .end = AT91SAM9263_BASE_AC97C + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AT91SAM9263_ID_AC97C, + .end = AT91SAM9263_ID_AC97C, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device at91sam9263_ac97_device = { + .name = "ac97c", + .id = 1, + .dev = { + .dma_mask = &ac97_dmamask, + .coherent_dma_mask = 0xffffffff, + .platform_data = &ac97_data, + }, + .resource = ac97_resources, + .num_resources = ARRAY_SIZE(ac97_resources), +}; + +void __init at91_add_device_ac97(struct atmel_ac97_data *data) +{ + if (!data) + return; + + at91_set_A_periph(AT91_PIN_PB0, 0); /* AC97FS */ + at91_set_A_periph(AT91_PIN_PB1, 0); /* AC97CK */ + at91_set_A_periph(AT91_PIN_PB2, 0); /* AC97TX */ + at91_set_A_periph(AT91_PIN_PB3, 0); /* AC97RX */ + + /* reset */ + if (data->reset_pin) + at91_set_gpio_output(data->reset_pin, 0); + + ac97_data = *ek_data; + platform_device_register(&at91sam9263_ac97_device); +} +#else +void __init at91_add_device_ac97(struct atmel_ac97_data *data) {} +#endif + + +/* -------------------------------------------------------------------- + * LCD Controller + * -------------------------------------------------------------------- */ + +#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE) +static u64 lcdc_dmamask = 0xffffffffUL; +static struct atmel_lcdfb_info lcdc_data; + +static struct resource lcdc_resources[] = { + [0] = { + .start = AT91SAM9263_LCDC_BASE, + .end = AT91SAM9263_LCDC_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AT91SAM9263_ID_LCDC, + .end = AT91SAM9263_ID_LCDC, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device at91_lcdc_device = { + .name = "atmel_lcdfb", + .id = 0, + .dev = { + .dma_mask = &lcdc_dmamask, + .coherent_dma_mask = 0xffffffff, + .platform_data = &lcdc_data, + }, + .resource = lcdc_resources, + .num_resources = ARRAY_SIZE(lcdc_resources), +}; + +void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) +{ + if (!data) + return; + + at91_set_A_periph(AT91_PIN_PC1, 0); /* LCDHSYNC */ + at91_set_A_periph(AT91_PIN_PC2, 0); /* LCDDOTCK */ + at91_set_A_periph(AT91_PIN_PC3, 0); /* LCDDEN */ + at91_set_B_periph(AT91_PIN_PB9, 0); /* LCDCC */ + at91_set_A_periph(AT91_PIN_PC6, 0); /* LCDD2 */ + at91_set_A_periph(AT91_PIN_PC7, 0); /* LCDD3 */ + at91_set_A_periph(AT91_PIN_PC8, 0); /* LCDD4 */ + at91_set_A_periph(AT91_PIN_PC9, 0); /* LCDD5 */ + at91_set_A_periph(AT91_PIN_PC10, 0); /* LCDD6 */ + at91_set_A_periph(AT91_PIN_PC11, 0); /* LCDD7 */ + at91_set_A_periph(AT91_PIN_PC14, 0); /* LCDD10 */ + at91_set_A_periph(AT91_PIN_PC15, 0); /* LCDD11 */ + at91_set_A_periph(AT91_PIN_PC16, 0); /* LCDD12 */ + at91_set_B_periph(AT91_PIN_PC12, 0); /* LCDD13 */ + at91_set_A_periph(AT91_PIN_PC18, 0); /* LCDD14 */ + at91_set_A_periph(AT91_PIN_PC19, 0); /* LCDD15 */ + at91_set_A_periph(AT91_PIN_PC22, 0); /* LCDD18 */ + at91_set_A_periph(AT91_PIN_PC23, 0); /* LCDD19 */ + at91_set_A_periph(AT91_PIN_PC24, 0); /* LCDD20 */ + at91_set_B_periph(AT91_PIN_PC17, 0); /* LCDD21 */ + at91_set_A_periph(AT91_PIN_PC26, 0); /* LCDD22 */ + at91_set_A_periph(AT91_PIN_PC27, 0); /* LCDD23 */ + + lcdc_data = *data; + platform_device_register(&at91_lcdc_device); +} +#else +void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {} +#endif + + /* -------------------------------------------------------------------- * LEDs * -------------------------------------------------------------------- */ diff --git a/include/asm-arm/arch-at91/board.h b/include/asm-arm/arch-at91/board.h index 7b9903c2c447..7a34a5b1fed0 100644 --- a/include/asm-arm/arch-at91/board.h +++ b/include/asm-arm/arch-at91/board.h @@ -62,7 +62,7 @@ struct at91_mmc_data { }; extern void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data); - /* Ethernet */ + /* Ethernet (EMAC & MACB) */ struct at91_eth_data { u8 phy_irq_pin; /* PHY IRQ */ u8 is_rmii; /* using RMII interface? */ @@ -114,6 +114,16 @@ struct atmel_uart_data { }; extern void __init at91_add_device_serial(void); + /* LCD Controller */ +struct atmel_lcdfb_info; +extern void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data); + + /* AC97 */ +struct atmel_ac97_data { + u8 reset_pin; /* reset */ +} +extern void __init at91_add_device_ac97(struct atmel_ac97_data *data); + /* LEDs */ extern u8 at91_leds_cpu; extern u8 at91_leds_timer; -- cgit v1.2.3-59-g8ed1b From c0b04d1b2c427629b2dbe066422a507ad855bf61 Mon Sep 17 00:00:00 2001 From: Russell King Date: Thu, 3 May 2007 10:20:47 +0100 Subject: [ARM] ecard: Move private ecard junk out of asm/ecard.h Move ecard.c private junk from asm/ecard.h to a local header file. Signed-off-by: Russell King --- arch/arm/kernel/ecard.c | 2 ++ arch/arm/kernel/ecard.h | 56 +++++++++++++++++++++++++++++++++++++++++++++++++ include/asm-arm/ecard.h | 50 ------------------------------------------- 3 files changed, 58 insertions(+), 50 deletions(-) create mode 100644 arch/arm/kernel/ecard.h (limited to 'include') diff --git a/arch/arm/kernel/ecard.c b/arch/arm/kernel/ecard.c index 64d5ba1a1337..85f4db6efa7c 100644 --- a/arch/arm/kernel/ecard.c +++ b/arch/arm/kernel/ecard.c @@ -51,6 +51,8 @@ #include #include +#include "ecard.h" + #ifndef CONFIG_ARCH_RPC #define HAVE_EXPMASK #endif diff --git a/arch/arm/kernel/ecard.h b/arch/arm/kernel/ecard.h new file mode 100644 index 000000000000..d7c2dacf935d --- /dev/null +++ b/arch/arm/kernel/ecard.h @@ -0,0 +1,56 @@ +/* + * ecard.h + * + * Copyright 2007 Russell King + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/* Definitions internal to ecard.c - for it's use only!! + * + * External expansion card header as read from the card + */ +struct ex_ecid { + unsigned char r_irq:1; + unsigned char r_zero:1; + unsigned char r_fiq:1; + unsigned char r_id:4; + unsigned char r_a:1; + + unsigned char r_cd:1; + unsigned char r_is:1; + unsigned char r_w:2; + unsigned char r_r1:4; + + unsigned char r_r2:8; + + unsigned char r_prod[2]; + + unsigned char r_manu[2]; + + unsigned char r_country; + + unsigned char r_fiqmask; + unsigned char r_fiqoff[3]; + + unsigned char r_irqmask; + unsigned char r_irqoff[3]; +}; + +/* + * Chunk directory entry as read from the card + */ +struct ex_chunk_dir { + unsigned char r_id; + unsigned char r_len[3]; + unsigned long r_start; + union { + char string[256]; + char data[1]; + } d; +#define c_id(x) ((x)->r_id) +#define c_len(x) ((x)->r_len[0]|((x)->r_len[1]<<8)|((x)->r_len[2]<<16)) +#define c_start(x) ((x)->r_start) +}; diff --git a/include/asm-arm/ecard.h b/include/asm-arm/ecard.h index a0ae2b954d29..bd4b5769dc4e 100644 --- a/include/asm-arm/ecard.h +++ b/include/asm-arm/ecard.h @@ -224,56 +224,6 @@ ecard_address(struct expansion_card *ec, card_type_t type, card_speed_t speed) extern int ecard_request_resources(struct expansion_card *ec); extern void ecard_release_resources(struct expansion_card *ec); -#ifdef ECARD_C -/* Definitions internal to ecard.c - for it's use only!! - * - * External expansion card header as read from the card - */ -struct ex_ecid { - unsigned char r_irq:1; - unsigned char r_zero:1; - unsigned char r_fiq:1; - unsigned char r_id:4; - unsigned char r_a:1; - - unsigned char r_cd:1; - unsigned char r_is:1; - unsigned char r_w:2; - unsigned char r_r1:4; - - unsigned char r_r2:8; - - unsigned char r_prod[2]; - - unsigned char r_manu[2]; - - unsigned char r_country; - - unsigned char r_fiqmask; - unsigned char r_fiqoff[3]; - - unsigned char r_irqmask; - unsigned char r_irqoff[3]; -}; - -/* - * Chunk directory entry as read from the card - */ -struct ex_chunk_dir { - unsigned char r_id; - unsigned char r_len[3]; - unsigned long r_start; - union { - char string[256]; - char data[1]; - } d; -#define c_id(x) ((x)->r_id) -#define c_len(x) ((x)->r_len[0]|((x)->r_len[1]<<8)|((x)->r_len[2]<<16)) -#define c_start(x) ((x)->r_start) -}; - -#endif - extern struct bus_type ecard_bus_type; #define ECARD_DEV(_d) container_of((_d), struct expansion_card, dev) -- cgit v1.2.3-59-g8ed1b From 5559bca8e66f968192a5416d953c88cc3389cb22 Mon Sep 17 00:00:00 2001 From: Russell King Date: Thu, 3 May 2007 10:47:37 +0100 Subject: [ARM] ecard: Convert card type enum to a flag 'type' in the struct expansion_card is only used to indicate whether this card is an EASI card or not. Therefore, having it as an enum is wasteful (and introduces additional noise when we come to remove the enum.) Convert it to a mere flag instead. Signed-off-by: Russell King --- arch/arm/kernel/ecard.c | 10 +++++----- include/asm-arm/ecard.h | 2 +- 2 files changed, 6 insertions(+), 6 deletions(-) (limited to 'include') diff --git a/arch/arm/kernel/ecard.c b/arch/arm/kernel/ecard.c index 85f4db6efa7c..bdbd7da99286 100644 --- a/arch/arm/kernel/ecard.c +++ b/arch/arm/kernel/ecard.c @@ -126,7 +126,7 @@ static void ecard_task_reset(struct ecard_request *req) res = ec->slot_no == 8 ? &ec->resource[ECARD_RES_MEMC] - : ec->type == ECARD_EASI + : ec->easi ? &ec->resource[ECARD_RES_EASI] : &ec->resource[ECARD_RES_IOCSYNC]; @@ -181,7 +181,7 @@ static void ecard_task_readbytes(struct ecard_request *req) index += 1; } } else { - unsigned long base = (ec->type == ECARD_EASI + unsigned long base = (ec->easi ? &ec->resource[ECARD_RES_EASI] : &ec->resource[ECARD_RES_IOCSYNC])->start; void __iomem *pbase = (void __iomem *)base; @@ -728,7 +728,7 @@ static int ecard_prints(char *buffer, ecard_t *ec) char *start = buffer; buffer += sprintf(buffer, " %d: %s ", ec->slot_no, - ec->type == ECARD_EASI ? "EASI" : " "); + ec->easi ? "EASI" : " "); if (ec->cid.id == 0) { struct in_chunk_dir incd; @@ -815,7 +815,7 @@ static struct expansion_card *__init ecard_alloc_card(int type, int slot) } ec->slot_no = slot; - ec->type = type; + ec->easi = type == ECARD_EASI; ec->irq = NO_IRQ; ec->fiq = NO_IRQ; ec->dma = NO_DMA; @@ -909,7 +909,7 @@ static ssize_t ecard_show_device(struct device *dev, struct device_attribute *at static ssize_t ecard_show_type(struct device *dev, struct device_attribute *attr, char *buf) { struct expansion_card *ec = ECARD_DEV(dev); - return sprintf(buf, "%s\n", ec->type == ECARD_EASI ? "EASI" : "IOC"); + return sprintf(buf, "%s\n", ec->easi ? "EASI" : "IOC"); } static struct device_attribute ecard_dev_attrs[] = { diff --git a/include/asm-arm/ecard.h b/include/asm-arm/ecard.h index bd4b5769dc4e..3a6d3eb27622 100644 --- a/include/asm-arm/ecard.h +++ b/include/asm-arm/ecard.h @@ -160,6 +160,7 @@ struct expansion_card { unsigned char irqmask; /* IRQ mask */ unsigned char fiqmask; /* FIQ mask */ unsigned char claimed; /* Card claimed? */ + unsigned char easi; /* EASI card */ void *irq_data; /* Data for use for IRQ by card */ void *fiq_data; /* Data for use for FIQ by card */ @@ -169,7 +170,6 @@ struct expansion_card { CONST unsigned int dma; /* DMA number (for request_dma) */ CONST unsigned int irq; /* IRQ number (for request_irq) */ CONST unsigned int fiq; /* FIQ number (for request_irq) */ - CONST card_type_t type; /* Type of card */ CONST struct in_ecid cid; /* Card Identification */ /* Private internal data */ -- cgit v1.2.3-59-g8ed1b From fe7fdb80e9e576e181b189d0fae62d35cb30fe4d Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Thu, 26 Apr 2007 08:34:41 +0100 Subject: [ARM] 4329/1: fix position of NETX_SYSTEM_REG This patch fixes the position of the netx reset control register Signed-off-by: Sascha Hauer Signed-off-by: Russell King --- include/asm-arm/arch-netx/netx-regs.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/asm-arm/arch-netx/netx-regs.h b/include/asm-arm/arch-netx/netx-regs.h index 8ab45bea83ca..fc9aa21f360c 100644 --- a/include/asm-arm/arch-netx/netx-regs.h +++ b/include/asm-arm/arch-netx/netx-regs.h @@ -121,8 +121,8 @@ #define NETX_SYSTEM_IOC_MR NETX_SYSTEM_REG(0x08) /* FIXME: Docs are not consistent */ -#define NETX_SYSTEM_RES_CR NETX_SYSTEM_REG(0x08) -/* #define NETX_SYSTEM_RES_CR NETX_SYSTEM_REG(0x0c) */ +/* #define NETX_SYSTEM_RES_CR NETX_SYSTEM_REG(0x08) */ +#define NETX_SYSTEM_RES_CR NETX_SYSTEM_REG(0x0c) #define NETX_SYSTEM_PHY_CONTROL NETX_SYSTEM_REG(0x10) #define NETX_SYSTEM_REV NETX_SYSTEM_REG(0x34) -- cgit v1.2.3-59-g8ed1b From ff4bfb2163e8914332267be3758eb28239460316 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Thu, 26 Apr 2007 08:26:13 +0100 Subject: [ARM] 4328/1: Move i.MX UART regs to driver This patch moves the i.MX UART register descriptions from include/asm-arm/arch-imx/imx-regs.h to the serial driver itself. This helps using the driver on other architectures like mx31 Signed-off-by: Sascha Hauer Signed-off-by: Russell King --- drivers/serial/imx.c | 268 +++++++++++++++++++++++++++--------- include/asm-arm/arch-imx/imx-regs.h | 118 ---------------- 2 files changed, 205 insertions(+), 181 deletions(-) (limited to 'include') diff --git a/drivers/serial/imx.c b/drivers/serial/imx.c index 04cc88cc528c..e42faa4e4282 100644 --- a/drivers/serial/imx.c +++ b/drivers/serial/imx.c @@ -46,6 +46,122 @@ #include #include +/* Register definitions */ +#define URXD0 0x0 /* Receiver Register */ +#define URTX0 0x40 /* Transmitter Register */ +#define UCR1 0x80 /* Control Register 1 */ +#define UCR2 0x84 /* Control Register 2 */ +#define UCR3 0x88 /* Control Register 3 */ +#define UCR4 0x8c /* Control Register 4 */ +#define UFCR 0x90 /* FIFO Control Register */ +#define USR1 0x94 /* Status Register 1 */ +#define USR2 0x98 /* Status Register 2 */ +#define UESC 0x9c /* Escape Character Register */ +#define UTIM 0xa0 /* Escape Timer Register */ +#define UBIR 0xa4 /* BRM Incremental Register */ +#define UBMR 0xa8 /* BRM Modulator Register */ +#define UBRC 0xac /* Baud Rate Count Register */ +#define BIPR1 0xb0 /* Incremental Preset Register 1 */ +#define BIPR2 0xb4 /* Incremental Preset Register 2 */ +#define BIPR3 0xb8 /* Incremental Preset Register 3 */ +#define BIPR4 0xbc /* Incremental Preset Register 4 */ +#define BMPR1 0xc0 /* BRM Modulator Register 1 */ +#define BMPR2 0xc4 /* BRM Modulator Register 2 */ +#define BMPR3 0xc8 /* BRM Modulator Register 3 */ +#define BMPR4 0xcc /* BRM Modulator Register 4 */ +#define UTS 0xd0 /* UART Test Register */ + +/* UART Control Register Bit Fields.*/ +#define URXD_CHARRDY (1<<15) +#define URXD_ERR (1<<14) +#define URXD_OVRRUN (1<<13) +#define URXD_FRMERR (1<<12) +#define URXD_BRK (1<<11) +#define URXD_PRERR (1<<10) +#define UCR1_ADEN (1<<15) /* Auto dectect interrupt */ +#define UCR1_ADBR (1<<14) /* Auto detect baud rate */ +#define UCR1_TRDYEN (1<<13) /* Transmitter ready interrupt enable */ +#define UCR1_IDEN (1<<12) /* Idle condition interrupt */ +#define UCR1_RRDYEN (1<<9) /* Recv ready interrupt enable */ +#define UCR1_RDMAEN (1<<8) /* Recv ready DMA enable */ +#define UCR1_IREN (1<<7) /* Infrared interface enable */ +#define UCR1_TXMPTYEN (1<<6) /* Transimitter empty interrupt enable */ +#define UCR1_RTSDEN (1<<5) /* RTS delta interrupt enable */ +#define UCR1_SNDBRK (1<<4) /* Send break */ +#define UCR1_TDMAEN (1<<3) /* Transmitter ready DMA enable */ +#define UCR1_UARTCLKEN (1<<2) /* UART clock enabled */ +#define UCR1_DOZE (1<<1) /* Doze */ +#define UCR1_UARTEN (1<<0) /* UART enabled */ +#define UCR2_ESCI (1<<15) /* Escape seq interrupt enable */ +#define UCR2_IRTS (1<<14) /* Ignore RTS pin */ +#define UCR2_CTSC (1<<13) /* CTS pin control */ +#define UCR2_CTS (1<<12) /* Clear to send */ +#define UCR2_ESCEN (1<<11) /* Escape enable */ +#define UCR2_PREN (1<<8) /* Parity enable */ +#define UCR2_PROE (1<<7) /* Parity odd/even */ +#define UCR2_STPB (1<<6) /* Stop */ +#define UCR2_WS (1<<5) /* Word size */ +#define UCR2_RTSEN (1<<4) /* Request to send interrupt enable */ +#define UCR2_TXEN (1<<2) /* Transmitter enabled */ +#define UCR2_RXEN (1<<1) /* Receiver enabled */ +#define UCR2_SRST (1<<0) /* SW reset */ +#define UCR3_DTREN (1<<13) /* DTR interrupt enable */ +#define UCR3_PARERREN (1<<12) /* Parity enable */ +#define UCR3_FRAERREN (1<<11) /* Frame error interrupt enable */ +#define UCR3_DSR (1<<10) /* Data set ready */ +#define UCR3_DCD (1<<9) /* Data carrier detect */ +#define UCR3_RI (1<<8) /* Ring indicator */ +#define UCR3_TIMEOUTEN (1<<7) /* Timeout interrupt enable */ +#define UCR3_RXDSEN (1<<6) /* Receive status interrupt enable */ +#define UCR3_AIRINTEN (1<<5) /* Async IR wake interrupt enable */ +#define UCR3_AWAKEN (1<<4) /* Async wake interrupt enable */ +#define UCR3_REF25 (1<<3) /* Ref freq 25 MHz */ +#define UCR3_REF30 (1<<2) /* Ref Freq 30 MHz */ +#define UCR3_INVT (1<<1) /* Inverted Infrared transmission */ +#define UCR3_BPEN (1<<0) /* Preset registers enable */ +#define UCR4_CTSTL_32 (32<<10) /* CTS trigger level (32 chars) */ +#define UCR4_INVR (1<<9) /* Inverted infrared reception */ +#define UCR4_ENIRI (1<<8) /* Serial infrared interrupt enable */ +#define UCR4_WKEN (1<<7) /* Wake interrupt enable */ +#define UCR4_REF16 (1<<6) /* Ref freq 16 MHz */ +#define UCR4_IRSC (1<<5) /* IR special case */ +#define UCR4_TCEN (1<<3) /* Transmit complete interrupt enable */ +#define UCR4_BKEN (1<<2) /* Break condition interrupt enable */ +#define UCR4_OREN (1<<1) /* Receiver overrun interrupt enable */ +#define UCR4_DREN (1<<0) /* Recv data ready interrupt enable */ +#define UFCR_RXTL_SHF 0 /* Receiver trigger level shift */ +#define UFCR_RFDIV (7<<7) /* Reference freq divider mask */ +#define UFCR_TXTL_SHF 10 /* Transmitter trigger level shift */ +#define USR1_PARITYERR (1<<15) /* Parity error interrupt flag */ +#define USR1_RTSS (1<<14) /* RTS pin status */ +#define USR1_TRDY (1<<13) /* Transmitter ready interrupt/dma flag */ +#define USR1_RTSD (1<<12) /* RTS delta */ +#define USR1_ESCF (1<<11) /* Escape seq interrupt flag */ +#define USR1_FRAMERR (1<<10) /* Frame error interrupt flag */ +#define USR1_RRDY (1<<9) /* Receiver ready interrupt/dma flag */ +#define USR1_TIMEOUT (1<<7) /* Receive timeout interrupt status */ +#define USR1_RXDS (1<<6) /* Receiver idle interrupt flag */ +#define USR1_AIRINT (1<<5) /* Async IR wake interrupt flag */ +#define USR1_AWAKE (1<<4) /* Aysnc wake interrupt flag */ +#define USR2_ADET (1<<15) /* Auto baud rate detect complete */ +#define USR2_TXFE (1<<14) /* Transmit buffer FIFO empty */ +#define USR2_DTRF (1<<13) /* DTR edge interrupt flag */ +#define USR2_IDLE (1<<12) /* Idle condition */ +#define USR2_IRINT (1<<8) /* Serial infrared interrupt flag */ +#define USR2_WAKE (1<<7) /* Wake */ +#define USR2_RTSF (1<<4) /* RTS edge interrupt flag */ +#define USR2_TXDC (1<<3) /* Transmitter complete */ +#define USR2_BRCD (1<<2) /* Break condition */ +#define USR2_ORE (1<<1) /* Overrun error */ +#define USR2_RDR (1<<0) /* Recv data ready */ +#define UTS_FRCPERR (1<<13) /* Force parity error */ +#define UTS_LOOP (1<<12) /* Loop tx and rx */ +#define UTS_TXEMPTY (1<<6) /* TxFIFO empty */ +#define UTS_RXEMPTY (1<<5) /* RxFIFO empty */ +#define UTS_TXFULL (1<<4) /* TxFIFO full */ +#define UTS_RXFULL (1<<3) /* RxFIFO full */ +#define UTS_SOFTRST (1<<0) /* Software reset */ + /* We've been assigned a range on the "Low-density serial ports" major */ #define SERIAL_IMX_MAJOR 204 #define MINOR_START 41 @@ -128,7 +244,10 @@ static void imx_timeout(unsigned long data) static void imx_stop_tx(struct uart_port *port) { struct imx_port *sport = (struct imx_port *)port; - UCR1((u32)sport->port.membase) &= ~UCR1_TXMPTYEN; + unsigned long temp; + + temp = readl(sport->port.membase + UCR1); + writel(temp & ~UCR1_TXMPTYEN, sport->port.membase + UCR1); } /* @@ -137,7 +256,10 @@ static void imx_stop_tx(struct uart_port *port) static void imx_stop_rx(struct uart_port *port) { struct imx_port *sport = (struct imx_port *)port; - UCR2((u32)sport->port.membase) &= ~UCR2_RXEN; + unsigned long temp; + + temp = readl(sport->port.membase + UCR2); + writel(temp &~ UCR2_RXEN, sport->port.membase + UCR2); } /* @@ -154,10 +276,10 @@ static inline void imx_transmit_buffer(struct imx_port *sport) { struct circ_buf *xmit = &sport->port.info->xmit; - while (!(UTS((u32)sport->port.membase) & UTS_TXFULL)) { + while (!(readl(sport->port.membase + UTS) & UTS_TXFULL)) { /* send xmit->buf[xmit->tail] * out the port here */ - URTX0((u32)sport->port.membase) = xmit->buf[xmit->tail]; + writel(xmit->buf[xmit->tail], sport->port.membase + URTX0); xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); sport->port.icount.tx++; @@ -175,21 +297,24 @@ static inline void imx_transmit_buffer(struct imx_port *sport) static void imx_start_tx(struct uart_port *port) { struct imx_port *sport = (struct imx_port *)port; + unsigned long temp; - UCR1((u32)sport->port.membase) |= UCR1_TXMPTYEN; + temp = readl(sport->port.membase + UCR1); + writel(temp | UCR1_TXMPTYEN, sport->port.membase + UCR1); - imx_transmit_buffer(sport); + if (readl(sport->port.membase + UTS) & UTS_TXEMPTY) + imx_transmit_buffer(sport); } static irqreturn_t imx_rtsint(int irq, void *dev_id) { struct imx_port *sport = (struct imx_port *)dev_id; - unsigned int val = USR1((u32)sport->port.membase)&USR1_RTSS; + unsigned int val = readl(sport->port.membase + USR1) & USR1_RTSS; unsigned long flags; spin_lock_irqsave(&sport->port.lock, flags); - USR1((u32)sport->port.membase) = USR1_RTSD; + writel(USR1_RTSD, sport->port.membase + USR1); uart_handle_cts_change(&sport->port, !!val); wake_up_interruptible(&sport->port.info->delta_msr_wait); @@ -207,7 +332,7 @@ static irqreturn_t imx_txint(int irq, void *dev_id) if (sport->port.x_char) { /* Send next char */ - URTX0((u32)sport->port.membase) = sport->port.x_char; + writel(sport->port.x_char, sport->port.membase + URTX0); goto out; } @@ -231,17 +356,18 @@ static irqreturn_t imx_rxint(int irq, void *dev_id) struct imx_port *sport = dev_id; unsigned int rx,flg,ignored = 0; struct tty_struct *tty = sport->port.info->tty; - unsigned long flags; + unsigned long flags, temp; - rx = URXD0((u32)sport->port.membase); + rx = readl(sport->port.membase + URXD0); spin_lock_irqsave(&sport->port.lock,flags); do { flg = TTY_NORMAL; sport->port.icount.rx++; - if( USR2((u32)sport->port.membase) & USR2_BRCD ) { - USR2((u32)sport->port.membase) |= USR2_BRCD; + temp = readl(sport->port.membase + USR2); + if( temp & USR2_BRCD ) { + writel(temp | USR2_BRCD, sport->port.membase + USR2); if(uart_handle_break(&sport->port)) goto ignore_char; } @@ -257,7 +383,7 @@ static irqreturn_t imx_rxint(int irq, void *dev_id) tty_insert_flip_char(tty, rx, flg); ignore_char: - rx = URXD0((u32)sport->port.membase); + rx = readl(sport->port.membase + URXD0); } while(rx & URXD_CHARRDY); out: @@ -301,7 +427,7 @@ static unsigned int imx_tx_empty(struct uart_port *port) { struct imx_port *sport = (struct imx_port *)port; - return USR2((u32)sport->port.membase) & USR2_TXDC ? TIOCSER_TEMT : 0; + return (readl(sport->port.membase + USR2) & USR2_TXDC) ? TIOCSER_TEMT : 0; } /* @@ -312,10 +438,10 @@ static unsigned int imx_get_mctrl(struct uart_port *port) struct imx_port *sport = (struct imx_port *)port; unsigned int tmp = TIOCM_DSR | TIOCM_CAR; - if (USR1((u32)sport->port.membase) & USR1_RTSS) + if (readl(sport->port.membase + USR1) & USR1_RTSS) tmp |= TIOCM_CTS; - if (UCR2((u32)sport->port.membase) & UCR2_CTS) + if (readl(sport->port.membase + UCR2) & UCR2_CTS) tmp |= TIOCM_RTS; return tmp; @@ -324,11 +450,14 @@ static unsigned int imx_get_mctrl(struct uart_port *port) static void imx_set_mctrl(struct uart_port *port, unsigned int mctrl) { struct imx_port *sport = (struct imx_port *)port; + unsigned long temp; + + temp = readl(sport->port.membase + UCR2) & ~UCR2_CTS; if (mctrl & TIOCM_RTS) - UCR2((u32)sport->port.membase) |= UCR2_CTS; - else - UCR2((u32)sport->port.membase) &= ~UCR2_CTS; + temp |= UCR2_CTS; + + writel(temp, sport->port.membase + UCR2); } /* @@ -337,14 +466,16 @@ static void imx_set_mctrl(struct uart_port *port, unsigned int mctrl) static void imx_break_ctl(struct uart_port *port, int break_state) { struct imx_port *sport = (struct imx_port *)port; - unsigned long flags; + unsigned long flags, temp; spin_lock_irqsave(&sport->port.lock, flags); + temp = readl(sport->port.membase + UCR1) & ~UCR1_SNDBRK; + if ( break_state != 0 ) - UCR1((u32)sport->port.membase) |= UCR1_SNDBRK; - else - UCR1((u32)sport->port.membase) &= ~UCR1_SNDBRK; + temp |= UCR1_SNDBRK; + + writel(temp, sport->port.membase + UCR1); spin_unlock_irqrestore(&sport->port.lock, flags); } @@ -360,7 +491,7 @@ static int imx_setup_ufcr(struct imx_port *sport, unsigned int mode) /* set receiver / transmitter trigger level. * RFDIV is set such way to satisfy requested uartclk value */ - val = TXTL<<10 | RXTL; + val = TXTL << 10 | RXTL; ufcr_rfdiv = (imx_get_perclk1() + sport->port.uartclk / 2) / sport->port.uartclk; if(!ufcr_rfdiv) @@ -373,7 +504,7 @@ static int imx_setup_ufcr(struct imx_port *sport, unsigned int mode) val |= UFCR_RFDIV & (ufcr_rfdiv << 7); - UFCR((u32)sport->port.membase) = val; + writel(val, sport->port.membase + UFCR); return 0; } @@ -382,14 +513,15 @@ static int imx_startup(struct uart_port *port) { struct imx_port *sport = (struct imx_port *)port; int retval; - unsigned long flags; + unsigned long flags, temp; imx_setup_ufcr(sport, 0); /* disable the DREN bit (Data Ready interrupt enable) before * requesting IRQs */ - UCR4((u32)sport->port.membase) &= ~UCR4_DREN; + temp = readl(sport->port.membase + UCR4); + writel(temp & ~UCR4_DREN, sport->port.membase + UCR4); /* * Allocate the IRQ @@ -411,12 +543,16 @@ static int imx_startup(struct uart_port *port) /* * Finally, clear and enable interrupts */ + writel(USR1_RTSD, sport->port.membase + USR1); + + temp = readl(sport->port.membase + UCR1); + temp |= (UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN | UCR1_UARTEN); + writel(temp, sport->port.membase + UCR1); - USR1((u32)sport->port.membase) = USR1_RTSD; - UCR1((u32)sport->port.membase) |= - (UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN | UCR1_UARTEN); + temp = readl(sport->port.membase + UCR2); + temp |= (UCR2_RXEN | UCR2_TXEN); + writel(temp, sport->port.membase + UCR2); - UCR2((u32)sport->port.membase) |= (UCR2_RXEN | UCR2_TXEN); /* * Enable modem status interrupts */ @@ -437,6 +573,7 @@ error_out1: static void imx_shutdown(struct uart_port *port) { struct imx_port *sport = (struct imx_port *)port; + unsigned long temp; /* * Stop our timer. @@ -454,8 +591,9 @@ static void imx_shutdown(struct uart_port *port) * Disable all interrupts, port and break condition. */ - UCR1((u32)sport->port.membase) &= - ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN | UCR1_UARTEN); + temp = readl(sport->port.membase + UCR1); + temp &= ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN | UCR1_UARTEN); + writel(temp, sport->port.membase + UCR1); } static void @@ -548,18 +686,18 @@ imx_set_termios(struct uart_port *port, struct ktermios *termios, /* * disable interrupts and drain transmitter */ - old_ucr1 = UCR1((u32)sport->port.membase); - UCR1((u32)sport->port.membase) &= ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN); + old_ucr1 = readl(sport->port.membase + UCR1); + writel(old_ucr1 & ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN), + sport->port.membase + UCR1); - while ( !(USR2((u32)sport->port.membase) & USR2_TXDC)) + while ( !(readl(sport->port.membase + USR2) & USR2_TXDC)) barrier(); /* then, disable everything */ - old_txrxen = UCR2((u32)sport->port.membase) & ( UCR2_TXEN | UCR2_RXEN ); - UCR2((u32)sport->port.membase) &= ~( UCR2_TXEN | UCR2_RXEN); - - /* set the parity, stop bits and data size */ - UCR2((u32)sport->port.membase) = ucr2; + old_txrxen = readl(sport->port.membase + UCR2); + writel(old_txrxen & ~( UCR2_TXEN | UCR2_RXEN), + sport->port.membase + UCR2); + old_txrxen &= (UCR2_TXEN | UCR2_RXEN); /* set the baud rate. We assume uartclk = 16 MHz * @@ -567,11 +705,13 @@ imx_set_termios(struct uart_port *port, struct ktermios *termios, * --------- = -------- * uartclk UBMR - 1 */ - UBIR((u32)sport->port.membase) = (baud / 100) - 1; - UBMR((u32)sport->port.membase) = 10000 - 1; + writel((baud / 100) - 1, sport->port.membase + UBIR); + writel(10000 - 1, sport->port.membase + UBMR); + + writel(old_ucr1, sport->port.membase + UCR1); - UCR1((u32)sport->port.membase) = old_ucr1; - UCR2((u32)sport->port.membase) |= old_txrxen; + /* set the parity, stop bits and data size */ + writel(ucr2 | old_txrxen, sport->port.membase + UCR2); if (UART_ENABLE_MS(&sport->port, termios->c_cflag)) imx_enable_ms(&sport->port); @@ -730,9 +870,11 @@ static void __init imx_init_ports(void) static void imx_console_putchar(struct uart_port *port, int ch) { struct imx_port *sport = (struct imx_port *)port; - while ((UTS((u32)sport->port.membase) & UTS_TXFULL)) + + while (readl(sport->port.membase + UTS) & UTS_TXFULL) barrier(); - URTX0((u32)sport->port.membase) = ch; + + writel(ch, sport->port.membase + URTX0); } /* @@ -747,13 +889,14 @@ imx_console_write(struct console *co, const char *s, unsigned int count) /* * First, save UCR1/2 and then disable interrupts */ - old_ucr1 = UCR1((u32)sport->port.membase); - old_ucr2 = UCR2((u32)sport->port.membase); + old_ucr1 = readl(sport->port.membase + UCR1); + old_ucr2 = readl(sport->port.membase + UCR2); - UCR1((u32)sport->port.membase) = - (old_ucr1 | UCR1_UARTCLKEN | UCR1_UARTEN) - & ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN); - UCR2((u32)sport->port.membase) = old_ucr2 | UCR2_TXEN; + writel((old_ucr1 | UCR1_UARTCLKEN | UCR1_UARTEN) & + ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN), + sport->port.membase + UCR1); + + writel(old_ucr2 | UCR2_TXEN, sport->port.membase + UCR2); uart_console_write(&sport->port, s, count, imx_console_putchar); @@ -761,10 +904,10 @@ imx_console_write(struct console *co, const char *s, unsigned int count) * Finally, wait for transmitter to become empty * and restore UCR1/2 */ - while (!(USR2((u32)sport->port.membase) & USR2_TXDC)); + while (!(readl(sport->port.membase + USR2) & USR2_TXDC)); - UCR1((u32)sport->port.membase) = old_ucr1; - UCR2((u32)sport->port.membase) = old_ucr2; + writel(old_ucr1, sport->port.membase + UCR1); + writel(old_ucr2, sport->port.membase + UCR2); } /* @@ -776,13 +919,13 @@ imx_console_get_options(struct imx_port *sport, int *baud, int *parity, int *bits) { - if ( UCR1((u32)sport->port.membase) | UCR1_UARTEN ) { + if ( readl(sport->port.membase + UCR1) | UCR1_UARTEN ) { /* ok, the port was enabled */ unsigned int ucr2, ubir,ubmr, uartclk; unsigned int baud_raw; unsigned int ucfr_rfdiv; - ucr2 = UCR2((u32)sport->port.membase); + ucr2 = readl(sport->port.membase + UCR2); *parity = 'n'; if (ucr2 & UCR2_PREN) { @@ -797,11 +940,10 @@ imx_console_get_options(struct imx_port *sport, int *baud, else *bits = 7; - ubir = UBIR((u32)sport->port.membase) & 0xffff; - ubmr = UBMR((u32)sport->port.membase) & 0xffff; - + ubir = readl(sport->port.membase + UBIR) & 0xffff; + ubmr = readl(sport->port.membase + UBMR) & 0xffff; - ucfr_rfdiv = (UFCR((u32)sport->port.membase) & UFCR_RFDIV) >> 7; + ucfr_rfdiv = (readl(sport->port.membase + UFCR) & UFCR_RFDIV) >> 7; if (ucfr_rfdiv == 6) ucfr_rfdiv = 7; else diff --git a/include/asm-arm/arch-imx/imx-regs.h b/include/asm-arm/arch-imx/imx-regs.h index e56a4e247d62..de6494a4dc6b 100644 --- a/include/asm-arm/arch-imx/imx-regs.h +++ b/include/asm-arm/arch-imx/imx-regs.h @@ -477,122 +477,4 @@ #define LCDISR_EOF (1<<1) #define LCDISR_BOF (1<<0) -/* - * UART Module. Takes the UART base address as argument - */ -#define URXD0(x) __REG( 0x0 + (x)) /* Receiver Register */ -#define URTX0(x) __REG( 0x40 + (x)) /* Transmitter Register */ -#define UCR1(x) __REG( 0x80 + (x)) /* Control Register 1 */ -#define UCR2(x) __REG( 0x84 + (x)) /* Control Register 2 */ -#define UCR3(x) __REG( 0x88 + (x)) /* Control Register 3 */ -#define UCR4(x) __REG( 0x8c + (x)) /* Control Register 4 */ -#define UFCR(x) __REG( 0x90 + (x)) /* FIFO Control Register */ -#define USR1(x) __REG( 0x94 + (x)) /* Status Register 1 */ -#define USR2(x) __REG( 0x98 + (x)) /* Status Register 2 */ -#define UESC(x) __REG( 0x9c + (x)) /* Escape Character Register */ -#define UTIM(x) __REG( 0xa0 + (x)) /* Escape Timer Register */ -#define UBIR(x) __REG( 0xa4 + (x)) /* BRM Incremental Register */ -#define UBMR(x) __REG( 0xa8 + (x)) /* BRM Modulator Register */ -#define UBRC(x) __REG( 0xac + (x)) /* Baud Rate Count Register */ -#define BIPR1(x) __REG( 0xb0 + (x)) /* Incremental Preset Register 1 */ -#define BIPR2(x) __REG( 0xb4 + (x)) /* Incremental Preset Register 2 */ -#define BIPR3(x) __REG( 0xb8 + (x)) /* Incremental Preset Register 3 */ -#define BIPR4(x) __REG( 0xbc + (x)) /* Incremental Preset Register 4 */ -#define BMPR1(x) __REG( 0xc0 + (x)) /* BRM Modulator Register 1 */ -#define BMPR2(x) __REG( 0xc4 + (x)) /* BRM Modulator Register 2 */ -#define BMPR3(x) __REG( 0xc8 + (x)) /* BRM Modulator Register 3 */ -#define BMPR4(x) __REG( 0xcc + (x)) /* BRM Modulator Register 4 */ -#define UTS(x) __REG( 0xd0 + (x)) /* UART Test Register */ - -/* UART Control Register Bit Fields.*/ -#define URXD_CHARRDY (1<<15) -#define URXD_ERR (1<<14) -#define URXD_OVRRUN (1<<13) -#define URXD_FRMERR (1<<12) -#define URXD_BRK (1<<11) -#define URXD_PRERR (1<<10) -#define UCR1_ADEN (1<<15) /* Auto dectect interrupt */ -#define UCR1_ADBR (1<<14) /* Auto detect baud rate */ -#define UCR1_TRDYEN (1<<13) /* Transmitter ready interrupt enable */ -#define UCR1_IDEN (1<<12) /* Idle condition interrupt */ -#define UCR1_RRDYEN (1<<9) /* Recv ready interrupt enable */ -#define UCR1_RDMAEN (1<<8) /* Recv ready DMA enable */ -#define UCR1_IREN (1<<7) /* Infrared interface enable */ -#define UCR1_TXMPTYEN (1<<6) /* Transimitter empty interrupt enable */ -#define UCR1_RTSDEN (1<<5) /* RTS delta interrupt enable */ -#define UCR1_SNDBRK (1<<4) /* Send break */ -#define UCR1_TDMAEN (1<<3) /* Transmitter ready DMA enable */ -#define UCR1_UARTCLKEN (1<<2) /* UART clock enabled */ -#define UCR1_DOZE (1<<1) /* Doze */ -#define UCR1_UARTEN (1<<0) /* UART enabled */ -#define UCR2_ESCI (1<<15) /* Escape seq interrupt enable */ -#define UCR2_IRTS (1<<14) /* Ignore RTS pin */ -#define UCR2_CTSC (1<<13) /* CTS pin control */ -#define UCR2_CTS (1<<12) /* Clear to send */ -#define UCR2_ESCEN (1<<11) /* Escape enable */ -#define UCR2_PREN (1<<8) /* Parity enable */ -#define UCR2_PROE (1<<7) /* Parity odd/even */ -#define UCR2_STPB (1<<6) /* Stop */ -#define UCR2_WS (1<<5) /* Word size */ -#define UCR2_RTSEN (1<<4) /* Request to send interrupt enable */ -#define UCR2_TXEN (1<<2) /* Transmitter enabled */ -#define UCR2_RXEN (1<<1) /* Receiver enabled */ -#define UCR2_SRST (1<<0) /* SW reset */ -#define UCR3_DTREN (1<<13) /* DTR interrupt enable */ -#define UCR3_PARERREN (1<<12) /* Parity enable */ -#define UCR3_FRAERREN (1<<11) /* Frame error interrupt enable */ -#define UCR3_DSR (1<<10) /* Data set ready */ -#define UCR3_DCD (1<<9) /* Data carrier detect */ -#define UCR3_RI (1<<8) /* Ring indicator */ -#define UCR3_TIMEOUTEN (1<<7) /* Timeout interrupt enable */ -#define UCR3_RXDSEN (1<<6) /* Receive status interrupt enable */ -#define UCR3_AIRINTEN (1<<5) /* Async IR wake interrupt enable */ -#define UCR3_AWAKEN (1<<4) /* Async wake interrupt enable */ -#define UCR3_REF25 (1<<3) /* Ref freq 25 MHz */ -#define UCR3_REF30 (1<<2) /* Ref Freq 30 MHz */ -#define UCR3_INVT (1<<1) /* Inverted Infrared transmission */ -#define UCR3_BPEN (1<<0) /* Preset registers enable */ -#define UCR4_CTSTL_32 (32<<10) /* CTS trigger level (32 chars) */ -#define UCR4_INVR (1<<9) /* Inverted infrared reception */ -#define UCR4_ENIRI (1<<8) /* Serial infrared interrupt enable */ -#define UCR4_WKEN (1<<7) /* Wake interrupt enable */ -#define UCR4_REF16 (1<<6) /* Ref freq 16 MHz */ -#define UCR4_IRSC (1<<5) /* IR special case */ -#define UCR4_TCEN (1<<3) /* Transmit complete interrupt enable */ -#define UCR4_BKEN (1<<2) /* Break condition interrupt enable */ -#define UCR4_OREN (1<<1) /* Receiver overrun interrupt enable */ -#define UCR4_DREN (1<<0) /* Recv data ready interrupt enable */ -#define UFCR_RXTL_SHF 0 /* Receiver trigger level shift */ -#define UFCR_RFDIV (7<<7) /* Reference freq divider mask */ -#define UFCR_TXTL_SHF 10 /* Transmitter trigger level shift */ -#define USR1_PARITYERR (1<<15) /* Parity error interrupt flag */ -#define USR1_RTSS (1<<14) /* RTS pin status */ -#define USR1_TRDY (1<<13) /* Transmitter ready interrupt/dma flag */ -#define USR1_RTSD (1<<12) /* RTS delta */ -#define USR1_ESCF (1<<11) /* Escape seq interrupt flag */ -#define USR1_FRAMERR (1<<10) /* Frame error interrupt flag */ -#define USR1_RRDY (1<<9) /* Receiver ready interrupt/dma flag */ -#define USR1_TIMEOUT (1<<7) /* Receive timeout interrupt status */ -#define USR1_RXDS (1<<6) /* Receiver idle interrupt flag */ -#define USR1_AIRINT (1<<5) /* Async IR wake interrupt flag */ -#define USR1_AWAKE (1<<4) /* Aysnc wake interrupt flag */ -#define USR2_ADET (1<<15) /* Auto baud rate detect complete */ -#define USR2_TXFE (1<<14) /* Transmit buffer FIFO empty */ -#define USR2_DTRF (1<<13) /* DTR edge interrupt flag */ -#define USR2_IDLE (1<<12) /* Idle condition */ -#define USR2_IRINT (1<<8) /* Serial infrared interrupt flag */ -#define USR2_WAKE (1<<7) /* Wake */ -#define USR2_RTSF (1<<4) /* RTS edge interrupt flag */ -#define USR2_TXDC (1<<3) /* Transmitter complete */ -#define USR2_BRCD (1<<2) /* Break condition */ -#define USR2_ORE (1<<1) /* Overrun error */ -#define USR2_RDR (1<<0) /* Recv data ready */ -#define UTS_FRCPERR (1<<13) /* Force parity error */ -#define UTS_LOOP (1<<12) /* Loop tx and rx */ -#define UTS_TXEMPTY (1<<6) /* TxFIFO empty */ -#define UTS_RXEMPTY (1<<5) /* RxFIFO empty */ -#define UTS_TXFULL (1<<4) /* TxFIFO full */ -#define UTS_RXFULL (1<<3) /* RxFIFO full */ -#define UTS_SOFTRST (1<<0) /* Software reset */ - #endif // _IMX_REGS_H -- cgit v1.2.3-59-g8ed1b From 28bd3a0dcce11bea6f99a351cc64053dff00196e Mon Sep 17 00:00:00 2001 From: Michael-Luke Jones Date: Sat, 28 Apr 2007 08:31:40 +0100 Subject: [ARM] 4318/2: DSM-G600 Board Support This patch adds support for the D-Link DSM-G600 Rev A. This is an ARM XScale IXP4xx system relatively similar to the NSLU2 and NAS-100D already supported by mainline. An important difference is Gigabit Ethernet support using the Via Velocity chipset. This patch is the combined work of Michael Westerhof and Alessandro Zummo, with contributions from Michael-Luke Jones. This version addresses review comments from rmk and Deepak Saxena. Signed-off-by: Michael-Luke Jones Signed-off-by: Alessandro Zummo Signed-off-by: Michael Westerhof Signed-off-by: Deepak Saxena Signed-off-by: Russell King --- arch/arm/mach-ixp4xx/Kconfig | 9 ++ arch/arm/mach-ixp4xx/Makefile | 2 + arch/arm/mach-ixp4xx/dsmg600-pci.c | 74 ++++++++++++++ arch/arm/mach-ixp4xx/dsmg600-power.c | 125 +++++++++++++++++++++++ arch/arm/mach-ixp4xx/dsmg600-setup.c | 175 +++++++++++++++++++++++++++++++++ include/asm-arm/arch-ixp4xx/dsmg600.h | 57 +++++++++++ include/asm-arm/arch-ixp4xx/hardware.h | 1 + include/asm-arm/arch-ixp4xx/irqs.h | 10 ++ 8 files changed, 453 insertions(+) create mode 100644 arch/arm/mach-ixp4xx/dsmg600-pci.c create mode 100644 arch/arm/mach-ixp4xx/dsmg600-power.c create mode 100644 arch/arm/mach-ixp4xx/dsmg600-setup.c create mode 100644 include/asm-arm/arch-ixp4xx/dsmg600.h (limited to 'include') diff --git a/arch/arm/mach-ixp4xx/Kconfig b/arch/arm/mach-ixp4xx/Kconfig index dd0fb7239a80..9715ef506c24 100644 --- a/arch/arm/mach-ixp4xx/Kconfig +++ b/arch/arm/mach-ixp4xx/Kconfig @@ -95,6 +95,15 @@ config MACH_NAS100D NAS 100d device. For more information on this platform, see http://www.nslu2-linux.org/wiki/NAS100d/HomePage +config MACH_DSMG600 + bool + prompt "D-Link DSM-G600 RevA" + select PCI + help + Say 'Y' here if you want your kernel to support D-Link's + DSM-G600 RevA device. For more information on this platform, + see http://www.nslu2-linux.org/wiki/DSMG600/HomePage + # # Avila and IXDP share the same source for now. Will change in future # diff --git a/arch/arm/mach-ixp4xx/Makefile b/arch/arm/mach-ixp4xx/Makefile index 746e297284ed..3b87c47e06cf 100644 --- a/arch/arm/mach-ixp4xx/Makefile +++ b/arch/arm/mach-ixp4xx/Makefile @@ -12,6 +12,7 @@ obj-pci-$(CONFIG_ARCH_ADI_COYOTE) += coyote-pci.o obj-pci-$(CONFIG_MACH_GTWX5715) += gtwx5715-pci.o obj-pci-$(CONFIG_MACH_NSLU2) += nslu2-pci.o obj-pci-$(CONFIG_MACH_NAS100D) += nas100d-pci.o +obj-pci-$(CONFIG_MACH_DSMG600) += dsmg600-pci.o obj-y += common.o @@ -22,5 +23,6 @@ obj-$(CONFIG_ARCH_ADI_COYOTE) += coyote-setup.o obj-$(CONFIG_MACH_GTWX5715) += gtwx5715-setup.o obj-$(CONFIG_MACH_NSLU2) += nslu2-setup.o nslu2-power.o obj-$(CONFIG_MACH_NAS100D) += nas100d-setup.o nas100d-power.o +obj-$(CONFIG_MACH_DSMG600) += dsmg600-setup.o dsmg600-power.o obj-$(CONFIG_PCI) += $(obj-pci-$(CONFIG_PCI)) common-pci.o diff --git a/arch/arm/mach-ixp4xx/dsmg600-pci.c b/arch/arm/mach-ixp4xx/dsmg600-pci.c new file mode 100644 index 000000000000..9db7e1f42011 --- /dev/null +++ b/arch/arm/mach-ixp4xx/dsmg600-pci.c @@ -0,0 +1,74 @@ +/* + * DSM-G600 board-level PCI initialization + * + * Copyright (C) 2006 Tower Technologies + * Author: Alessandro Zummo + * + * based on ixdp425-pci.c: + * Copyright (C) 2002 Intel Corporation. + * Copyright (C) 2003-2004 MontaVista Software, Inc. + * + * Maintainer: http://www.nslu2-linux.org/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#include +#include +#include + +#include +#include + +void __init dsmg600_pci_preinit(void) +{ + set_irq_type(IRQ_DSMG600_PCI_INTA, IRQT_LOW); + set_irq_type(IRQ_DSMG600_PCI_INTB, IRQT_LOW); + set_irq_type(IRQ_DSMG600_PCI_INTC, IRQT_LOW); + set_irq_type(IRQ_DSMG600_PCI_INTD, IRQT_LOW); + set_irq_type(IRQ_DSMG600_PCI_INTE, IRQT_LOW); + set_irq_type(IRQ_DSMG600_PCI_INTF, IRQT_LOW); + + ixp4xx_pci_preinit(); +} + +static int __init dsmg600_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +{ + static int pci_irq_table[DSMG600_PCI_MAX_DEV][DSMG600_PCI_IRQ_LINES] = + { + { IRQ_DSMG600_PCI_INTE, -1, -1 }, + { IRQ_DSMG600_PCI_INTA, -1, -1 }, + { IRQ_DSMG600_PCI_INTB, IRQ_DSMG600_PCI_INTC, IRQ_DSMG600_PCI_INTD }, + { IRQ_DSMG600_PCI_INTF, -1, -1 }, + }; + + int irq = -1; + + if (slot >= 1 && slot <= DSMG600_PCI_MAX_DEV && + pin >= 1 && pin <= DSMG600_PCI_IRQ_LINES) + irq = pci_irq_table[slot-1][pin-1]; + + return irq; +} + +struct hw_pci __initdata dsmg600_pci = { + .nr_controllers = 1, + .preinit = dsmg600_pci_preinit, + .swizzle = pci_std_swizzle, + .setup = ixp4xx_setup, + .scan = ixp4xx_scan_bus, + .map_irq = dsmg600_map_irq, +}; + +int __init dsmg600_pci_init(void) +{ + if (machine_is_dsmg600()) + pci_common_init(&dsmg600_pci); + + return 0; +} + +subsys_initcall(dsmg600_pci_init); diff --git a/arch/arm/mach-ixp4xx/dsmg600-power.c b/arch/arm/mach-ixp4xx/dsmg600-power.c new file mode 100644 index 000000000000..34717872d076 --- /dev/null +++ b/arch/arm/mach-ixp4xx/dsmg600-power.c @@ -0,0 +1,125 @@ +/* + * arch/arm/mach-ixp4xx/dsmg600-power.c + * + * DSM-G600 Power/Reset driver + * Author: Michael Westerhof + * + * Based on nslu2-power.c + * Copyright (C) 2005 Tower Technologies + * Author: Alessandro Zummo + * + * which was based on nslu2-io.c + * Copyright (C) 2004 Karen Spearel + * + * Maintainers: http://www.nslu2-linux.org/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#include +#include +#include +#include +#include +#include + +#include + +extern void ctrl_alt_del(void); + +/* This is used to make sure the power-button pusher is serious. The button + * must be held until the value of this counter reaches zero. + */ +static volatile int power_button_countdown; + +/* Must hold the button down for at least this many counts to be processed */ +#define PBUTTON_HOLDDOWN_COUNT 4 /* 2 secs */ + +static void dsmg600_power_handler(unsigned long data); +static DEFINE_TIMER(dsmg600_power_timer, dsmg600_power_handler, 0, 0); + +static void dsmg600_power_handler(unsigned long data) +{ + /* This routine is called twice per second to check the + * state of the power button. + */ + + if (*IXP4XX_GPIO_GPINR & DSMG600_PB_BM) { + + /* IO Pin is 1 (button pushed) */ + if (power_button_countdown == 0) { + /* Signal init to do the ctrlaltdel action, this will bypass + * init if it hasn't started and do a kernel_restart. + */ + ctrl_alt_del(); + + /* Change the state of the power LED to "blink" */ + gpio_line_set(DSMG600_LED_PWR_GPIO, IXP4XX_GPIO_LOW); + } + power_button_countdown--; + + } else { + power_button_countdown = PBUTTON_HOLDDOWN_COUNT; + } + + mod_timer(&dsmg600_power_timer, jiffies + msecs_to_jiffies(500)); +} + +static irqreturn_t dsmg600_reset_handler(int irq, void *dev_id) +{ + /* This is the paper-clip reset, it shuts the machine down directly. */ + machine_power_off(); + + return IRQ_HANDLED; +} + +static int __init dsmg600_power_init(void) +{ + if (!(machine_is_dsmg600())) + return 0; + + if (request_irq(DSMG600_RB_IRQ, &dsmg600_reset_handler, + IRQF_DISABLED | IRQF_TRIGGER_LOW, "DSM-G600 reset button", + NULL) < 0) { + + printk(KERN_DEBUG "Reset Button IRQ %d not available\n", + DSMG600_RB_IRQ); + + return -EIO; + } + + /* The power button on the D-Link DSM-G600 is on GPIO 15, but + * it cannot handle interrupts on that GPIO line. So we'll + * have to poll it with a kernel timer. + */ + + /* Make sure that the power button GPIO is set up as an input */ + gpio_line_config(DSMG600_PB_GPIO, IXP4XX_GPIO_IN); + + /* Set the initial value for the power button IRQ handler */ + power_button_countdown = PBUTTON_HOLDDOWN_COUNT; + + mod_timer(&dsmg600_power_timer, jiffies + msecs_to_jiffies(500)); + + return 0; +} + +static void __exit dsmg600_power_exit(void) +{ + if (!(machine_is_dsmg600())) + return; + + del_timer_sync(&dsmg600_power_timer); + + free_irq(DSMG600_RB_IRQ, NULL); +} + +module_init(dsmg600_power_init); +module_exit(dsmg600_power_exit); + +MODULE_AUTHOR("Michael Westerhof "); +MODULE_DESCRIPTION("DSM-G600 Power/Reset driver"); +MODULE_LICENSE("GPL"); diff --git a/arch/arm/mach-ixp4xx/dsmg600-setup.c b/arch/arm/mach-ixp4xx/dsmg600-setup.c new file mode 100644 index 000000000000..1caff65e22cc --- /dev/null +++ b/arch/arm/mach-ixp4xx/dsmg600-setup.c @@ -0,0 +1,175 @@ +/* + * DSM-G600 board-setup + * + * Copyright (C) 2006 Tower Technologies + * Author: Alessandro Zummo + * + * based ixdp425-setup.c: + * Copyright (C) 2003-2004 MontaVista Software, Inc. + * + * Author: Alessandro Zummo + * Maintainers: http://www.nslu2-linux.org/ + */ + +#include +#include +#include + +#include +#include +#include + +static struct flash_platform_data dsmg600_flash_data = { + .map_name = "cfi_probe", + .width = 2, +}; + +static struct resource dsmg600_flash_resource = { + .flags = IORESOURCE_MEM, +}; + +static struct platform_device dsmg600_flash = { + .name = "IXP4XX-Flash", + .id = 0, + .dev.platform_data = &dsmg600_flash_data, + .num_resources = 1, + .resource = &dsmg600_flash_resource, +}; + +static struct ixp4xx_i2c_pins dsmg600_i2c_gpio_pins = { + .sda_pin = DSMG600_SDA_PIN, + .scl_pin = DSMG600_SCL_PIN, +}; + +static struct platform_device dsmg600_i2c_controller = { + .name = "IXP4XX-I2C", + .id = 0, + .dev.platform_data = &dsmg600_i2c_gpio_pins, +}; + +#ifdef CONFIG_LEDS_CLASS +static struct resource dsmg600_led_resources[] = { + { + .name = "power", + .start = DSMG600_LED_PWR_GPIO, + .end = DSMG600_LED_PWR_GPIO, + .flags = IXP4XX_GPIO_HIGH, + }, + { + .name = "wlan", + .start = DSMG600_LED_WLAN_GPIO, + .end = DSMG600_LED_WLAN_GPIO, + .flags = IXP4XX_GPIO_LOW, + }, +}; + +static struct platform_device dsmg600_leds = { + .name = "IXP4XX-GPIO-LED", + .id = -1, + .num_resources = ARRAY_SIZE(dsmg600_led_resources), + .resource = dsmg600_led_resources, +}; +#endif + +static struct resource dsmg600_uart_resources[] = { + { + .start = IXP4XX_UART1_BASE_PHYS, + .end = IXP4XX_UART1_BASE_PHYS + 0x0fff, + .flags = IORESOURCE_MEM, + }, + { + .start = IXP4XX_UART2_BASE_PHYS, + .end = IXP4XX_UART2_BASE_PHYS + 0x0fff, + .flags = IORESOURCE_MEM, + } +}; + +static struct plat_serial8250_port dsmg600_uart_data[] = { + { + .mapbase = IXP4XX_UART1_BASE_PHYS, + .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET, + .irq = IRQ_IXP4XX_UART1, + .flags = UPF_BOOT_AUTOCONF, + .iotype = UPIO_MEM, + .regshift = 2, + .uartclk = IXP4XX_UART_XTAL, + }, + { + .mapbase = IXP4XX_UART2_BASE_PHYS, + .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET, + .irq = IRQ_IXP4XX_UART2, + .flags = UPF_BOOT_AUTOCONF, + .iotype = UPIO_MEM, + .regshift = 2, + .uartclk = IXP4XX_UART_XTAL, + }, + { } +}; + +static struct platform_device dsmg600_uart = { + .name = "serial8250", + .id = PLAT8250_DEV_PLATFORM, + .dev.platform_data = dsmg600_uart_data, + .num_resources = ARRAY_SIZE(dsmg600_uart_resources), + .resource = dsmg600_uart_resources, +}; + +static struct platform_device *dsmg600_devices[] __initdata = { + &dsmg600_i2c_controller, + &dsmg600_flash, +}; + +static void dsmg600_power_off(void) +{ + /* enable the pwr cntl gpio */ + gpio_line_config(DSMG600_PO_GPIO, IXP4XX_GPIO_OUT); + + /* poweroff */ + gpio_line_set(DSMG600_PO_GPIO, IXP4XX_GPIO_HIGH); +} + +static void __init dsmg600_init(void) +{ + ixp4xx_sys_init(); + + /* Make sure that GPIO14 and GPIO15 are not used as clocks */ + *IXP4XX_GPIO_GPCLKR = 0; + + dsmg600_flash_resource.start = IXP4XX_EXP_BUS_BASE(0); + dsmg600_flash_resource.end = + IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1; + + pm_power_off = dsmg600_power_off; + + /* The UART is required on the DSM-G600 (Redboot cannot use the + * NIC) -- do it here so that it does *not* get removed if + * platform_add_devices fails! + */ + (void)platform_device_register(&dsmg600_uart); + + platform_add_devices(dsmg600_devices, ARRAY_SIZE(dsmg600_devices)); + +#ifdef CONFIG_LEDS_CLASS + /* We don't care whether or not this works. */ + (void)platform_device_register(&dsmg600_leds); +#endif +} + +static void __init dsmg600_fixup(struct machine_desc *desc, + struct tag *tags, char **cmdline, struct meminfo *mi) +{ + /* The xtal on this machine is non-standard. */ + ixp4xx_timer_freq = DSMG600_FREQ; +} + +MACHINE_START(DSMG600, "D-Link DSM-G600 RevA") + /* Maintainer: www.nslu2-linux.org */ + .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS, + .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xFFFC, + .boot_params = 0x00000100, + .fixup = dsmg600_fixup, + .map_io = ixp4xx_map_io, + .init_irq = ixp4xx_init_irq, + .timer = &ixp4xx_timer, + .init_machine = dsmg600_init, +MACHINE_END diff --git a/include/asm-arm/arch-ixp4xx/dsmg600.h b/include/asm-arm/arch-ixp4xx/dsmg600.h new file mode 100644 index 000000000000..a19605ad240d --- /dev/null +++ b/include/asm-arm/arch-ixp4xx/dsmg600.h @@ -0,0 +1,57 @@ +/* + * DSM-G600 platform specific definitions + * + * Copyright (C) 2006 Tower Technologies + * Author: Alessandro Zummo + * + * based on ixdp425.h: + * Copyright 2004 (C) MontaVista, Software, Inc. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __ASM_ARCH_HARDWARE_H__ +#error "Do not include this directly, instead #include " +#endif + +#define DSMG600_SDA_PIN 5 +#define DSMG600_SCL_PIN 4 + +/* + * DSMG600 PCI IRQs + */ +#define DSMG600_PCI_MAX_DEV 4 +#define DSMG600_PCI_IRQ_LINES 3 + + +/* PCI controller GPIO to IRQ pin mappings */ +#define DSMG600_PCI_INTA_PIN 11 +#define DSMG600_PCI_INTB_PIN 10 +#define DSMG600_PCI_INTC_PIN 9 +#define DSMG600_PCI_INTD_PIN 8 +#define DSMG600_PCI_INTE_PIN 7 +#define DSMG600_PCI_INTF_PIN 6 + +/* DSM-G600 Timer Setting */ +#define DSMG600_FREQ 66000000 + +/* Buttons */ + +#define DSMG600_PB_GPIO 15 /* power button */ +#define DSMG600_PB_BM (1L << DSMG600_PB_GPIO) + +#define DSMG600_RB_GPIO 3 /* reset button */ + +#define DSMG600_RB_IRQ IRQ_IXP4XX_GPIO3 + +#define DSMG600_PO_GPIO 2 /* power off */ + +/* LEDs */ + +#define DSMG600_LED_PWR_GPIO 0 +#define DSMG600_LED_PWR_BM (1L << DSMG600_LED_PWR_GPIO) + +#define DSMG600_LED_WLAN_GPIO 14 +#define DSMG600_LED_WLAN_BM (1L << DSMG600_LED_WLAN_GPIO) diff --git a/include/asm-arm/arch-ixp4xx/hardware.h b/include/asm-arm/arch-ixp4xx/hardware.h index a0acde3b8862..297ceda08b61 100644 --- a/include/asm-arm/arch-ixp4xx/hardware.h +++ b/include/asm-arm/arch-ixp4xx/hardware.h @@ -44,5 +44,6 @@ #include "prpmc1100.h" #include "nslu2.h" #include "nas100d.h" +#include "dsmg600.h" #endif /* _ASM_ARCH_HARDWARE_H */ diff --git a/include/asm-arm/arch-ixp4xx/irqs.h b/include/asm-arm/arch-ixp4xx/irqs.h index 73a9aa583745..11801605047b 100644 --- a/include/asm-arm/arch-ixp4xx/irqs.h +++ b/include/asm-arm/arch-ixp4xx/irqs.h @@ -118,4 +118,14 @@ #define IRQ_NAS100D_PCI_INTD IRQ_IXP4XX_GPIO8 #define IRQ_NAS100D_PCI_INTE IRQ_IXP4XX_GPIO7 +/* + * D-Link DSM-G600 RevA board IRQs + */ +#define IRQ_DSMG600_PCI_INTA IRQ_IXP4XX_GPIO11 +#define IRQ_DSMG600_PCI_INTB IRQ_IXP4XX_GPIO10 +#define IRQ_DSMG600_PCI_INTC IRQ_IXP4XX_GPIO9 +#define IRQ_DSMG600_PCI_INTD IRQ_IXP4XX_GPIO8 +#define IRQ_DSMG600_PCI_INTE IRQ_IXP4XX_GPIO7 +#define IRQ_DSMG600_PCI_INTF IRQ_IXP4XX_GPIO6 + #endif -- cgit v1.2.3-59-g8ed1b From 0058ca32c3004547ede575668a2be31862b92000 Mon Sep 17 00:00:00 2001 From: Russell King Date: Sat, 5 May 2007 11:57:39 +0100 Subject: [ARM] mm 7: remove duplicated __ioremap() prototypes Signed-off-by: Russell King --- include/asm-arm/arch-iop13xx/io.h | 1 - include/asm-arm/arch-iop32x/io.h | 1 - include/asm-arm/arch-iop33x/io.h | 1 - 3 files changed, 3 deletions(-) (limited to 'include') diff --git a/include/asm-arm/arch-iop13xx/io.h b/include/asm-arm/arch-iop13xx/io.h index 5a7bdb526606..7dfff4ad82b3 100644 --- a/include/asm-arm/arch-iop13xx/io.h +++ b/include/asm-arm/arch-iop13xx/io.h @@ -26,7 +26,6 @@ #define __mem_isa(a) (a) extern void __iomem * __iop13xx_io(unsigned long io_addr); -extern void __iomem * __ioremap(unsigned long, size_t, unsigned long); extern void __iomem *__iop13xx_ioremap(unsigned long cookie, size_t size, unsigned long flags); extern void __iop13xx_iounmap(void __iomem *addr); diff --git a/include/asm-arm/arch-iop32x/io.h b/include/asm-arm/arch-iop32x/io.h index 5f570a598a37..994f16af5057 100644 --- a/include/asm-arm/arch-iop32x/io.h +++ b/include/asm-arm/arch-iop32x/io.h @@ -13,7 +13,6 @@ #include -extern void __iomem * __ioremap(unsigned long, size_t, unsigned long); extern void __iomem *__iop3xx_ioremap(unsigned long cookie, size_t size, unsigned long flags); extern void __iop3xx_iounmap(void __iomem *addr); diff --git a/include/asm-arm/arch-iop33x/io.h b/include/asm-arm/arch-iop33x/io.h index 1bb5071e1fa8..993f7589b29f 100644 --- a/include/asm-arm/arch-iop33x/io.h +++ b/include/asm-arm/arch-iop33x/io.h @@ -13,7 +13,6 @@ #include -extern void __iomem * __ioremap(unsigned long, size_t, unsigned long); extern void __iomem *__iop3xx_ioremap(unsigned long cookie, size_t size, unsigned long flags); extern void __iop3xx_iounmap(void __iomem *addr); -- cgit v1.2.3-59-g8ed1b From ad902cb9e29a4d6ff155f682ae79d8d8b2b73a9b Mon Sep 17 00:00:00 2001 From: Russell King Date: Sat, 5 May 2007 11:59:13 +0100 Subject: [ARM] iop: add missing parens in macro Fix: drivers/serial/8250.c:1837: warning: suggest parentheses around arithmetic in operand of | due to a macro argument being used without required parenthesis. Signed-off-by: Russell King --- include/asm-arm/hardware/iop3xx.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-arm/hardware/iop3xx.h b/include/asm-arm/hardware/iop3xx.h index ebbcd9be3fe5..63feceb7ede5 100644 --- a/include/asm-arm/hardware/iop3xx.h +++ b/include/asm-arm/hardware/iop3xx.h @@ -42,7 +42,7 @@ extern int init_atu; IOP3XX_PERIPHERAL_SIZE - 1) #define IOP3XX_PERIPHERAL_UPPER_VA (IOP3XX_PERIPHERAL_VIRT_BASE +\ IOP3XX_PERIPHERAL_SIZE - 1) -#define IOP3XX_PMMR_PHYS_TO_VIRT(addr) (u32) ((u32) addr -\ +#define IOP3XX_PMMR_PHYS_TO_VIRT(addr) (u32) ((u32) (addr) -\ (IOP3XX_PERIPHERAL_PHYS_BASE\ - IOP3XX_PERIPHERAL_VIRT_BASE)) #define IOP3XX_REG_ADDR(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + (reg)) -- cgit v1.2.3-59-g8ed1b From 0af92befeb4b330c46cce6b520b2cc775cd6931f Mon Sep 17 00:00:00 2001 From: Russell King Date: Sat, 5 May 2007 20:28:16 +0100 Subject: [ARM] mm 9: add additional device memory types Add cached device type for ioremap_cached(). Group all device memory types together, and ensure that they all have a "MT_DEVICE" prefix. Signed-off-by: Russell King --- arch/arm/mach-ixp2000/core.c | 22 +++++++++--------- arch/arm/mach-ixp2000/enp2611.c | 6 ++--- arch/arm/mm/mmu.c | 50 +++++++++++++++++++++++------------------ include/asm-arm/mach/map.h | 20 ++++++++++------- 4 files changed, 54 insertions(+), 44 deletions(-) (limited to 'include') diff --git a/arch/arm/mach-ixp2000/core.c b/arch/arm/mach-ixp2000/core.c index 27b7480f4afe..9cf2498dc99e 100644 --- a/arch/arm/mach-ixp2000/core.c +++ b/arch/arm/mach-ixp2000/core.c @@ -84,59 +84,59 @@ static struct map_desc ixp2000_io_desc[] __initdata = { .virtual = IXP2000_CAP_VIRT_BASE, .pfn = __phys_to_pfn(IXP2000_CAP_PHYS_BASE), .length = IXP2000_CAP_SIZE, - .type = MT_IXP2000_DEVICE, + .type = MT_DEVICE_IXP2000, }, { .virtual = IXP2000_INTCTL_VIRT_BASE, .pfn = __phys_to_pfn(IXP2000_INTCTL_PHYS_BASE), .length = IXP2000_INTCTL_SIZE, - .type = MT_IXP2000_DEVICE, + .type = MT_DEVICE_IXP2000, }, { .virtual = IXP2000_PCI_CREG_VIRT_BASE, .pfn = __phys_to_pfn(IXP2000_PCI_CREG_PHYS_BASE), .length = IXP2000_PCI_CREG_SIZE, - .type = MT_IXP2000_DEVICE, + .type = MT_DEVICE_IXP2000, }, { .virtual = IXP2000_PCI_CSR_VIRT_BASE, .pfn = __phys_to_pfn(IXP2000_PCI_CSR_PHYS_BASE), .length = IXP2000_PCI_CSR_SIZE, - .type = MT_IXP2000_DEVICE, + .type = MT_DEVICE_IXP2000, }, { .virtual = IXP2000_MSF_VIRT_BASE, .pfn = __phys_to_pfn(IXP2000_MSF_PHYS_BASE), .length = IXP2000_MSF_SIZE, - .type = MT_IXP2000_DEVICE, + .type = MT_DEVICE_IXP2000, }, { .virtual = IXP2000_SCRATCH_RING_VIRT_BASE, .pfn = __phys_to_pfn(IXP2000_SCRATCH_RING_PHYS_BASE), .length = IXP2000_SCRATCH_RING_SIZE, - .type = MT_IXP2000_DEVICE, + .type = MT_DEVICE_IXP2000, }, { .virtual = IXP2000_SRAM0_VIRT_BASE, .pfn = __phys_to_pfn(IXP2000_SRAM0_PHYS_BASE), .length = IXP2000_SRAM0_SIZE, - .type = MT_IXP2000_DEVICE, + .type = MT_DEVICE_IXP2000, }, { .virtual = IXP2000_PCI_IO_VIRT_BASE, .pfn = __phys_to_pfn(IXP2000_PCI_IO_PHYS_BASE), .length = IXP2000_PCI_IO_SIZE, - .type = MT_IXP2000_DEVICE, + .type = MT_DEVICE_IXP2000, }, { .virtual = IXP2000_PCI_CFG0_VIRT_BASE, .pfn = __phys_to_pfn(IXP2000_PCI_CFG0_PHYS_BASE), .length = IXP2000_PCI_CFG0_SIZE, - .type = MT_IXP2000_DEVICE, + .type = MT_DEVICE_IXP2000, }, { .virtual = IXP2000_PCI_CFG1_VIRT_BASE, .pfn = __phys_to_pfn(IXP2000_PCI_CFG1_PHYS_BASE), .length = IXP2000_PCI_CFG1_SIZE, - .type = MT_IXP2000_DEVICE, + .type = MT_DEVICE_IXP2000, } }; void __init ixp2000_map_io(void) { /* - * On IXP2400 CPUs we need to use MT_IXP2000_DEVICE so that + * On IXP2400 CPUs we need to use MT_DEVICE_IXP2000 so that * XCB=101 (to avoid triggering erratum #66), and given that * this mode speeds up I/O accesses and we have write buffer * flushes in the right places anyway, it doesn't hurt to use diff --git a/arch/arm/mach-ixp2000/enp2611.c b/arch/arm/mach-ixp2000/enp2611.c index ac29298c5d3f..500e997ba7a4 100644 --- a/arch/arm/mach-ixp2000/enp2611.c +++ b/arch/arm/mach-ixp2000/enp2611.c @@ -70,17 +70,17 @@ static struct map_desc enp2611_io_desc[] __initdata = { .virtual = ENP2611_CALEB_VIRT_BASE, .pfn = __phys_to_pfn(ENP2611_CALEB_PHYS_BASE), .length = ENP2611_CALEB_SIZE, - .type = MT_IXP2000_DEVICE, + .type = MT_DEVICE_IXP2000, }, { .virtual = ENP2611_PM3386_0_VIRT_BASE, .pfn = __phys_to_pfn(ENP2611_PM3386_0_PHYS_BASE), .length = ENP2611_PM3386_0_SIZE, - .type = MT_IXP2000_DEVICE, + .type = MT_DEVICE_IXP2000, }, { .virtual = ENP2611_PM3386_1_VIRT_BASE, .pfn = __phys_to_pfn(ENP2611_PM3386_1_PHYS_BASE), .length = ENP2611_PM3386_1_SIZE, - .type = MT_IXP2000_DEVICE, + .type = MT_DEVICE_IXP2000, } }; diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c index 44f385a3eb3f..2ba1530d1ce1 100644 --- a/arch/arm/mm/mmu.c +++ b/arch/arm/mm/mmu.c @@ -176,14 +176,35 @@ void adjust_cr(unsigned long mask, unsigned long set) } #endif +#define PROT_PTE_DEVICE L_PTE_PRESENT|L_PTE_YOUNG|L_PTE_DIRTY|L_PTE_WRITE +#define PROT_SECT_DEVICE PMD_TYPE_SECT|PMD_SECT_XN|PMD_SECT_AP_WRITE + static struct mem_type mem_types[] = { - [MT_DEVICE] = { - .prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY | - L_PTE_WRITE, - .prot_l1 = PMD_TYPE_TABLE, - .prot_sect = PMD_TYPE_SECT | PMD_SECT_XN | PMD_SECT_UNCACHED | - PMD_SECT_AP_WRITE, - .domain = DOMAIN_IO, + [MT_DEVICE] = { /* Strongly ordered / ARMv6 shared device */ + .prot_pte = PROT_PTE_DEVICE, + .prot_l1 = PMD_TYPE_TABLE, + .prot_sect = PROT_SECT_DEVICE | PMD_SECT_UNCACHED, + .domain = DOMAIN_IO, + }, + [MT_DEVICE_NONSHARED] = { /* ARMv6 non-shared device */ + .prot_pte = PROT_PTE_DEVICE, + .prot_pte_ext = PTE_EXT_TEX(2), + .prot_l1 = PMD_TYPE_TABLE, + .prot_sect = PROT_SECT_DEVICE | PMD_SECT_TEX(2), + .domain = DOMAIN_IO, + }, + [MT_DEVICE_CACHED] = { /* ioremap_cached */ + .prot_pte = PROT_PTE_DEVICE | L_PTE_CACHEABLE | L_PTE_BUFFERABLE, + .prot_l1 = PMD_TYPE_TABLE, + .prot_sect = PROT_SECT_DEVICE | PMD_SECT_WB, + .domain = DOMAIN_IO, + }, + [MT_DEVICE_IXP2000] = { /* IXP2400 requires XCB=101 for on-chip I/O */ + .prot_pte = PROT_PTE_DEVICE, + .prot_l1 = PMD_TYPE_TABLE, + .prot_sect = PROT_SECT_DEVICE | PMD_SECT_BUFFERABLE | + PMD_SECT_TEX(1), + .domain = DOMAIN_IO, }, [MT_CACHECLEAN] = { .prot_sect = PMD_TYPE_SECT | PMD_SECT_XN, @@ -213,21 +234,6 @@ static struct mem_type mem_types[] = { .prot_sect = PMD_TYPE_SECT, .domain = DOMAIN_KERNEL, }, - [MT_IXP2000_DEVICE] = { /* IXP2400 requires XCB=101 for on-chip I/O */ - .prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY | - L_PTE_WRITE, - .prot_l1 = PMD_TYPE_TABLE, - .prot_sect = PMD_TYPE_SECT | PMD_SECT_XN | PMD_SECT_UNCACHED | - PMD_SECT_AP_WRITE | PMD_SECT_BUFFERABLE | - PMD_SECT_TEX(1), - .domain = DOMAIN_IO, - }, - [MT_NONSHARED_DEVICE] = { - .prot_l1 = PMD_TYPE_TABLE, - .prot_sect = PMD_TYPE_SECT | PMD_SECT_XN | PMD_SECT_NONSHARED_DEV | - PMD_SECT_AP_WRITE, - .domain = DOMAIN_IO, - } }; const struct mem_type *get_mem_type(unsigned int type) diff --git a/include/asm-arm/mach/map.h b/include/asm-arm/mach/map.h index cef5364ed5fe..8afef40730af 100644 --- a/include/asm-arm/mach/map.h +++ b/include/asm-arm/mach/map.h @@ -17,14 +17,18 @@ struct map_desc { }; #define MT_DEVICE 0 -#define MT_CACHECLEAN 1 -#define MT_MINICLEAN 2 -#define MT_LOW_VECTORS 3 -#define MT_HIGH_VECTORS 4 -#define MT_MEMORY 5 -#define MT_ROM 6 -#define MT_IXP2000_DEVICE 7 -#define MT_NONSHARED_DEVICE 8 +#define MT_DEVICE_NONSHARED 1 +#define MT_DEVICE_CACHED 2 +#define MT_DEVICE_IXP2000 3 +#define MT_CACHECLEAN 4 +#define MT_MINICLEAN 5 +#define MT_LOW_VECTORS 6 +#define MT_HIGH_VECTORS 7 +#define MT_MEMORY 8 +#define MT_ROM 9 + +#define MT_NONSHARED_DEVICE MT_DEVICE_NONSHARED +#define MT_IXP2000_DEVICE MT_DEVICE_IXP2000 #ifdef CONFIG_MMU extern void iotable_init(struct map_desc *, int); -- cgit v1.2.3-59-g8ed1b From 3603ab2b62ad8372fc93816b080b370dd55d7cec Mon Sep 17 00:00:00 2001 From: Russell King Date: Sat, 5 May 2007 20:59:27 +0100 Subject: [ARM] mm 10: allow memory type to be specified with ioremap __ioremap() took a set of page table flags (specifically the cacheable and bufferable bits) to control the mapping type. However, with the advent of ARMv6, this is far too limited. Replace the page table flags with a memory type index, so that the desired attributes can be selected from the mem_type table. Finally, to prevent silent miscompilation due to the differing arguments, rename the __ioremap() and __ioremap_pfn() functions. Signed-off-by: Russell King --- arch/arm/mach-iop13xx/io.c | 10 +++++----- arch/arm/mach-iop13xx/pci.c | 8 ++++---- arch/arm/mm/ioremap.c | 20 +++++++++----------- arch/arm/mm/nommu.c | 12 ++++++------ arch/arm/plat-iop/io.c | 4 ++-- include/asm-arm/arch-ixp23xx/io.h | 4 ++-- include/asm-arm/arch-ixp4xx/io.h | 4 ++-- include/asm-arm/io.h | 33 +++++++++++++++++++++------------ include/asm-arm/mach/map.h | 7 +++---- 9 files changed, 54 insertions(+), 48 deletions(-) (limited to 'include') diff --git a/arch/arm/mach-iop13xx/io.c b/arch/arm/mach-iop13xx/io.c index e79a1b62600f..5b22fdeca52c 100644 --- a/arch/arm/mach-iop13xx/io.c +++ b/arch/arm/mach-iop13xx/io.c @@ -41,7 +41,7 @@ void * __iomem __iop13xx_io(unsigned long io_addr) EXPORT_SYMBOL(__iop13xx_io); void * __iomem __iop13xx_ioremap(unsigned long cookie, size_t size, - unsigned long flags) + unsigned int mtype) { void __iomem * retval; @@ -61,9 +61,9 @@ void * __iomem __iop13xx_ioremap(unsigned long cookie, size_t size, (cookie - IOP13XX_PCIE_LOWER_MEM_RA)); break; case IOP13XX_PBI_LOWER_MEM_RA ... IOP13XX_PBI_UPPER_MEM_RA: - retval = __ioremap(IOP13XX_PBI_LOWER_MEM_PA + - (cookie - IOP13XX_PBI_LOWER_MEM_RA), - size, flags); + retval = __arm_ioremap(IOP13XX_PBI_LOWER_MEM_PA + + (cookie - IOP13XX_PBI_LOWER_MEM_RA), + size, mtype); break; case IOP13XX_PCIE_LOWER_IO_PA ... IOP13XX_PCIE_UPPER_IO_PA: retval = (void *) IOP13XX_PCIE_IO_PHYS_TO_VIRT(cookie); @@ -75,7 +75,7 @@ void * __iomem __iop13xx_ioremap(unsigned long cookie, size_t size, retval = (void *) IOP13XX_PMMR_PHYS_TO_VIRT(cookie); break; default: - retval = __ioremap(cookie, size, flags); + retval = __arm_ioremap(cookie, size, mtype); } return retval; diff --git a/arch/arm/mach-iop13xx/pci.c b/arch/arm/mach-iop13xx/pci.c index 89ec70ea3187..d85b88fcb7e8 100644 --- a/arch/arm/mach-iop13xx/pci.c +++ b/arch/arm/mach-iop13xx/pci.c @@ -88,9 +88,9 @@ void iop13xx_map_pci_memory(void) if (end) { iop13xx_atux_mem_base = - (u32) __ioremap_pfn( + (u32) __arm_ioremap_pfn( __phys_to_pfn(IOP13XX_PCIX_LOWER_MEM_PA) - , 0, iop13xx_atux_mem_size, 0); + , 0, iop13xx_atux_mem_size, MT_DEVICE); if (!iop13xx_atux_mem_base) { printk("%s: atux allocation " "failed\n", __FUNCTION__); @@ -114,9 +114,9 @@ void iop13xx_map_pci_memory(void) if (end) { iop13xx_atue_mem_base = - (u32) __ioremap_pfn( + (u32) __arm_ioremap_pfn( __phys_to_pfn(IOP13XX_PCIE_LOWER_MEM_PA) - , 0, iop13xx_atue_mem_size, 0); + , 0, iop13xx_atue_mem_size, MT_DEVICE); if (!iop13xx_atue_mem_base) { printk("%s: atue allocation " "failed\n", __FUNCTION__); diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c index 216623eece35..d6167ad4e011 100644 --- a/arch/arm/mm/ioremap.c +++ b/arch/arm/mm/ioremap.c @@ -262,11 +262,10 @@ remap_area_supersections(unsigned long virt, unsigned long pfn, * mapping. See include/asm-arm/proc-armv/pgtable.h for more information. */ void __iomem * -__ioremap_pfn(unsigned long pfn, unsigned long offset, size_t size, - unsigned long flags) +__arm_ioremap_pfn(unsigned long pfn, unsigned long offset, size_t size, + unsigned int mtype) { const struct mem_type *type; - struct mem_type t; int err; unsigned long addr; struct vm_struct * area; @@ -277,10 +276,9 @@ __ioremap_pfn(unsigned long pfn, unsigned long offset, size_t size, if (pfn >= 0x100000 && (__pfn_to_phys(pfn) & ~SUPERSECTION_MASK)) return NULL; - t = *get_mem_type(MT_DEVICE); - t.prot_sect |= flags; - t.prot_pte |= flags; - type = &t; + type = get_mem_type(mtype); + if (!type) + return NULL; size = PAGE_ALIGN(size); @@ -311,10 +309,10 @@ __ioremap_pfn(unsigned long pfn, unsigned long offset, size_t size, flush_cache_vmap(addr, addr + size); return (void __iomem *) (offset + addr); } -EXPORT_SYMBOL(__ioremap_pfn); +EXPORT_SYMBOL(__arm_ioremap_pfn); void __iomem * -__ioremap(unsigned long phys_addr, size_t size, unsigned long flags) +__arm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype) { unsigned long last_addr; unsigned long offset = phys_addr & ~PAGE_MASK; @@ -332,9 +330,9 @@ __ioremap(unsigned long phys_addr, size_t size, unsigned long flags) */ size = PAGE_ALIGN(last_addr + 1) - phys_addr; - return __ioremap_pfn(pfn, offset, size, flags); + return __arm_ioremap_pfn(pfn, offset, size, mtype); } -EXPORT_SYMBOL(__ioremap); +EXPORT_SYMBOL(__arm_ioremap); void __iounmap(volatile void __iomem *addr) { diff --git a/arch/arm/mm/nommu.c b/arch/arm/mm/nommu.c index 05818fc0c705..8cd3a60954f0 100644 --- a/arch/arm/mm/nommu.c +++ b/arch/arm/mm/nommu.c @@ -62,21 +62,21 @@ void flush_dcache_page(struct page *page) } EXPORT_SYMBOL(flush_dcache_page); -void __iomem *__ioremap_pfn(unsigned long pfn, unsigned long offset, - size_t size, unsigned long flags) +void __iomem *__arm_ioremap_pfn(unsigned long pfn, unsigned long offset, + size_t size, unsigned int mtype) { if (pfn >= (0x100000000ULL >> PAGE_SHIFT)) return NULL; return (void __iomem *) (offset + (pfn << PAGE_SHIFT)); } -EXPORT_SYMBOL(__ioremap_pfn); +EXPORT_SYMBOL(__arm_ioremap_pfn); -void __iomem *__ioremap(unsigned long phys_addr, size_t size, - unsigned long flags) +void __iomem *__arm_ioremap(unsigned long phys_addr, size_t size, + unsigned int mtype) { return (void __iomem *)phys_addr; } -EXPORT_SYMBOL(__ioremap); +EXPORT_SYMBOL(__arm_ioremap); void __iounmap(volatile void __iomem *addr) { diff --git a/arch/arm/plat-iop/io.c b/arch/arm/plat-iop/io.c index f7eccecf2e47..498675d028d0 100644 --- a/arch/arm/plat-iop/io.c +++ b/arch/arm/plat-iop/io.c @@ -22,7 +22,7 @@ #include void * __iomem __iop3xx_ioremap(unsigned long cookie, size_t size, - unsigned long flags) + unsigned int mtype) { void __iomem * retval; @@ -34,7 +34,7 @@ void * __iomem __iop3xx_ioremap(unsigned long cookie, size_t size, retval = (void *) IOP3XX_PMMR_PHYS_TO_VIRT(cookie); break; default: - retval = __ioremap(cookie, size, flags); + retval = __arm_ioremap(cookie, size, mtype); } return retval; diff --git a/include/asm-arm/arch-ixp23xx/io.h b/include/asm-arm/arch-ixp23xx/io.h index 18415a81ac74..66f5bafc315c 100644 --- a/include/asm-arm/arch-ixp23xx/io.h +++ b/include/asm-arm/arch-ixp23xx/io.h @@ -23,7 +23,7 @@ #include /* For BUG */ static inline void __iomem * -ixp23xx_ioremap(unsigned long addr, unsigned long size, unsigned long flags) +ixp23xx_ioremap(unsigned long addr, unsigned long size, unsigned int mtype) { if (addr >= IXP23XX_PCI_MEM_START && addr <= IXP23XX_PCI_MEM_START + IXP23XX_PCI_MEM_SIZE) { @@ -34,7 +34,7 @@ ixp23xx_ioremap(unsigned long addr, unsigned long size, unsigned long flags) ((addr - IXP23XX_PCI_MEM_START) + IXP23XX_PCI_MEM_VIRT); } - return __ioremap(addr, size, flags); + return __arm_ioremap(addr, size, mtype); } static inline void diff --git a/include/asm-arm/arch-ixp4xx/io.h b/include/asm-arm/arch-ixp4xx/io.h index a41ba229c564..b27c910adf9d 100644 --- a/include/asm-arm/arch-ixp4xx/io.h +++ b/include/asm-arm/arch-ixp4xx/io.h @@ -59,10 +59,10 @@ extern int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data); * fallback to the default. */ static inline void __iomem * -__ixp4xx_ioremap(unsigned long addr, size_t size, unsigned long flags) +__ixp4xx_ioremap(unsigned long addr, size_t size, unsigned int mtype) { if((addr < 0x48000000) || (addr > 0x4fffffff)) - return __ioremap(addr, size, flags); + return __arm_ioremap(addr, size, mtype); return (void *)addr; } diff --git a/include/asm-arm/io.h b/include/asm-arm/io.h index 5f60b4220906..8261ff9e7955 100644 --- a/include/asm-arm/io.h +++ b/include/asm-arm/io.h @@ -56,13 +56,22 @@ extern void __raw_readsl(const void __iomem *addr, void *data, int longlen); /* * Architecture ioremap implementation. - * - * __ioremap takes CPU physical address. - * - * __ioremap_pfn takes a Page Frame Number and an offset into that page */ -extern void __iomem * __ioremap_pfn(unsigned long, unsigned long, size_t, unsigned long); -extern void __iomem * __ioremap(unsigned long, size_t, unsigned long); +#define MT_DEVICE 0 +#define MT_DEVICE_NONSHARED 1 +#define MT_DEVICE_CACHED 2 +#define MT_DEVICE_IXP2000 3 +/* + * types 4 onwards can be found in asm/mach/map.h and are undefined + * for ioremap + */ + +/* + * __arm_ioremap takes CPU physical address. + * __arm_ioremap_pfn takes a Page Frame Number and an offset into that page + */ +extern void __iomem * __arm_ioremap_pfn(unsigned long, unsigned long, size_t, unsigned int); +extern void __iomem * __arm_ioremap(unsigned long, size_t, unsigned int); extern void __iounmap(volatile void __iomem *addr); /* @@ -203,14 +212,14 @@ extern void _memset_io(volatile void __iomem *, int, size_t); * */ #ifndef __arch_ioremap -#define ioremap(cookie,size) __ioremap(cookie,size,0) -#define ioremap_nocache(cookie,size) __ioremap(cookie,size,0) -#define ioremap_cached(cookie,size) __ioremap(cookie,size,L_PTE_CACHEABLE) +#define ioremap(cookie,size) __arm_ioremap(cookie, size, MT_DEVICE) +#define ioremap_nocache(cookie,size) __arm_ioremap(cookie, size, MT_DEVICE) +#define ioremap_cached(cookie,size) __arm_ioremap(cookie, size, MT_DEVICE_CACHED) #define iounmap(cookie) __iounmap(cookie) #else -#define ioremap(cookie,size) __arch_ioremap((cookie),(size),0) -#define ioremap_nocache(cookie,size) __arch_ioremap((cookie),(size),0) -#define ioremap_cached(cookie,size) __arch_ioremap((cookie),(size),L_PTE_CACHEABLE) +#define ioremap(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE) +#define ioremap_nocache(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE) +#define ioremap_cached(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE_CACHED) #define iounmap(cookie) __arch_iounmap(cookie) #endif diff --git a/include/asm-arm/mach/map.h b/include/asm-arm/mach/map.h index 8afef40730af..7ef3c8390180 100644 --- a/include/asm-arm/mach/map.h +++ b/include/asm-arm/mach/map.h @@ -9,6 +9,8 @@ * * Page table mapping constructs and function prototypes */ +#include + struct map_desc { unsigned long virtual; unsigned long pfn; @@ -16,10 +18,7 @@ struct map_desc { unsigned int type; }; -#define MT_DEVICE 0 -#define MT_DEVICE_NONSHARED 1 -#define MT_DEVICE_CACHED 2 -#define MT_DEVICE_IXP2000 3 +/* types 0-3 are defined in asm/io.h */ #define MT_CACHECLEAN 4 #define MT_MINICLEAN 5 #define MT_LOW_VECTORS 6 -- cgit v1.2.3-59-g8ed1b From d0fdb5a58e17cf788c76a52a53174dbc8fb58ee9 Mon Sep 17 00:00:00 2001 From: Arnaud Patard Date: Sat, 5 May 2007 15:55:09 +0100 Subject: [ARM] 4360/1: S3C24XX: regs-udc.h remove unused macro The S3C2410_UDC_SETIX() macro is not used and won't be used by the udc driver, so delete it. Signed-off-by: Arnaud Patard Signed-off-by: Ben Dooks Signed-off-by: Russell King --- include/asm-arm/arch-s3c2410/regs-udc.h | 4 ---- 1 file changed, 4 deletions(-) (limited to 'include') diff --git a/include/asm-arm/arch-s3c2410/regs-udc.h b/include/asm-arm/arch-s3c2410/regs-udc.h index 26be920049eb..e1e9805d2d9a 100644 --- a/include/asm-arm/arch-s3c2410/regs-udc.h +++ b/include/asm-arm/arch-s3c2410/regs-udc.h @@ -135,10 +135,6 @@ #define S3C2410_UDC_OCSR2_ISO (1<<6) // R/W #define S3C2410_UDC_OCSR2_DMAIEN (1<<5) // R/W -#define S3C2410_UDC_SETIX(base,x) \ - writel(S3C2410_UDC_INDEX_ ## x, base+S3C2410_UDC_INDEX_REG); - - #define S3C2410_UDC_EP0_CSR_OPKRDY (1<<0) #define S3C2410_UDC_EP0_CSR_IPKRDY (1<<1) #define S3C2410_UDC_EP0_CSR_SENTSTL (1<<2) -- cgit v1.2.3-59-g8ed1b From 5ba6d3febd4978f31b2c523d64d381603923a709 Mon Sep 17 00:00:00 2001 From: Russell King Date: Sun, 6 May 2007 13:56:26 +0100 Subject: [ARM] Move syscall saving out of the way of utrace utrace removes the ptrace_message field in task_struct. Move our use of this field into a new member in thread_info called "syscall" Signed-off-by: Russell King --- arch/arm/kernel/ptrace.c | 6 +++--- include/asm-arm/thread_info.h | 1 + 2 files changed, 4 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c index e594b84cca83..13af4006a40f 100644 --- a/arch/arm/kernel/ptrace.c +++ b/arch/arm/kernel/ptrace.c @@ -779,8 +779,8 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) break; case PTRACE_SET_SYSCALL: + task_thread_info(child)->syscall = data; ret = 0; - child->ptrace_message = data; break; #ifdef CONFIG_CRUNCH @@ -817,7 +817,7 @@ asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno) ip = regs->ARM_ip; regs->ARM_ip = why; - current->ptrace_message = scno; + current_thread_info()->syscall = scno; /* the 0x80 provides a way for the tracing parent to distinguish between a syscall stop and SIGTRAP delivery */ @@ -834,5 +834,5 @@ asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno) } regs->ARM_ip = ip; - return current->ptrace_message; + return current_thread_info()->syscall; } diff --git a/include/asm-arm/thread_info.h b/include/asm-arm/thread_info.h index 5014794f9eb3..eae85b09db2e 100644 --- a/include/asm-arm/thread_info.h +++ b/include/asm-arm/thread_info.h @@ -57,6 +57,7 @@ struct thread_info { __u32 cpu; /* cpu */ __u32 cpu_domain; /* cpu domain */ struct cpu_context_save cpu_context; /* cpu context */ + __u32 syscall; /* syscall number */ __u8 used_cp[16]; /* thread used copro */ unsigned long tp_value; struct crunch_state crunchstate; -- cgit v1.2.3-59-g8ed1b From 1b11652286a06988f721b506b094d026e8892e2c Mon Sep 17 00:00:00 2001 From: Russell King Date: Sun, 6 May 2007 14:49:56 +0100 Subject: [ARM] Add comments marking in-use ptrace numbers Signed-off-by: Russell King --- include/asm-arm/ptrace.h | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) (limited to 'include') diff --git a/include/asm-arm/ptrace.h b/include/asm-arm/ptrace.h index 5a8ef787dbf8..2d0dad8c10ac 100644 --- a/include/asm-arm/ptrace.h +++ b/include/asm-arm/ptrace.h @@ -10,23 +10,19 @@ #ifndef __ASM_ARM_PTRACE_H #define __ASM_ARM_PTRACE_H - #define PTRACE_GETREGS 12 #define PTRACE_SETREGS 13 #define PTRACE_GETFPREGS 14 #define PTRACE_SETFPREGS 15 - +/* PTRACE_ATTACH is 16 */ +/* PTRACE_DETACH is 17 */ #define PTRACE_GETWMMXREGS 18 #define PTRACE_SETWMMXREGS 19 - +/* 20 is unused */ #define PTRACE_OLDSETOPTIONS 21 - #define PTRACE_GET_THREAD_AREA 22 - #define PTRACE_SET_SYSCALL 23 - /* PTRACE_SYSCALL is 24 */ - #define PTRACE_GETCRUNCHREGS 25 #define PTRACE_SETCRUNCHREGS 26 -- cgit v1.2.3-59-g8ed1b