From 278ae6040397f37fa6a96a6b86ed02d4762080a7 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 22 Sep 2017 14:31:13 +0900 Subject: kbuild: link-vmlinux.sh: simplify .version increment Since commit 1f2bfbd00e46 ("kbuild: link of vmlinux moved to a script"), it is easy to increment .version without using a temporary file .old_version. I do not see anybody who creates the .tmp_version. Probably it is a left-over of commit 4e25d8bb9550fb ("[PATCH] kbuild: adjust .version updating"). Just remove it. Signed-off-by: Masahiro Yamada --- scripts/link-vmlinux.sh | 15 +++++---------- 1 file changed, 5 insertions(+), 10 deletions(-) (limited to 'scripts') diff --git a/scripts/link-vmlinux.sh b/scripts/link-vmlinux.sh index e7b7eee31538..0cdb25b66e6f 100755 --- a/scripts/link-vmlinux.sh +++ b/scripts/link-vmlinux.sh @@ -187,10 +187,8 @@ sortextable() # Delete output files in case of error cleanup() { - rm -f .old_version rm -f .tmp_System.map rm -f .tmp_kallsyms* - rm -f .tmp_version rm -f .tmp_vmlinux* rm -f built-in.o rm -f System.map @@ -238,12 +236,12 @@ esac # Update version info GEN .version -if [ ! -r .version ]; then - rm -f .version; - echo 1 >.version; +if [ -r .version ]; then + VERSION=$(expr 0$(cat .version) + 1) + echo $VERSION > .version else - mv .version .old_version; - expr 0$(cat .old_version) + 1 >.version; + rm -f .version + echo 1 > .version fi; # final build of init/ @@ -331,6 +329,3 @@ if [ -n "${CONFIG_KALLSYMS}" ]; then exit 1 fi fi - -# We made a new kernel - delete old version file -rm -f .old_version -- cgit v1.2.3-59-g8ed1b From 37131ec4f9cb60750be6f75fca20ff6bbf1b8efd Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 22 Sep 2017 14:31:14 +0900 Subject: kbuild: mkcompile_h: do not create .version This script does not need to create .version; it will be created by scripts/link-vmlinux.sh later. Clean-up the code slightly. Signed-off-by: Masahiro Yamada --- scripts/mkcompile_h | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) (limited to 'scripts') diff --git a/scripts/mkcompile_h b/scripts/mkcompile_h index fd8fdb91581d..f1ee4ebd6518 100755 --- a/scripts/mkcompile_h +++ b/scripts/mkcompile_h @@ -27,12 +27,7 @@ LC_ALL=C export LC_ALL if [ -z "$KBUILD_BUILD_VERSION" ]; then - if [ -r .version ]; then - VERSION=`cat .version` - else - VERSION=0 - echo 0 > .version - fi + VERSION=$(cat .version 2>/dev/null || echo 1) else VERSION=$KBUILD_BUILD_VERSION fi -- cgit v1.2.3-59-g8ed1b From 9d022c540606a5a8ae5d1cc02fc12de362ba4585 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Wed, 4 Oct 2017 12:56:04 +0900 Subject: kbuild: replace $(hdr-arch) with $(SRCARCH) Since commit 5e53879008b9 ("sparc,sparc64: unify Makefile"), hdr-arch and SRCARCH always match. Signed-off-by: Masahiro Yamada Reviewed-by: Douglas Anderson --- Makefile | 21 +++++++++------------ scripts/Makefile.headersinst | 2 +- 2 files changed, 10 insertions(+), 13 deletions(-) (limited to 'scripts') diff --git a/Makefile b/Makefile index 9aa47218100e..27fcdc1d4ec9 100644 --- a/Makefile +++ b/Makefile @@ -283,9 +283,6 @@ ifeq ($(ARCH),tilegx) SRCARCH := tile endif -# Where to locate arch specific headers -hdr-arch := $(SRCARCH) - KCONFIG_CONFIG ?= .config export KCONFIG_CONFIG @@ -378,8 +375,8 @@ CFLAGS_KCOV := $(call cc-option,-fsanitize-coverage=trace-pc,) # Use USERINCLUDE when you must reference the UAPI directories only. USERINCLUDE := \ - -I$(srctree)/arch/$(hdr-arch)/include/uapi \ - -I$(objtree)/arch/$(hdr-arch)/include/generated/uapi \ + -I$(srctree)/arch/$(SRCARCH)/include/uapi \ + -I$(objtree)/arch/$(SRCARCH)/include/generated/uapi \ -I$(srctree)/include/uapi \ -I$(objtree)/include/generated/uapi \ -include $(srctree)/include/linux/kconfig.h @@ -387,8 +384,8 @@ USERINCLUDE := \ # Use LINUXINCLUDE when you must reference the include/ directory. # Needed to be compatible with the O= option LINUXINCLUDE := \ - -I$(srctree)/arch/$(hdr-arch)/include \ - -I$(objtree)/arch/$(hdr-arch)/include/generated \ + -I$(srctree)/arch/$(SRCARCH)/include \ + -I$(objtree)/arch/$(SRCARCH)/include/generated \ $(if $(KBUILD_SRC), -I$(srctree)/include) \ -I$(objtree)/include \ $(USERINCLUDE) @@ -1134,8 +1131,8 @@ headerdep: #Default location for installed headers export INSTALL_HDR_PATH = $(objtree)/usr -# If we do an all arch process set dst to include/arch-$(hdr-arch) -hdr-dst = $(if $(KBUILD_HEADERS), dst=include/arch-$(hdr-arch), dst=include) +# If we do an all arch process set dst to include/arch-$(SRCARCH) +hdr-dst = $(if $(KBUILD_HEADERS), dst=include/arch-$(SRCARCH), dst=include) PHONY += archheaders archheaders: @@ -1153,10 +1150,10 @@ headers_install_all: PHONY += headers_install headers_install: __headers - $(if $(wildcard $(srctree)/arch/$(hdr-arch)/include/uapi/asm/Kbuild),, \ + $(if $(wildcard $(srctree)/arch/$(SRCARCH)/include/uapi/asm/Kbuild),, \ $(error Headers not exportable for the $(SRCARCH) architecture)) $(Q)$(MAKE) $(hdr-inst)=include/uapi dst=include - $(Q)$(MAKE) $(hdr-inst)=arch/$(hdr-arch)/include/uapi $(hdr-dst) + $(Q)$(MAKE) $(hdr-inst)=arch/$(SRCARCH)/include/uapi $(hdr-dst) PHONY += headers_check_all headers_check_all: headers_install_all @@ -1165,7 +1162,7 @@ headers_check_all: headers_install_all PHONY += headers_check headers_check: headers_install $(Q)$(MAKE) $(hdr-inst)=include/uapi dst=include HDRCHECK=1 - $(Q)$(MAKE) $(hdr-inst)=arch/$(hdr-arch)/include/uapi $(hdr-dst) HDRCHECK=1 + $(Q)$(MAKE) $(hdr-inst)=arch/$(SRCARCH)/include/uapi $(hdr-dst) HDRCHECK=1 # --------------------------------------------------------------------------- # Kernel selftest diff --git a/scripts/Makefile.headersinst b/scripts/Makefile.headersinst index 343d586e566e..5692d7a66163 100644 --- a/scripts/Makefile.headersinst +++ b/scripts/Makefile.headersinst @@ -30,7 +30,7 @@ __headers: $(subdirs) $(subdirs): $(Q)$(MAKE) $(hdr-inst)=$(obj)/$@ dst=$(dst)/$@ -# Skip header install/check for include/uapi and arch/$(hdr-arch)/include/uapi. +# Skip header install/check for include/uapi and arch/$(SRCARCH)/include/uapi. # We have only sub-directories there. skip-inst := $(if $(filter %/uapi,$(obj)),1) -- cgit v1.2.3-59-g8ed1b From 8fdc3fbbd5b646650efa66d577b88807a948a1d1 Mon Sep 17 00:00:00 2001 From: Cao jin Date: Mon, 9 Oct 2017 11:49:11 +0800 Subject: kbuild: comments cleanup in Makefile.lib It has: 1. Move comments close to what it want to comment. 2. Comments cleanup & improvement. Signed-off-by: Cao jin Signed-off-by: Masahiro Yamada --- scripts/Makefile.lib | 21 +++++++-------------- 1 file changed, 7 insertions(+), 14 deletions(-) (limited to 'scripts') diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib index 5e975fee0f5b..580e605118e4 100644 --- a/scripts/Makefile.lib +++ b/scripts/Makefile.lib @@ -4,8 +4,7 @@ ccflags-y += $(EXTRA_CFLAGS) cppflags-y += $(EXTRA_CPPFLAGS) ldflags-y += $(EXTRA_LDFLAGS) -# -# flags that take effect in sub directories +# flags that take effect in current and sub directories export KBUILD_SUBDIR_ASFLAGS := $(KBUILD_SUBDIR_ASFLAGS) $(subdir-asflags-y) export KBUILD_SUBDIR_CCFLAGS := $(KBUILD_SUBDIR_CCFLAGS) $(subdir-ccflags-y) @@ -14,14 +13,16 @@ export KBUILD_SUBDIR_CCFLAGS := $(KBUILD_SUBDIR_CCFLAGS) $(subdir-ccflags-y) # When an object is listed to be built compiled-in and modular, # only build the compiled-in version - obj-m := $(filter-out $(obj-y),$(obj-m)) # Libraries are always collected in one lib file. # Filter out objects already built-in - lib-y := $(filter-out $(obj-y), $(sort $(lib-y) $(lib-m))) +# Determine modorder. +# Unfortunately, we don't have information about ordering between -y +# and -m subdirs. Just put -y's first. +modorder := $(patsubst %/,%/modules.order, $(filter %/, $(obj-y)) $(obj-m:.o=.ko)) # Handle objects in subdirs # --------------------------------------------------------------------------- @@ -29,12 +30,6 @@ lib-y := $(filter-out $(obj-y), $(sort $(lib-y) $(lib-m))) # and add the directory to the list of dirs to descend into: $(subdir-y) # o if we encounter foo/ in $(obj-m), remove it from $(obj-m) # and add the directory to the list of dirs to descend into: $(subdir-m) - -# Determine modorder. -# Unfortunately, we don't have information about ordering between -y -# and -m subdirs. Just put -y's first. -modorder := $(patsubst %/,%/modules.order, $(filter %/, $(obj-y)) $(obj-m:.o=.ko)) - __subdir-y := $(patsubst %/,%,$(filter %/, $(obj-y))) subdir-y += $(__subdir-y) __subdir-m := $(patsubst %/,%,$(filter %/, $(obj-m))) @@ -43,10 +38,9 @@ obj-y := $(patsubst %/, %/built-in.o, $(obj-y)) obj-m := $(filter-out %/, $(obj-m)) # Subdirectories we need to descend into - subdir-ym := $(sort $(subdir-y) $(subdir-m)) -# if $(foo-objs) exists, foo.o is a composite object +# if $(foo-objs), $(foo-y), or $(foo-m) exists, foo.o is a composite object multi-used-y := $(sort $(foreach m,$(obj-y), $(if $(strip $($(m:.o=-objs)) $($(m:.o=-y))), $(m)))) multi-used-m := $(sort $(foreach m,$(obj-m), $(if $(strip $($(m:.o=-objs)) $($(m:.o=-y)) $($(m:.o=-m))), $(m)))) multi-used := $(multi-used-y) $(multi-used-m) @@ -90,8 +84,7 @@ subdir-ym := $(addprefix $(obj)/,$(subdir-ym)) obj-dirs := $(addprefix $(obj)/,$(obj-dirs)) # These flags are needed for modversions and compiling, so we define them here -# already -# $(modname_flags) #defines KBUILD_MODNAME as the name of the module it will +# $(modname_flags) defines KBUILD_MODNAME as the name of the module it will # end up in (or would, if it gets compiled in) # Note: Files that end up in two or more modules are compiled without the # KBUILD_MODNAME definition. The reason is that any made-up name would -- cgit v1.2.3-59-g8ed1b From 4e13d47c5806bafb5e524b08a9d759b606b1851c Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Tue, 10 Oct 2017 20:43:21 +0900 Subject: kbuild: remove KBUILD_SUBDIR_ASFLAGS and KBUILD_SUBDIR_CCFLAGS Accumulate subdir-{cc,as}flags-y directly to KBUILD_{A,C}FLAGS. Remove KBUILD_SUBDIR_{AS,CC}FLAGS. Signed-off-by: Masahiro Yamada Reviewed-by: Cao jin --- scripts/Makefile.lib | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'scripts') diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib index 580e605118e4..4d88ad70fd96 100644 --- a/scripts/Makefile.lib +++ b/scripts/Makefile.lib @@ -5,8 +5,8 @@ cppflags-y += $(EXTRA_CPPFLAGS) ldflags-y += $(EXTRA_LDFLAGS) # flags that take effect in current and sub directories -export KBUILD_SUBDIR_ASFLAGS := $(KBUILD_SUBDIR_ASFLAGS) $(subdir-asflags-y) -export KBUILD_SUBDIR_CCFLAGS := $(KBUILD_SUBDIR_CCFLAGS) $(subdir-ccflags-y) +KBUILD_AFLAGS += $(subdir-asflags-y) +KBUILD_CFLAGS += $(subdir-ccflags-y) # Figure out what we need to build from the various variables # =========================================================================== @@ -94,10 +94,10 @@ basename_flags = -DKBUILD_BASENAME=$(call name-fix,$(basetarget)) modname_flags = $(if $(filter 1,$(words $(modname))),\ -DKBUILD_MODNAME=$(call name-fix,$(modname))) -orig_c_flags = $(KBUILD_CPPFLAGS) $(KBUILD_CFLAGS) $(KBUILD_SUBDIR_CCFLAGS) \ +orig_c_flags = $(KBUILD_CPPFLAGS) $(KBUILD_CFLAGS) \ $(ccflags-y) $(CFLAGS_$(basetarget).o) _c_flags = $(filter-out $(CFLAGS_REMOVE_$(basetarget).o), $(orig_c_flags)) -orig_a_flags = $(KBUILD_CPPFLAGS) $(KBUILD_AFLAGS) $(KBUILD_SUBDIR_ASFLAGS) \ +orig_a_flags = $(KBUILD_CPPFLAGS) $(KBUILD_AFLAGS) \ $(asflags-y) $(AFLAGS_$(basetarget).o) _a_flags = $(filter-out $(AFLAGS_REMOVE_$(basetarget).o), $(orig_a_flags)) _cpp_flags = $(KBUILD_CPPFLAGS) $(cppflags-y) $(CPPFLAGS_$(@F)) -- cgit v1.2.3-59-g8ed1b From a7d34df3d12c34304638bbe7375d91c63717c453 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Wed, 11 Oct 2017 12:52:29 +0900 Subject: kbuild: add forward declaration of default target to Makefile.asm-generic $(kbuild-file) and Kbuild.include are included before the default target "all". We will add a target into Kbuild.include. In advance, add a forward declaration of the default target. Signed-off-by: Masahiro Yamada Reviewed-by: Douglas Anderson --- scripts/Makefile.asm-generic | 3 +++ 1 file changed, 3 insertions(+) (limited to 'scripts') diff --git a/scripts/Makefile.asm-generic b/scripts/Makefile.asm-generic index a6c8c1780855..9563215a23c6 100644 --- a/scripts/Makefile.asm-generic +++ b/scripts/Makefile.asm-generic @@ -5,6 +5,9 @@ # and for each file listed in this file with generic-y creates # a small wrapper file in $(obj) (arch/$(SRCARCH)/include/generated/$(src)) +PHONY := all +all: + kbuild-file := $(srctree)/arch/$(SRCARCH)/include/$(src)/Kbuild -include $(kbuild-file) -- cgit v1.2.3-59-g8ed1b From 3298b690b21cdbe6b2ae8076d9147027f396f2b1 Mon Sep 17 00:00:00 2001 From: Douglas Anderson Date: Mon, 16 Oct 2017 10:12:45 -0700 Subject: kbuild: Add a cache for generated variables While timing a "no-op" build of the kernel (incrementally building the kernel even though nothing changed) in the Chrome OS build system I found that it was much slower than I expected. Digging into things a bit, I found that quite a bit of the time was spent invoking the C compiler even though we weren't actually building anything. Currently in the Chrome OS build system the C compiler is called through a number of wrappers (one of which is written in python!) and can take upwards of 100 ms to invoke even if we're not doing anything difficult, so these invocations of the compiler were taking a lot of time. Worse the invocations couldn't seem to take advantage of the multiple cores on my system. Certainly it seems like we could make the compiler invocations in the Chrome OS build system faster, but only to a point. Inherently invoking a program as big as a C compiler is a fairly heavy operation. Thus even if we can speed the compiler calls it made sense to track down what was happening. It turned out that all the compiler invocations were coming from usages like this in the kernel's Makefile: KBUILD_CFLAGS += $(call cc-option,-fno-delete-null-pointer-checks,) Due to the way cc-option and similar statements work the above contains an implicit call to the C compiler. ...and due to the fact that we're storing the result in KBUILD_CFLAGS, a simply expanded variable, the call will happen every time the Makefile is parsed, even if there are no users of KBUILD_CFLAGS. Rather than redoing this computation every time, it makes a lot of sense to cache the result of all of the Makefile's compiler calls just like we do when we compile a ".c" file to a ".o" file. Conceptually this is quite a simple idea. ...and since the calls to invoke the compiler and similar tools are centrally located in the Kbuild.include file this doesn't even need to be super invasive. Implementing the cache in a simple-to-use and efficient way is not quite as simple as it first sounds, though. To get maximum speed we really want the cache in a format that make can natively understand and make doesn't really have an ability to load/parse files. ...but make _can_ import other Makefiles, so the solution is to store the cache in Makefile format. This requires coming up with a valid/unique Makefile variable name for each value to be cached, but that's solvable with some cleverness. After this change, we'll automatically create a ".cache.mk" file that will contain our cached variables. We'll load this on each invocation of make and will avoid recomputing anything that's already in our cache. The cache is stored in a format that it shouldn't need any invalidation since anything that might change should affect the "key" and any old cached value won't be used. Signed-off-by: Douglas Anderson Tested-by: Ingo Molnar Tested-by: Guenter Roeck Signed-off-by: Masahiro Yamada --- Makefile | 1 + scripts/Kbuild.include | 90 ++++++++++++++++++++++++++++++++++++++++++-------- 2 files changed, 77 insertions(+), 14 deletions(-) (limited to 'scripts') diff --git a/Makefile b/Makefile index 1254719958ca..5be2c8d2ce73 100644 --- a/Makefile +++ b/Makefile @@ -1545,6 +1545,7 @@ clean: $(clean-dirs) -o -name '.*.d' -o -name '.*.tmp' -o -name '*.mod.c' \ -o -name '*.symtypes' -o -name 'modules.order' \ -o -name modules.builtin -o -name '.tmp_*.o.*' \ + -o -name .cache.mk \ -o -name '*.c.[012]*.*' \ -o -name '*.ll' \ -o -name '*.gcno' \) -type f -print | xargs rm -f diff --git a/scripts/Kbuild.include b/scripts/Kbuild.include index 9ffd3dda3889..dfadb1c94368 100644 --- a/scripts/Kbuild.include +++ b/scripts/Kbuild.include @@ -8,6 +8,8 @@ squote := ' empty := space := $(empty) $(empty) space_escape := _-_SPACE_-_ +right_paren := ) +left_paren := ( ### # Name of target with a '.' as filename prefix. foo/bar.o => foo/.bar.o @@ -80,6 +82,60 @@ cc-cross-prefix = \ echo $(c); \ fi))) +# Tools for caching Makefile variables that are "expensive" to compute. +# +# Here we want to help deal with variables that take a long time to compute +# by making it easy to store these variables in a cache. +# +# The canonical example here is testing for compiler flags. On a simple system +# each call to the compiler takes 10 ms, but on a system with a compiler that's +# called through various wrappers it can take upwards of 100 ms. If we have +# 100 calls to the compiler this can take 1 second (on a simple system) or 10 +# seconds (on a complicated system). +# +# The "cache" will be in Makefile syntax and can be directly included. +# Any time we try to reference a variable that's not in the cache we'll +# calculate it and store it in the cache for next time. + +# Include values from last time +make-cache := $(if $(KBUILD_EXTMOD),$(KBUILD_EXTMOD)/,$(if $(obj),$(obj)/)).cache.mk +ifeq ($(wildcard $(dir $(make-cache))),) +$(shell mkdir -p '$(dir $(make-cache))') +endif +$(make-cache): ; +-include $(make-cache) + +# Usage: $(call __sanitize-opt,Hello=Hola$(comma)Goodbye Adios) +# +# Convert all '$', ')', '(', '\', '=', ' ', ',', ':' to '_' +__sanitize-opt = $(subst $$,_,$(subst $(right_paren),_,$(subst $(left_paren),_,$(subst \,_,$(subst =,_,$(subst $(space),_,$(subst $(comma),_,$(subst :,_,$(1))))))))) + +# Usage: $(call shell-cached,shell_command) +# Example: $(call shell-cached,md5sum /usr/bin/gcc) +# +# If we've already seen a call to this exact shell command (even in a +# previous invocation of make!) we'll return the value. If not, we'll +# compute it and store the result for future runs. +# +# This is a bit of voodoo, but basic explanation is that if the variable +# was undefined then we'll evaluate the shell command and store the result +# into the variable. We'll then store that value in the cache and finally +# output the value. +# +# NOTE: The $$(2) here isn't actually a parameter to __run-and-store. We +# happen to know that the caller will have their shell command in $(2) so the +# result of "call"ing this will produce a reference to that $(2). The reason +# for this strangeness is to avoid an extra level of eval (and escaping) of +# $(2). +define __run-and-store +ifeq ($(origin $(1)),undefined) + $$(eval $(1) := $$(shell $$(2))) + $$(shell echo '$(1) := $$($(1))' >> $(make-cache)) +endif +endef +__shell-cached = $(eval $(call __run-and-store,$(1)))$($(1)) +shell-cached = $(call __shell-cached,__cached_$(call __sanitize-opt,$(1)),$(1)) + # output directory for tests below TMPOUT := $(if $(KBUILD_EXTMOD),$(firstword $(KBUILD_EXTMOD))/) @@ -87,30 +143,36 @@ TMPOUT := $(if $(KBUILD_EXTMOD),$(firstword $(KBUILD_EXTMOD))/) # Usage: option = $(call try-run, $(CC)...-o "$$TMP",option-ok,otherwise) # Exit code chooses option. "$$TMP" serves as a temporary file and is # automatically cleaned up. -try-run = $(shell set -e; \ +__try-run = set -e; \ TMP="$(TMPOUT).$$$$.tmp"; \ TMPO="$(TMPOUT).$$$$.o"; \ if ($(1)) >/dev/null 2>&1; \ then echo "$(2)"; \ else echo "$(3)"; \ fi; \ - rm -f "$$TMP" "$$TMPO") + rm -f "$$TMP" "$$TMPO" + +try-run = $(shell $(__try-run)) + +# try-run-cached +# This works like try-run, but the result is cached. +try-run-cached = $(call shell-cached,$(__try-run)) # as-option # Usage: cflags-y += $(call as-option,-Wa$(comma)-isa=foo,) -as-option = $(call try-run,\ +as-option = $(call try-run-cached,\ $(CC) $(KBUILD_CFLAGS) $(1) -c -x assembler /dev/null -o "$$TMP",$(1),$(2)) # as-instr # Usage: cflags-y += $(call as-instr,instr,option1,option2) -as-instr = $(call try-run,\ +as-instr = $(call try-run-cached,\ printf "%b\n" "$(1)" | $(CC) $(KBUILD_AFLAGS) -c -x assembler -o "$$TMP" -,$(2),$(3)) # __cc-option # Usage: MY_CFLAGS += $(call __cc-option,$(CC),$(MY_CFLAGS),-march=winchip-c6,-march=i586) -__cc-option = $(call try-run,\ +__cc-option = $(call try-run-cached,\ $(1) -Werror $(2) $(3) -c -x c /dev/null -o "$$TMP",$(3),$(4)) # Do not attempt to build with gcc plugins during cc-option tests. @@ -130,23 +192,23 @@ hostcc-option = $(call __cc-option, $(HOSTCC),\ # cc-option-yn # Usage: flag := $(call cc-option-yn,-march=winchip-c6) -cc-option-yn = $(call try-run,\ +cc-option-yn = $(call try-run-cached,\ $(CC) -Werror $(KBUILD_CPPFLAGS) $(CC_OPTION_CFLAGS) $(1) -c -x c /dev/null -o "$$TMP",y,n) # cc-disable-warning # Usage: cflags-y += $(call cc-disable-warning,unused-but-set-variable) -cc-disable-warning = $(call try-run,\ +cc-disable-warning = $(call try-run-cached,\ $(CC) -Werror $(KBUILD_CPPFLAGS) $(CC_OPTION_CFLAGS) -W$(strip $(1)) -c -x c /dev/null -o "$$TMP",-Wno-$(strip $(1))) # cc-name # Expands to either gcc or clang -cc-name = $(shell $(CC) -v 2>&1 | grep -q "clang version" && echo clang || echo gcc) +cc-name = $(call shell-cached,$(CC) -v 2>&1 | grep -q "clang version" && echo clang || echo gcc) # cc-version -cc-version = $(shell $(CONFIG_SHELL) $(srctree)/scripts/gcc-version.sh $(CC)) +cc-version = $(call shell-cached,$(CONFIG_SHELL) $(srctree)/scripts/gcc-version.sh $(CC)) # cc-fullversion -cc-fullversion = $(shell $(CONFIG_SHELL) \ +cc-fullversion = $(call shell-cached,$(CONFIG_SHELL) \ $(srctree)/scripts/gcc-version.sh -p $(CC)) # cc-ifversion @@ -159,22 +221,22 @@ cc-if-fullversion = $(shell [ $(cc-fullversion) $(1) $(2) ] && echo $(3) || echo # cc-ldoption # Usage: ldflags += $(call cc-ldoption, -Wl$(comma)--hash-style=both) -cc-ldoption = $(call try-run,\ +cc-ldoption = $(call try-run-cached,\ $(CC) $(1) -nostdlib -x c /dev/null -o "$$TMP",$(1),$(2)) # ld-option # Usage: LDFLAGS += $(call ld-option, -X) -ld-option = $(call try-run,\ +ld-option = $(call try-run-cached,\ $(CC) -x c /dev/null -c -o "$$TMPO" ; $(LD) $(1) "$$TMPO" -o "$$TMP",$(1),$(2)) # ar-option # Usage: KBUILD_ARFLAGS := $(call ar-option,D) # Important: no spaces around options -ar-option = $(call try-run, $(AR) rc$(1) "$$TMP",$(1),$(2)) +ar-option = $(call try-run-cached, $(AR) rc$(1) "$$TMP",$(1),$(2)) # ld-version # Note this is mainly for HJ Lu's 3 number binutil versions -ld-version = $(shell $(LD) --version | $(srctree)/scripts/ld-version.sh) +ld-version = $(call shell-cached,$(LD) --version | $(srctree)/scripts/ld-version.sh) # ld-ifversion # Usage: $(call ld-ifversion, -ge, 22252, y) -- cgit v1.2.3-59-g8ed1b From e17c400ae194945eef9d9cae38a321c92c1986fb Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 13 Oct 2017 20:25:29 +0900 Subject: kbuild: shrink .cache.mk when it exceeds 1000 lines The cache files are only cleaned away by "make clean". If you continue incremental builds, the cache files will grow up little by little. It is not a big deal in general use cases because compiler flags do not change quite often. However, if you do build-test for various architectures, compilers, and kernel configurations, you will end up with huge cache files soon. When the cache file exceeds 1000 lines, shrink it down to 500 by "tail". The Least Recently Added lines are cut. (not Least Recently Used) I hope it will work well enough. Signed-off-by: Masahiro Yamada Reviewed-by: Douglas Anderson --- scripts/Kbuild.include | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'scripts') diff --git a/scripts/Kbuild.include b/scripts/Kbuild.include index dfadb1c94368..064f477dfdca 100644 --- a/scripts/Kbuild.include +++ b/scripts/Kbuild.include @@ -105,6 +105,12 @@ endif $(make-cache): ; -include $(make-cache) +# If cache exceeds 1000 lines, shrink it down to 500. +ifneq ($(word 1000,$(filter __cached_%, $(.VARIABLES))),) +$(shell tail -n 500 $(make-cache) > $(make-cache).tmp; \ + mv $(make-cache).tmp $(make-cache)) +endif + # Usage: $(call __sanitize-opt,Hello=Hola$(comma)Goodbye Adios) # # Convert all '$', ')', '(', '\', '=', ' ', ',', ':' to '_' -- cgit v1.2.3-59-g8ed1b From 86a9df597cdd564d2d29c65897bcad42519e3678 Mon Sep 17 00:00:00 2001 From: Nick Desaulniers Date: Mon, 6 Nov 2017 10:47:54 -0800 Subject: kbuild: fix linker feature test macros when cross compiling with Clang I was not seeing my linker flags getting added when using ld-option when cross compiling with Clang. Upon investigation, this seems to be due to a difference in how GCC vs Clang handle cross compilation. GCC is configured at build time to support one backend, that is implicit when compiling. Clang is explicit via the use of `-target ` and ships with all supported backends by default. GNU Make feature test macros that compile then link will always fail when cross compiling with Clang unless Clang's triple is passed along to the compiler. For example: $ clang -x c /dev/null -c -o temp.o $ aarch64-linux-android/bin/ld -E temp.o aarch64-linux-android/bin/ld: unknown architecture of input file `temp.o' is incompatible with aarch64 output aarch64-linux-android/bin/ld: warning: cannot find entry symbol _start; defaulting to 0000000000400078 $ echo $? 1 $ clang -target aarch64-linux-android- -x c /dev/null -c -o temp.o $ aarch64-linux-android/bin/ld -E temp.o aarch64-linux-android/bin/ld: warning: cannot find entry symbol _start; defaulting to 00000000004002e4 $ echo $? 0 This causes conditional checks that invoke $(CC) without the target triple, then $(LD) on the result, to always fail. Suggested-by: Masahiro Yamada Signed-off-by: Nick Desaulniers Reviewed-by: Matthias Kaehlcke Signed-off-by: Masahiro Yamada --- scripts/Kbuild.include | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'scripts') diff --git a/scripts/Kbuild.include b/scripts/Kbuild.include index 064f477dfdca..be1c9d65eaf4 100644 --- a/scripts/Kbuild.include +++ b/scripts/Kbuild.include @@ -228,12 +228,13 @@ cc-if-fullversion = $(shell [ $(cc-fullversion) $(1) $(2) ] && echo $(3) || echo # cc-ldoption # Usage: ldflags += $(call cc-ldoption, -Wl$(comma)--hash-style=both) cc-ldoption = $(call try-run-cached,\ - $(CC) $(1) -nostdlib -x c /dev/null -o "$$TMP",$(1),$(2)) + $(CC) $(1) $(KBUILD_CPPFLAGS) $(CC_OPTION_CFLAGS) -nostdlib -x c /dev/null -o "$$TMP",$(1),$(2)) # ld-option # Usage: LDFLAGS += $(call ld-option, -X) ld-option = $(call try-run-cached,\ - $(CC) -x c /dev/null -c -o "$$TMPO" ; $(LD) $(1) "$$TMPO" -o "$$TMP",$(1),$(2)) + $(CC) $(KBUILD_CPPFLAGS) $(CC_OPTION_CFLAGS) -x c /dev/null -c -o "$$TMPO"; \ + $(LD) $(LDFLAGS) $(1) "$$TMPO" -o "$$TMP",$(1),$(2)) # ar-option # Usage: KBUILD_ARFLAGS := $(call ar-option,D) -- cgit v1.2.3-59-g8ed1b From 9a234a2e384349f21afac8d718aa294a668ad4fa Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Mon, 13 Nov 2017 19:29:34 +0900 Subject: kbuild: create directory for make cache only when necessary Currently, the existence of $(dir $(make-cache)) is always checked, and created if it is missing. We can avoid unnecessary system calls by some tricks. [1] If KBUILD_SRC is unset, we are building in the source tree. The output directory checks can be entirely skipped. [2] If at least one cache data is found, it means the cache file was included. Obviously its directory exists. Skip "mkdir -p". [3] If Makefile does not contain any call of __run-and-store, it will not create a cache file. No need to create its directory. [4] The "mkdir -p" should be only invoked by the first call of __run-and-store Signed-off-by: Masahiro Yamada Reviewed-by: Douglas Anderson --- scripts/Kbuild.include | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) (limited to 'scripts') diff --git a/scripts/Kbuild.include b/scripts/Kbuild.include index be1c9d65eaf4..065324a8046f 100644 --- a/scripts/Kbuild.include +++ b/scripts/Kbuild.include @@ -99,18 +99,19 @@ cc-cross-prefix = \ # Include values from last time make-cache := $(if $(KBUILD_EXTMOD),$(KBUILD_EXTMOD)/,$(if $(obj),$(obj)/)).cache.mk -ifeq ($(wildcard $(dir $(make-cache))),) -$(shell mkdir -p '$(dir $(make-cache))') -endif $(make-cache): ; -include $(make-cache) +cached-data := $(filter __cached_%, $(.VARIABLES)) + # If cache exceeds 1000 lines, shrink it down to 500. -ifneq ($(word 1000,$(filter __cached_%, $(.VARIABLES))),) +ifneq ($(word 1000,$(cached-data)),) $(shell tail -n 500 $(make-cache) > $(make-cache).tmp; \ mv $(make-cache).tmp $(make-cache)) endif +create-cache-dir := $(if $(KBUILD_SRC),$(if $(cache-data),,1)) + # Usage: $(call __sanitize-opt,Hello=Hola$(comma)Goodbye Adios) # # Convert all '$', ')', '(', '\', '=', ' ', ',', ':' to '_' @@ -136,6 +137,10 @@ __sanitize-opt = $(subst $$,_,$(subst $(right_paren),_,$(subst $(left_paren),_,$ define __run-and-store ifeq ($(origin $(1)),undefined) $$(eval $(1) := $$(shell $$(2))) +ifeq ($(create-cache-dir),1) + $$(shell mkdir -p $(dir $(make-cache))) + $$(eval create-cache-dir :=) +endif $$(shell echo '$(1) := $$($(1))' >> $(make-cache)) endif endef -- cgit v1.2.3-59-g8ed1b From 2982c953570b2bced858613d70443c2c6a90587b Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Mon, 13 Nov 2017 19:29:35 +0900 Subject: kbuild: remove redundant $(wildcard ...) for cmd_files calculation I do not see any reason why $(wildcard ...) needs to be called twice for computing cmd_files. Remove the first one. Signed-off-by: Masahiro Yamada --- Makefile | 3 +-- scripts/Makefile.build | 3 +-- scripts/Makefile.headersinst | 3 +-- scripts/Makefile.modpost | 3 +-- 4 files changed, 4 insertions(+), 8 deletions(-) (limited to 'scripts') diff --git a/Makefile b/Makefile index a7476e6934f1..58dd24520c9e 100644 --- a/Makefile +++ b/Makefile @@ -1693,8 +1693,7 @@ cmd_crmodverdir = $(Q)mkdir -p $(MODVERDIR) \ # read all saved command lines -targets := $(wildcard $(sort $(targets))) -cmd_files := $(wildcard .*.cmd $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd)) +cmd_files := $(wildcard .*.cmd $(foreach f,$(sort $(targets)),$(dir $(f)).$(notdir $(f)).cmd)) ifneq ($(cmd_files),) $(cmd_files): ; # Do not try to update included dependency files diff --git a/scripts/Makefile.build b/scripts/Makefile.build index 061d0c3a420a..62d5314c3b71 100644 --- a/scripts/Makefile.build +++ b/scripts/Makefile.build @@ -583,8 +583,7 @@ FORCE: # optimization, we don't need to read them if the target does not # exist, we will rebuild anyway in that case. -targets := $(wildcard $(sort $(targets))) -cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd)) +cmd_files := $(wildcard $(foreach f,$(sort $(targets)),$(dir $(f)).$(notdir $(f)).cmd)) ifneq ($(cmd_files),) include $(cmd_files) diff --git a/scripts/Makefile.headersinst b/scripts/Makefile.headersinst index 5692d7a66163..c6fb2b75d813 100644 --- a/scripts/Makefile.headersinst +++ b/scripts/Makefile.headersinst @@ -114,9 +114,8 @@ $(check-file): scripts/headers_check.pl $(output-files) FORCE endif -targets := $(wildcard $(sort $(targets))) cmd_files := $(wildcard \ - $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd)) + $(foreach f,$(sort $(targets)),$(dir $(f)).$(notdir $(f)).cmd)) ifneq ($(cmd_files),) include $(cmd_files) diff --git a/scripts/Makefile.modpost b/scripts/Makefile.modpost index 16923ba4b5b1..cf125c11ca41 100644 --- a/scripts/Makefile.modpost +++ b/scripts/Makefile.modpost @@ -143,8 +143,7 @@ FORCE: # optimization, we don't need to read them if the target does not # exist, we will rebuild anyway in that case. -targets := $(wildcard $(sort $(targets))) -cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd)) +cmd_files := $(wildcard $(foreach f,$(sort $(targets)),$(dir $(f)).$(notdir $(f)).cmd)) ifneq ($(cmd_files),) include $(cmd_files) -- cgit v1.2.3-59-g8ed1b From 591f66899784ae0afa13ff9a3eb5ce0a4358e48b Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Mon, 13 Nov 2017 19:29:36 +0900 Subject: kbuild: filter-out PHONY targets from "targets" The variable "targets" contains object paths for which existing .*.cmd files should be included. scripts/Makefile.build automatically adds $(MAKECMDGOALS) to "targets" as follows: targets += $(extra-y) $(MAKECMDGOALS) $(always) The $(MAKECMDGOALS) is a PHONY target in several places. PHONY targets never create .*.cmd files. Signed-off-by: Masahiro Yamada --- scripts/Makefile.build | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'scripts') diff --git a/scripts/Makefile.build b/scripts/Makefile.build index 62d5314c3b71..6f603770b08e 100644 --- a/scripts/Makefile.build +++ b/scripts/Makefile.build @@ -562,7 +562,7 @@ $(multi-used-m): FORCE $(call multi_depend, $(multi-used-m), .o, -objs -y -m) targets += $(multi-used-y) $(multi-used-m) - +targets := $(filter-out $(PHONY), $(targets)) # Descending # --------------------------------------------------------------------------- -- cgit v1.2.3-59-g8ed1b From 8a78756eb545a6fb8007fa154a626ca2bc208027 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Mon, 13 Nov 2017 19:29:37 +0900 Subject: kbuild: create object directories simpler and faster For the out-of-tree build, scripts/Makefile.build creates output directories, but this operation is not efficient. scripts/Makefile.lib calculates obj-dirs as follows: obj-dirs := $(dir $(multi-objs) $(obj-y)) Please notice $(sort ...) is not used here. Usually the result is as many "./" as objects here. For a lot of duplicated paths, the following command is invoked. _dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d))) Then, the costly shell command is run over and over again. I see many points for optimization: [1] Use $(sort ...) to cut down duplicated paths before passing them to system call [2] Use single $(shell ...) instead of repeating it with $(foreach ...) This will reduce forking. [3] We can calculate obj-dirs more simply. Most of objects are already accumulated in $(targets). So, $(dir $(targets)) is fine and more comprehensive. I also removed ugly code in arch/x86/entry/vdso/Makefile. This is now really unnecessary. Signed-off-by: Masahiro Yamada Acked-by: Ingo Molnar Tested-by: Douglas Anderson --- arch/x86/entry/vdso/Makefile | 4 ---- scripts/Makefile.build | 15 ++++++--------- scripts/Makefile.host | 12 ------------ scripts/Makefile.lib | 5 ----- 4 files changed, 6 insertions(+), 30 deletions(-) (limited to 'scripts') diff --git a/arch/x86/entry/vdso/Makefile b/arch/x86/entry/vdso/Makefile index d5409660f5de..f8e3d85256ad 100644 --- a/arch/x86/entry/vdso/Makefile +++ b/arch/x86/entry/vdso/Makefile @@ -129,10 +129,6 @@ $(obj)/vdsox32.so.dbg: $(src)/vdsox32.lds $(vobjx32s) FORCE CPPFLAGS_vdso32.lds = $(CPPFLAGS_vdso.lds) VDSO_LDFLAGS_vdso32.lds = -m32 -Wl,-m,elf_i386 -Wl,-soname=linux-gate.so.1 -# This makes sure the $(obj) subdirectory exists even though vdso32/ -# is not a kbuild sub-make subdirectory. -override obj-dirs = $(dir $(obj)) $(obj)/vdso32/ - targets += vdso32/vdso32.lds targets += vdso32/note.o vdso32/system_call.o vdso32/sigreturn.o targets += vdso32/vclock_gettime.o diff --git a/scripts/Makefile.build b/scripts/Makefile.build index 6f603770b08e..496ecd825c71 100644 --- a/scripts/Makefile.build +++ b/scripts/Makefile.build @@ -64,15 +64,6 @@ ifneq ($(hostprogs-y)$(hostprogs-m)$(hostlibs-y)$(hostlibs-m)$(hostcxxlibs-y)$(h include scripts/Makefile.host endif -ifneq ($(KBUILD_SRC),) -# Create output directory if not already present -_dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj)) - -# Create directories for object files if directory does not exist -# Needed when obj-y := dir/file.o syntax is used -_dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d))) -endif - ifndef obj $(warning kbuild: Makefile.build is included improperly) endif @@ -589,6 +580,12 @@ ifneq ($(cmd_files),) include $(cmd_files) endif +ifneq ($(KBUILD_SRC),) +# Create directories for object files if they do not exist +obj-dirs := $(sort $(obj) $(patsubst %/,%, $(dir $(targets)))) +$(shell mkdir -p $(obj-dirs)) +endif + # Declare the contents of the .PHONY variable as phony. We keep that # information in a variable se we can use it in if_changed and friends. diff --git a/scripts/Makefile.host b/scripts/Makefile.host index 9cfd5c84d76f..a5e03838eca8 100644 --- a/scripts/Makefile.host +++ b/scripts/Makefile.host @@ -48,15 +48,6 @@ host-cxxobjs := $(sort $(foreach m,$(host-cxxmulti),$($(m)-cxxobjs))) host-cshobjs := $(sort $(foreach m,$(host-cshlib),$($(m:.so=-objs)))) host-cxxshobjs := $(sort $(foreach m,$(host-cxxshlib),$($(m:.so=-objs)))) -# output directory for programs/.o files -# hostprogs-y := tools/build may have been specified. -# Retrieve also directory of .o files from prog-objs or prog-cxxobjs notation -host-objdirs := $(dir $(__hostprogs) $(host-cobjs) $(host-cxxobjs)) - -host-objdirs := $(strip $(sort $(filter-out ./,$(host-objdirs)))) - - -__hostprogs := $(addprefix $(obj)/,$(__hostprogs)) host-csingle := $(addprefix $(obj)/,$(host-csingle)) host-cmulti := $(addprefix $(obj)/,$(host-cmulti)) host-cobjs := $(addprefix $(obj)/,$(host-cobjs)) @@ -66,9 +57,6 @@ host-cshlib := $(addprefix $(obj)/,$(host-cshlib)) host-cxxshlib := $(addprefix $(obj)/,$(host-cxxshlib)) host-cshobjs := $(addprefix $(obj)/,$(host-cshobjs)) host-cxxshobjs := $(addprefix $(obj)/,$(host-cxxshobjs)) -host-objdirs := $(addprefix $(obj)/,$(host-objdirs)) - -obj-dirs += $(host-objdirs) ##### # Handle options to gcc. Support building with separate output directory diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib index 4d88ad70fd96..5fbc46daa0f8 100644 --- a/scripts/Makefile.lib +++ b/scripts/Makefile.lib @@ -50,15 +50,11 @@ single-used-m := $(sort $(filter-out $(multi-used-m),$(obj-m))) # objects depend on those (obviously) multi-objs-y := $(foreach m, $(multi-used-y), $($(m:.o=-objs)) $($(m:.o=-y))) multi-objs-m := $(foreach m, $(multi-used-m), $($(m:.o=-objs)) $($(m:.o=-y))) -multi-objs := $(multi-objs-y) $(multi-objs-m) # $(subdir-obj-y) is the list of objects in $(obj-y) which uses dir/ to # tell kbuild to descend subdir-obj-y := $(filter %/built-in.o, $(obj-y)) -# $(obj-dirs) is a list of directories that contain object files -obj-dirs := $(dir $(multi-objs) $(obj-y)) - # Replace multi-part objects by their individual parts, look at local dir only real-objs-y := $(foreach m, $(filter-out $(subdir-obj-y), $(obj-y)), $(if $(strip $($(m:.o=-objs)) $($(m:.o=-y))),$($(m:.o=-objs)) $($(m:.o=-y)),$(m))) $(extra-y) real-objs-m := $(foreach m, $(obj-m), $(if $(strip $($(m:.o=-objs)) $($(m:.o=-y)) $($(m:.o=-m))),$($(m:.o=-objs)) $($(m:.o=-y)) $($(m:.o=-m)),$(m))) @@ -81,7 +77,6 @@ multi-used-m := $(addprefix $(obj)/,$(multi-used-m)) multi-objs-y := $(addprefix $(obj)/,$(multi-objs-y)) multi-objs-m := $(addprefix $(obj)/,$(multi-objs-m)) subdir-ym := $(addprefix $(obj)/,$(subdir-ym)) -obj-dirs := $(addprefix $(obj)/,$(obj-dirs)) # These flags are needed for modversions and compiling, so we define them here # $(modname_flags) defines KBUILD_MODNAME as the name of the module it will -- cgit v1.2.3-59-g8ed1b From c4da7ed0e7d715b159b11efd10408510ffed1aa3 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Mon, 13 Nov 2017 19:29:38 +0900 Subject: kbuild: optimize object directory creation for incremental build The previous commit largely optimized the object directory creation. We can optimize it more for incremental build. There are already *.cmd files in the output directory. The existing *.cmd files have been picked up by $(wildcard ...). Obviously, directories containing them exist too, so we can skip "mkdir -p". With this, Kbuild runs almost zero "mkdir -p" in incremental building. Signed-off-by: Masahiro Yamada --- scripts/Makefile.build | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'scripts') diff --git a/scripts/Makefile.build b/scripts/Makefile.build index 496ecd825c71..8624924a2991 100644 --- a/scripts/Makefile.build +++ b/scripts/Makefile.build @@ -583,8 +583,13 @@ endif ifneq ($(KBUILD_SRC),) # Create directories for object files if they do not exist obj-dirs := $(sort $(obj) $(patsubst %/,%, $(dir $(targets)))) +# If cmd_files exist, their directories apparently exist. Skip mkdir. +exist-dirs := $(sort $(patsubst %/,%, $(dir $(cmd_files)))) +obj-dirs := $(strip $(filter-out $(exist-dirs), $(obj-dirs))) +ifneq ($(obj-dirs),) $(shell mkdir -p $(obj-dirs)) endif +endif # Declare the contents of the .PHONY variable as phony. We keep that # information in a variable se we can use it in if_changed and friends. -- cgit v1.2.3-59-g8ed1b From e474ed45777bc230648186c0db990bd290383ada Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Mon, 13 Nov 2017 19:33:19 +0900 Subject: kbuild: specify FORCE in Makefile.headersinst as .PHONY target Swap the order of ".PHONY: $(PHONY)" and "PHONY += FORCE" so that FORCE is correctly specified as a .PHONY target. Use a preferred way for specifying $(subdirs) as .PHONY targets. Signed-off-by: Masahiro Yamada --- scripts/Makefile.headersinst | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'scripts') diff --git a/scripts/Makefile.headersinst b/scripts/Makefile.headersinst index c6fb2b75d813..086a821ba8f5 100644 --- a/scripts/Makefile.headersinst +++ b/scripts/Makefile.headersinst @@ -26,7 +26,7 @@ subdirs := $(patsubst $(srcdir)/%/,%,\ # Recursion __headers: $(subdirs) -.PHONY: $(subdirs) +PHONY += $(subdirs) $(subdirs): $(Q)$(MAKE) $(hdr-inst)=$(obj)/$@ dst=$(dst)/$@ @@ -123,6 +123,7 @@ endif endif # skip-inst -.PHONY: $(PHONY) PHONY += FORCE FORCE: ; + +.PHONY: $(PHONY) -- cgit v1.2.3-59-g8ed1b From 2f3b55ac0e15857f46a3696e964bb244305223bf Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Mon, 13 Nov 2017 19:40:40 +0900 Subject: selinux: remove unnecessary assignment to subdir- Makefile.clean descends into $(subdir-y). Dummy assignment to subdir- is meaningless. Signed-off-by: Masahiro Yamada Acked-by: Paul Moore --- scripts/selinux/Makefile | 1 - 1 file changed, 1 deletion(-) (limited to 'scripts') diff --git a/scripts/selinux/Makefile b/scripts/selinux/Makefile index e8049da1831f..b3048b894a39 100644 --- a/scripts/selinux/Makefile +++ b/scripts/selinux/Makefile @@ -1,2 +1 @@ subdir-y := mdp genheaders -subdir- += mdp genheaders -- cgit v1.2.3-59-g8ed1b From 7f855fc805cd9c29867aed56cc20f818b36a7b7b Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Tue, 14 Nov 2017 18:47:20 +0900 Subject: kbuild: move coccicheck help from scripts/Makefile.help to top Makefile In my view, it is not helpful to have a separate file just for the coccicheck help message. Merge scripts/Makefile.help into the top-level Makefile. Signed-off-by: Masahiro Yamada Acked-by: Julia Lawall --- Makefile | 2 +- scripts/Makefile.help | 3 --- 2 files changed, 1 insertion(+), 4 deletions(-) delete mode 100644 scripts/Makefile.help (limited to 'scripts') diff --git a/Makefile b/Makefile index 58dd24520c9e..06a5798335fc 100644 --- a/Makefile +++ b/Makefile @@ -1384,7 +1384,7 @@ help: @echo ' export_report - List the usages of all exported symbols' @echo ' headers_check - Sanity check on exported headers' @echo ' headerdep - Detect inclusion cycles in headers' - @$(MAKE) -f $(srctree)/scripts/Makefile.help checker-help + @echo ' coccicheck - Check with Coccinelle' @echo '' @echo 'Kernel selftest:' @echo ' kselftest - Build and run kernel selftest (run as root)' diff --git a/scripts/Makefile.help b/scripts/Makefile.help deleted file mode 100644 index d03608f5db04..000000000000 --- a/scripts/Makefile.help +++ /dev/null @@ -1,3 +0,0 @@ - -checker-help: - @echo ' coccicheck - Check with Coccinelle.' -- cgit v1.2.3-59-g8ed1b