From 8691743c511d6f92d7647d78ea1e5f5ef69937b1 Mon Sep 17 00:00:00 2001 From: Jerome Brunet Date: Wed, 21 Apr 2021 14:05:10 +0200 Subject: ASoC: rt5682: clock driver must use the clock provider API Clock drivers ops should not call the clk API but the clock provider (clk_hw) instead. Signed-off-by: Jerome Brunet Link: https://lore.kernel.org/r/20210421120512.413057-4-jbrunet@baylibre.com Signed-off-by: Mark Brown --- sound/soc/codecs/rt5682.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'sound') diff --git a/sound/soc/codecs/rt5682.c b/sound/soc/codecs/rt5682.c index a5aacfe01a0d..e4c91571abae 100644 --- a/sound/soc/codecs/rt5682.c +++ b/sound/soc/codecs/rt5682.c @@ -2634,7 +2634,7 @@ static int rt5682_wclk_set_rate(struct clk_hw *hw, unsigned long rate, container_of(hw, struct rt5682_priv, dai_clks_hw[RT5682_DAI_WCLK_IDX]); struct snd_soc_component *component = rt5682->component; - struct clk *parent_clk; + struct clk_hw *parent_hw; const char * const clk_name = clk_hw_get_name(hw); int pre_div; unsigned int clk_pll2_out; @@ -2649,8 +2649,8 @@ static int rt5682_wclk_set_rate(struct clk_hw *hw, unsigned long rate, * * It will set the codec anyway by assuming mclk is 48MHz. */ - parent_clk = clk_get_parent(hw->clk); - if (!parent_clk) + parent_hw = clk_hw_get_parent(hw); + if (!parent_hw) dev_warn(component->dev, "Parent mclk of wclk not acquired in driver. Please ensure mclk was provided as %d Hz.\n", CLK_PLL2_FIN); -- cgit v1.2.3-59-g8ed1b