From d605cbb64252071d6a74b4fbb626e1473d91838d Mon Sep 17 00:00:00 2001 From: Oder Chiou Date: Thu, 4 Jun 2020 15:10:16 +0800 Subject: ASoC: rl6231: Modify the target DMIC clock rate Some DMIC components will not work correctly in the clock rate 3.072MHz. We recommend the clock rate 1.536MHz in the gerenal case. Signed-off-by: Oder Chiou Link: https://lore.kernel.org/r/20200604071016.3981-1-oder_chiou@realtek.com Signed-off-by: Mark Brown --- sound/soc/codecs/rl6231.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'sound') diff --git a/sound/soc/codecs/rl6231.c b/sound/soc/codecs/rl6231.c index 2586d1cafc0c..8c9daf32bab8 100644 --- a/sound/soc/codecs/rl6231.c +++ b/sound/soc/codecs/rl6231.c @@ -80,8 +80,8 @@ int rl6231_calc_dmic_clk(int rate) for (i = 0; i < ARRAY_SIZE(div); i++) { if ((div[i] % 3) == 0) continue; - /* find divider that gives DMIC frequency below 3.072MHz */ - if (3072000 * div[i] >= rate) + /* find divider that gives DMIC frequency below 1.536MHz */ + if (1536000 * div[i] >= rate) return i; } -- cgit v1.2.3-59-g8ed1b