From eb7aa044df18c6f7a88bc17fc4c9f4524652a290 Mon Sep 17 00:00:00 2001 From: Athira Rajeev Date: Thu, 27 Jan 2022 12:50:01 +0530 Subject: selftests/powerpc/pmu/: Add interface test for mmcr0 exception bits The testcase uses "instructions" event to verify two bits(PMAE and PMAO) in Monitor Mode Control Register 0 (MMCR0). At the time of interrupt, pmae bit ( which enables performance monitor exception ) is expected to be cleared and pmao (which indicates performance monitor alert) bit is expected to be set in MMCR0. And testcases handles these checks. Signed-off-by: Athira Rajeev [mpe: Add error checking, drop GET_MMCR_FIELD, add to .gitignore] Signed-off-by: Michael Ellerman Link: https://lore.kernel.org/r/20220127072012.662451-10-kjain@linux.ibm.com --- tools/testing/selftests/powerpc/pmu/sampling_tests/.gitignore | 1 + 1 file changed, 1 insertion(+) create mode 100644 tools/testing/selftests/powerpc/pmu/sampling_tests/.gitignore (limited to 'tools/testing/selftests/powerpc/pmu/sampling_tests/.gitignore') diff --git a/tools/testing/selftests/powerpc/pmu/sampling_tests/.gitignore b/tools/testing/selftests/powerpc/pmu/sampling_tests/.gitignore new file mode 100644 index 000000000000..067b9f3a7f84 --- /dev/null +++ b/tools/testing/selftests/powerpc/pmu/sampling_tests/.gitignore @@ -0,0 +1 @@ +mmcr0_exceptionbits_test -- cgit v1.2.3-59-g8ed1b