/* * linux/arch/m32r/kernel/irq.c * * Copyright (c) 2003, 2004 Hitoshi Yamamoto * Copyright (c) 2004 Hirokazu Takata */ /* * linux/arch/i386/kernel/irq.c * * Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar * * This file contains the lowest level m32r-specific interrupt * entry and irq statistics code. All the remaining irq logic is * done by the generic kernel/irq/ code and in the * m32r-specific irq controller code. */ #include #include #include #include #include atomic_t irq_err_count; atomic_t irq_mis_count; /* * Generic, controller-independent functions: */ int show_interrupts(struct seq_file *p, void *v) { int i = *(loff_t *) v, j; struct irqaction * action; unsigned long flags; if (i == 0) { seq_printf(p, " "); for (j=0; jtypename); seq_printf(p, " %s", action->name); for (action=action->next; action; action = action->next) seq_printf(p, ", %s", action->name); seq_putc(p, '\n'); skip: spin_unlock_irqrestore(&irq_desc[i].lock, flags); } else if (i == NR_IRQS) { seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count)); seq_printf(p, "MIS: %10u\n", atomic_read(&irq_mis_count)); } return 0; } /* * do_IRQ handles all normal device IRQ's (the special * SMP cross-CPU interrupts have their own specific * handlers). */ asmlinkage unsigned int do_IRQ(int irq, struct pt_regs *regs) { irq_enter(); #ifdef CONFIG_DEBUG_STACKOVERFLOW /* FIXME M32R */ #endif __do_IRQ(irq, regs); irq_exit(); return 1; }