[ { "PublicDescription": "Number of times a TSX line had a cache conflict.", "EventCode": "0x54", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "TX_MEM.ABORT_CONFLICT", "SampleAfterValue": "2000003", "BriefDescription": "Number of times a transactional abort was signaled due to a data conflict on a transactionally accessed address", "CounterHTOff": "0,1,2,3,4,5,6,7" }, { "EventCode": "0x54", "Counter": "0,1,2,3", "UMask": "0x2", "EventName": "TX_MEM.ABORT_CAPACITY", "SampleAfterValue": "2000003", "BriefDescription": "Number of times a transactional abort was signaled due to a data capacity limitation for transactional reads or writes.", "CounterHTOff": "0,1,2,3,4,5,6,7" }, { "PublicDescription": "Number of times a TSX Abort was triggered due to a non-release/commit store to lock.", "EventCode": "0x54", "Counter": "0,1,2,3", "UMask": "0x4", "EventName": "TX_MEM.ABORT_HLE_STORE_TO_ELIDED_LOCK", "SampleAfterValue": "2000003", "BriefDescription": "Number of times a HLE transactional region aborted due to a non XRELEASE prefixed instruction writing to an elided lock in the elision buffer", "CounterHTOff": "0,1,2,3,4,5,6,7" }, { "PublicDescription": "Number of times a TSX Abort was triggered due to commit but Lock Buffer not empty.", "EventCode": "0x54", "Counter": "0,1,2,3", "UMask": "0x8", "EventName": "TX_MEM.ABORT_HLE_ELISION_BUFFER_NOT_EMPTY", "SampleAfterValue": "2000003", "BriefDescription": "Number of times an HLE transactional execution aborted due to NoAllocatedElisionBuffer being non-zero.", "CounterHTOff": "0,1,2,3,4,5,6,7" }, { "PublicDescription": "Number of times a TSX Abort was triggered due to release/commit but data and address mismatch.", "EventCode": "0x54", "Counter": "0,1,2,3", "UMask": "0x10", "EventName": "TX_MEM.ABORT_HLE_ELISION_BUFFER_MISMATCH", "SampleAfterValue": "2000003", "BriefDescription": "Number of times an HLE transactional execution aborted due to XRELEASE lock not satisfying the address and value requirements in the elision buffer", "CounterHTOff": "0,1,2,3,4,5,6,7" }, { "PublicDescription": "Number of times a TSX Abort was triggered due to attempting an unsupported alignment from Lock Buffer.", "EventCode": "0x54", "Counter": "0,1,2,3", "UMask": "0x20", "EventName": "TX_MEM.ABORT_HLE_ELISION_BUFFER_UNSUPPORTED_ALIGNMENT", "SampleAfterValue": "2000003", "BriefDescription": "Number of times an HLE transactional execution aborted due to an unsupported read alignment from the elision buffer.", "CounterHTOff": "0,1,2,3,4,5,6,7" }, { "PublicDescription": "Number of times we could not allocate Lock Buffer.", "EventCode": "0x54", "Counter": "0,1,2,3", "UMask": "0x40", "EventName": "TX_MEM.HLE_ELISION_BUFFER_FULL", "SampleAfterValue": "2000003", "BriefDescription": "Number of times HLE lock could not be elided due to ElisionBufferAvailable being zero.", "CounterHTOff": "0,1,2,3,4,5,6,7" }, { "EventCode": "0x5d", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "TX_EXEC.MISC1", "SampleAfterValue": "2000003", "BriefDescription": "Counts the number of times a class of instructions that may cause a transactional abort was executed. Since this is the count of execution, it may not always cause a transactional abort.", "CounterHTOff": "0,1,2,3,4,5,6,7" }, { "PublicDescription": "Unfriendly TSX abort triggered by a vzeroupper instruction.", "EventCode": "0x5d", "Counter": "0,1,2,3", "UMask": "0x2", "EventName": "TX_EXEC.MISC2", "SampleAfterValue": "2000003", "BriefDescription": "Counts the number of times a class of instructions (e.g., vzeroupper) that may cause a transactional abort was executed inside a transactional region", "CounterHTOff": "0,1,2,3,4,5,6,7" }, { "PublicDescription": "Unfriendly TSX abort triggered by a nest count that is too deep.", "EventCode": "0x5d", "Counter": "0,1,2,3", "UMask": "0x4", "EventName": "TX_EXEC.MISC3", "SampleAfterValue": "2000003", "BriefDescription": "Counts the number of times an instruction execution caused the transactional nest count supported to be exceeded", "CounterHTOff": "0,1,2,3,4,5,6,7" }, { "PublicDescription": "RTM region detected inside HLE.", "EventCode": "0x5d", "Counter": "0,1,2,3", "UMask": "0x8", "EventName": "TX_EXEC.MISC4", "SampleAfterValue": "2000003", "BriefDescription": "Counts the number of times a XBEGIN instruction was executed inside an HLE transactional region.", "CounterHTOff": "0,1,2,3,4,5,6,7" }, { "PublicDescription": "Counts the number of times an HLE XACQUIRE instruction was executed inside an RTM transactional region.", "EventCode": "0x5d", "Counter": "0,1,2,3", "UMask": "0x10", "EventName": "TX_EXEC.MISC5", "SampleAfterValue": "2000003", "BriefDescription": "Counts the number of times an HLE XACQUIRE instruction was executed inside an RTM transactional region", "CounterHTOff": "0,1,2,3,4,5,6,7" }, { "EventCode": "0x60", "Counter": "0,1,2,3", "UMask": "0x10", "EventName": "OFFCORE_REQUESTS_OUTSTANDING.L3_MISS_DEMAND_DATA_RD", "SampleAfterValue": "2000003", "BriefDescription": "Counts number of Offcore outstanding Demand Data Read requests that miss L3 cache in the superQ every cycle.", "CounterHTOff": "0,1,2,3,4,5,6,7" }, { "EventCode": "0x60", "Counter": "0,1,2,3", "UMask": "0x10", "EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_L3_MISS_DEMAND_DATA_RD", "SampleAfterValue": "2000003", "BriefDescription": "Cycles with at least 1 Demand Data Read requests who miss L3 cache in the superQ.", "CounterMask": "1", "CounterHTOff": "0,1,2,3,4,5,6,7" }, { "EventCode": "0x60", "Counter": "0,1,2,3", "UMask": "0x10", "EventName": "OFFCORE_REQUESTS_OUTSTANDING.L3_MISS_DEMAND_DATA_RD_GE_6", "SampleAfterValue": "2000003", "BriefDescription": "Cycles with at least 6 Demand Data Read requests that miss L3 cache in the superQ.", "CounterMask": "6", "CounterHTOff": "0,1,2,3,4,5,6,7" }, { "EventCode": "0xA3", "Counter": "0,1,2,3", "UMask": "0x2", "EventName": "CYCLE_ACTIVITY.CYCLES_L3_MISS", "SampleAfterValue": "2000003", "BriefDescription": "Cycles while L3 cache miss demand load is outstanding.", "CounterMask": "2", "CounterHTOff": "0,1,2,3,4,5,6,7" }, { "EventCode": "0xA3", "Counter": "0,1,2,3", "UMask": "0x6", "EventName": "CYCLE_ACTIVITY.STALLS_L3_MISS", "SampleAfterValue": "2000003", "BriefDescription": "Execution stalls while L3 cache miss demand load is outstanding.", "CounterMask": "6", "CounterHTOff": "0,1,2,3,4,5,6,7" }, { "PublicDescription": "Demand Data Read requests who miss L3 cache.", "EventCode": "0xB0", "Counter": "0,1,2,3", "UMask": "0x10", "EventName": "OFFCORE_REQUESTS.L3_MISS_DEMAND_DATA_RD", "SampleAfterValue": "100003", "BriefDescription": "Demand Data Read requests who miss L3 cache", "CounterHTOff": "0,1,2,3,4,5,6,7" }, { "PublicDescription": "Counts the number of memory ordering Machine Clears detected. Memory Ordering Machine Clears can result from one of the following:a. memory disambiguation,b. external snoop, orc. cross SMT-HW-thread snoop (stores) hitting load buffer.", "EventCode": "0xC3", "Counter": "0,1,2,3", "UMask": "0x2", "Errata": "SKL089", "EventName": "MACHINE_CLEARS.MEMORY_ORDERING", "SampleAfterValue": "100003", "BriefDescription": "Counts the number of machine clears due to memory order conflicts.", "CounterHTOff": "0,1,2,3,4,5,6,7" }, { "PublicDescription": "Number of times we entered an HLE region. Does not count nested transactions.", "EventCode": "0xC8", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "HLE_RETIRED.START", "SampleAfterValue": "2000003", "BriefDescription": "Number of times an HLE execution started.", "CounterHTOff": "0,1,2,3,4,5,6,7" }, { "PublicDescription": "Number of times HLE commit succeeded.", "EventCode": "0xC8", "Counter": "0,1,2,3", "UMask": "0x2", "EventName": "HLE_RETIRED.COMMIT", "SampleAfterValue": "2000003", "BriefDescription": "Number of times an HLE execution successfully committed", "CounterHTOff": "0,1,2,3,4,5,6,7" }, { "PEBS": "1", "PublicDescription": "Number of times HLE abort was triggered. (PEBS)", "EventCode": "0xC8", "Counter": "0,1,2,3", "UMask": "0x4", "EventName": "HLE_RETIRED.ABORTED", "SampleAfterValue": "2000003", "BriefDescription": "Number of times an HLE execution aborted due to any reasons (multiple categories may count as one).", "CounterHTOff": "0,1,2,3,4,5,6,7" }, { "EventCode": "0xC8", "Counter": "0,1,2,3", "UMask": "0x8", "EventName": "HLE_RETIRED.ABORTED_MEM", "SampleAfterValue": "2000003", "BriefDescription": "Number of times an HLE execution aborted due to various memory events (e.g., read/write capacity and conflicts).", "CounterHTOff": "0,1,2,3,4,5,6,7" }, { "EventCode": "0xC8", "Counter": "0,1,2,3", "UMask": "0x10", "EventName": "HLE_RETIRED.ABORTED_TIMER", "SampleAfterValue": "2000003", "BriefDescription": "Number of times an HLE execution aborted due to hardware timer expiration.", "CounterHTOff": "0,1,2,3,4,5,6,7" }, { "PublicDescription": "Number of times an HLE execution aborted due to HLE-unfriendly instructions and certain unfriendly events (such as AD assists etc.).", "EventCode": "0xC8", "Counter": "0,1,2,3", "UMask": "0x20", "EventName": "HLE_RETIRED.ABORTED_UNFRIENDLY", "SampleAfterValue": "2000003", "BriefDescription": "Number of times an HLE execution aborted due to HLE-unfriendly instructions and certain unfriendly events (such as AD assists etc.).", "CounterHTOff": "0,1,2,3,4,5,6,7" }, { "PublicDescription": "Number of times an HLE execution aborted due to incompatible memory type.", "EventCode": "0xC8", "Counter": "0,1,2,3", "UMask": "0x40", "EventName": "HLE_RETIRED.ABORTED_MEMTYPE", "SampleAfterValue": "2000003", "BriefDescription": "Number of times an HLE execution aborted due to incompatible memory type", "CounterHTOff": "0,1,2,3,4,5,6,7" }, { "EventCode": "0xC8", "Counter": "0,1,2,3", "UMask": "0x80", "EventName": "HLE_RETIRED.ABORTED_EVENTS", "SampleAfterValue": "2000003", "BriefDescription": "Number of times an HLE execution aborted due to unfriendly events (such as interrupts).", "CounterHTOff": "0,1,2,3,4,5,6,7" }, { "PublicDescription": "Number of times we entered an RTM region. Does not count nested transactions.", "EventCode": "0xC9", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "RTM_RETIRED.START", "SampleAfterValue": "2000003", "BriefDescription": "Number of times an RTM execution started.", "CounterHTOff": "0,1,2,3,4,5,6,7" }, { "PublicDescription": "Number of times RTM commit succeeded.", "EventCode": "0xC9", "Counter": "0,1,2,3", "UMask": "0x2", "EventName": "RTM_RETIRED.COMMIT", "SampleAfterValue": "2000003", "BriefDescription": "Number of times an RTM execution successfully committed", "CounterHTOff": "0,1,2,3,4,5,6,7" }, { "PEBS": "1", "PublicDescription": "Number of times RTM abort was triggered. (PEBS)", "EventCode": "0xC9", "Counter": "0,1,2,3", "UMask": "0x4", "EventName": "RTM_RETIRED.ABORTED", "SampleAfterValue": "2000003", "BriefDescription": "Number of times an RTM execution aborted due to any reasons (multiple categories may count as one).", "CounterHTOff": "0,1,2,3,4,5,6,7" }, { "PublicDescription": "Number of times an RTM execution aborted due to various memory events (e.g. read/write capacity and conflicts).", "EventCode": "0xC9", "Counter": "0,1,2,3", "UMask": "0x8", "EventName": "RTM_RETIRED.ABORTED_MEM", "SampleAfterValue": "2000003", "BriefDescription": "Number of times an RTM execution aborted due to various memory events (e.g. read/write capacity and conflicts)", "CounterHTOff": "0,1,2,3,4,5,6,7" }, { "EventCode": "0xC9", "Counter": "0,1,2,3", "UMask": "0x10", "EventName": "RTM_RETIRED.ABORTED_TIMER", "SampleAfterValue": "2000003", "BriefDescription": "Number of times an RTM execution aborted due to uncommon conditions.", "CounterHTOff": "0,1,2,3,4,5,6,7" }, { "PublicDescription": "Number of times an RTM execution aborted due to HLE-unfriendly instructions.", "EventCode": "0xC9", "Counter": "0,1,2,3", "UMask": "0x20", "EventName": "RTM_RETIRED.ABORTED_UNFRIENDLY", "SampleAfterValue": "2000003", "BriefDescription": "Number of times an RTM execution aborted due to HLE-unfriendly instructions", "CounterHTOff": "0,1,2,3,4,5,6,7" }, { "PublicDescription": "Number of times an RTM execution aborted due to incompatible memory type.", "EventCode": "0xC9", "Counter": "0,1,2,3", "UMask": "0x40", "EventName": "RTM_RETIRED.ABORTED_MEMTYPE", "SampleAfterValue": "2000003", "BriefDescription": "Number of times an RTM execution aborted due to incompatible memory type", "CounterHTOff": "0,1,2,3,4,5,6,7" }, { "PublicDescription": "Number of times an RTM execution aborted due to none of the previous 4 categories (e.g. interrupt).", "EventCode": "0xC9", "Counter": "0,1,2,3", "UMask": "0x80", "EventName": "RTM_RETIRED.ABORTED_EVENTS", "SampleAfterValue": "2000003", "BriefDescription": "Number of times an RTM execution aborted due to none of the previous 4 categories (e.g. interrupt)", "CounterHTOff": "0,1,2,3,4,5,6,7" }, { "PEBS": "2", "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 4 cycles. Reported latency may be longer than just the memory latency.", "EventCode": "0xCD", "MSRValue": "0x4", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_4", "MSRIndex": "0x3F6", "SampleAfterValue": "100003", "BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 4 cycles.", "TakenAlone": "1", "CounterHTOff": "0,1,2,3" }, { "PEBS": "2", "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 8 cycles. Reported latency may be longer than just the memory latency.", "EventCode": "0xCD", "MSRValue": "0x8", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_8", "MSRIndex": "0x3F6", "SampleAfterValue": "50021", "BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 8 cycles.", "TakenAlone": "1", "CounterHTOff": "0,1,2,3" }, { "PEBS": "2", "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 16 cycles. Reported latency may be longer than just the memory latency.", "EventCode": "0xCD", "MSRValue": "0x10", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_16", "MSRIndex": "0x3F6", "SampleAfterValue": "20011", "BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 16 cycles.", "TakenAlone": "1", "CounterHTOff": "0,1,2,3" }, { "PEBS": "2", "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 32 cycles. Reported latency may be longer than just the memory latency.", "EventCode": "0xCD", "MSRValue": "0x20", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_32", "MSRIndex": "0x3F6", "SampleAfterValue": "100007", "BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 32 cycles.", "TakenAlone": "1", "CounterHTOff": "0,1,2,3" }, { "PEBS": "2", "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 64 cycles. Reported latency may be longer than just the memory latency.", "EventCode": "0xCD", "MSRValue": "0x40", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_64", "MSRIndex": "0x3F6", "SampleAfterValue": "2003", "BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 64 cycles.", "TakenAlone": "1", "CounterHTOff": "0,1,2,3" }, { "PEBS": "2", "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 128 cycles. Reported latency may be longer than just the memory latency.", "EventCode": "0xCD", "MSRValue": "0x80", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_128", "MSRIndex": "0x3F6", "SampleAfterValue": "1009", "BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 128 cycles.", "TakenAlone": "1", "CounterHTOff": "0,1,2,3" }, { "PEBS": "2", "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 256 cycles. Reported latency may be longer than just the memory latency.", "EventCode": "0xCD", "MSRValue": "0x100", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_256", "MSRIndex": "0x3F6", "SampleAfterValue": "503", "BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 256 cycles.", "TakenAlone": "1", "CounterHTOff": "0,1,2,3" }, { "PEBS": "2", "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 512 cycles. Reported latency may be longer than just the memory latency.", "EventCode": "0xCD", "MSRValue": "0x200", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_512", "MSRIndex": "0x3F6", "SampleAfterValue": "101", "BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 512 cycles.", "TakenAlone": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts any other requests", "EventCode": "0xB7, 0xBB", "MSRValue": "0x3FFC408000", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS.ANY_SNOOP", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts any other requests", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts any other requests", "EventCode": "0xB7, 0xBB", "MSRValue": "0x203C408000", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS.SNOOP_NON_DRAM", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts any other requests", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts any other requests", "EventCode": "0xB7, 0xBB", "MSRValue": "0x103C408000", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS.SNOOP_HITM", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts any other requests", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts any other requests", "EventCode": "0xB7, 0xBB", "MSRValue": "0x043C408000", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS.SNOOP_HIT_NO_FWD", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts any other requests", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts any other requests", "EventCode": "0xB7, 0xBB", "MSRValue": "0x023C408000", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS.SNOOP_MISS", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts any other requests", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts any other requests", "EventCode": "0xB7, 0xBB", "MSRValue": "0x013C408000", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS.SNOOP_NOT_NEEDED", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts any other requests", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts any other requests", "EventCode": "0xB7, 0xBB", "MSRValue": "0x00BC408000", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS.SNOOP_NONE", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts any other requests", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts any other requests", "EventCode": "0xB7, 0xBB", "MSRValue": "0x007C408000", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS.SPL_HIT", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts any other requests", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts any other requests", "EventCode": "0xB7, 0xBB", "MSRValue": "0x3FC4008000", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_LOCAL_DRAM.ANY_SNOOP", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts any other requests", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts any other requests", "EventCode": "0xB7, 0xBB", "MSRValue": "0x2004008000", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_LOCAL_DRAM.SNOOP_NON_DRAM", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts any other requests", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts any other requests", "EventCode": "0xB7, 0xBB", "MSRValue": "0x1004008000", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_LOCAL_DRAM.SNOOP_HITM", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts any other requests", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts any other requests", "EventCode": "0xB7, 0xBB", "MSRValue": "0x0404008000", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_LOCAL_DRAM.SNOOP_HIT_NO_FWD", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts any other requests", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts any other requests", "EventCode": "0xB7, 0xBB", "MSRValue": "0x0204008000", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_LOCAL_DRAM.SNOOP_MISS", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts any other requests", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts any other requests", "EventCode": "0xB7, 0xBB", "MSRValue": "0x0104008000", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_LOCAL_DRAM.SNOOP_NOT_NEEDED", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts any other requests", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts any other requests", "EventCode": "0xB7, 0xBB", "MSRValue": "0x0084008000", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_LOCAL_DRAM.SNOOP_NONE", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts any other requests", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts any other requests", "EventCode": "0xB7, 0xBB", "MSRValue": "0x0044008000", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_LOCAL_DRAM.SPL_HIT", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts any other requests", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts any other requests", "EventCode": "0xB7, 0xBB", "MSRValue": "0x2000408000", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.OTHER.L4_HIT_LOCAL_L4.SNOOP_NON_DRAM", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts any other requests", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts any other requests", "EventCode": "0xB7, 0xBB", "MSRValue": "0x20001C8000", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT.SNOOP_NON_DRAM", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts any other requests", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts any other requests", "EventCode": "0xB7, 0xBB", "MSRValue": "0x2000108000", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_S.SNOOP_NON_DRAM", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts any other requests", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts any other requests", "EventCode": "0xB7, 0xBB", "MSRValue": "0x2000088000", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_E.SNOOP_NON_DRAM", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts any other requests", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts any other requests", "EventCode": "0xB7, 0xBB", "MSRValue": "0x2000048000", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_M.SNOOP_NON_DRAM", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts any other requests", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts any other requests", "EventCode": "0xB7, 0xBB", "MSRValue": "0x2000028000", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.OTHER.SUPPLIER_NONE.SNOOP_NON_DRAM", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts any other requests", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", "EventCode": "0xB7, 0xBB", "MSRValue": "0x3FFC400004", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS.ANY_SNOOP", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", "EventCode": "0xB7, 0xBB", "MSRValue": "0x203C400004", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS.SNOOP_NON_DRAM", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", "EventCode": "0xB7, 0xBB", "MSRValue": "0x103C400004", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS.SNOOP_HITM", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", "EventCode": "0xB7, 0xBB", "MSRValue": "0x043C400004", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS.SNOOP_HIT_NO_FWD", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", "EventCode": "0xB7, 0xBB", "MSRValue": "0x023C400004", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS.SNOOP_MISS", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", "EventCode": "0xB7, 0xBB", "MSRValue": "0x013C400004", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS.SNOOP_NOT_NEEDED", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", "EventCode": "0xB7, 0xBB", "MSRValue": "0x00BC400004", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS.SNOOP_NONE", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", "EventCode": "0xB7, 0xBB", "MSRValue": "0x007C400004", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS.SPL_HIT", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", "EventCode": "0xB7, 0xBB", "MSRValue": "0x3FC4000004", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", "EventCode": "0xB7, 0xBB", "MSRValue": "0x2004000004", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_NON_DRAM", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", "EventCode": "0xB7, 0xBB", "MSRValue": "0x1004000004", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_HITM", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", "EventCode": "0xB7, 0xBB", "MSRValue": "0x0404000004", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_HIT_NO_FWD", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", "EventCode": "0xB7, 0xBB", "MSRValue": "0x0204000004", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", "EventCode": "0xB7, 0xBB", "MSRValue": "0x0104000004", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_NOT_NEEDED", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", "EventCode": "0xB7, 0xBB", "MSRValue": "0x0084000004", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", "EventCode": "0xB7, 0xBB", "MSRValue": "0x0044000004", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.SPL_HIT", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", "EventCode": "0xB7, 0xBB", "MSRValue": "0x2000400004", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L4_HIT_LOCAL_L4.SNOOP_NON_DRAM", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", "EventCode": "0xB7, 0xBB", "MSRValue": "0x20001C0004", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT.SNOOP_NON_DRAM", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", "EventCode": "0xB7, 0xBB", "MSRValue": "0x2000100004", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_S.SNOOP_NON_DRAM", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", "EventCode": "0xB7, 0xBB", "MSRValue": "0x2000080004", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_E.SNOOP_NON_DRAM", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", "EventCode": "0xB7, 0xBB", "MSRValue": "0x2000040004", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_M.SNOOP_NON_DRAM", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", "EventCode": "0xB7, 0xBB", "MSRValue": "0x2000020004", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.SUPPLIER_NONE.SNOOP_NON_DRAM", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts all demand data writes (RFOs)", "EventCode": "0xB7, 0xBB", "MSRValue": "0x3FFC400002", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS.ANY_SNOOP", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts all demand data writes (RFOs)", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts all demand data writes (RFOs)", "EventCode": "0xB7, 0xBB", "MSRValue": "0x203C400002", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS.SNOOP_NON_DRAM", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts all demand data writes (RFOs)", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts all demand data writes (RFOs)", "EventCode": "0xB7, 0xBB", "MSRValue": "0x103C400002", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS.SNOOP_HITM", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts all demand data writes (RFOs)", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts all demand data writes (RFOs)", "EventCode": "0xB7, 0xBB", "MSRValue": "0x043C400002", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS.SNOOP_HIT_NO_FWD", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts all demand data writes (RFOs)", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts all demand data writes (RFOs)", "EventCode": "0xB7, 0xBB", "MSRValue": "0x023C400002", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS.SNOOP_MISS", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts all demand data writes (RFOs)", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts all demand data writes (RFOs)", "EventCode": "0xB7, 0xBB", "MSRValue": "0x013C400002", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS.SNOOP_NOT_NEEDED", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts all demand data writes (RFOs)", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts all demand data writes (RFOs)", "EventCode": "0xB7, 0xBB", "MSRValue": "0x00BC400002", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS.SNOOP_NONE", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts all demand data writes (RFOs)", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts all demand data writes (RFOs)", "EventCode": "0xB7, 0xBB", "MSRValue": "0x007C400002", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS.SPL_HIT", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts all demand data writes (RFOs)", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts all demand data writes (RFOs)", "EventCode": "0xB7, 0xBB", "MSRValue": "0x3FC4000002", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts all demand data writes (RFOs)", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts all demand data writes (RFOs)", "EventCode": "0xB7, 0xBB", "MSRValue": "0x2004000002", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NON_DRAM", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts all demand data writes (RFOs)", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts all demand data writes (RFOs)", "EventCode": "0xB7, 0xBB", "MSRValue": "0x1004000002", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_LOCAL_DRAM.SNOOP_HITM", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts all demand data writes (RFOs)", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts all demand data writes (RFOs)", "EventCode": "0xB7, 0xBB", "MSRValue": "0x0404000002", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_LOCAL_DRAM.SNOOP_HIT_NO_FWD", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts all demand data writes (RFOs)", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts all demand data writes (RFOs)", "EventCode": "0xB7, 0xBB", "MSRValue": "0x0204000002", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts all demand data writes (RFOs)", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts all demand data writes (RFOs)", "EventCode": "0xB7, 0xBB", "MSRValue": "0x0104000002", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NOT_NEEDED", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts all demand data writes (RFOs)", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts all demand data writes (RFOs)", "EventCode": "0xB7, 0xBB", "MSRValue": "0x0084000002", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts all demand data writes (RFOs)", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts all demand data writes (RFOs)", "EventCode": "0xB7, 0xBB", "MSRValue": "0x0044000002", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_LOCAL_DRAM.SPL_HIT", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts all demand data writes (RFOs)", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts all demand data writes (RFOs)", "EventCode": "0xB7, 0xBB", "MSRValue": "0x2000400002", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L4_HIT_LOCAL_L4.SNOOP_NON_DRAM", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts all demand data writes (RFOs)", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts all demand data writes (RFOs)", "EventCode": "0xB7, 0xBB", "MSRValue": "0x20001C0002", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT.SNOOP_NON_DRAM", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts all demand data writes (RFOs)", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts all demand data writes (RFOs)", "EventCode": "0xB7, 0xBB", "MSRValue": "0x2000100002", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_S.SNOOP_NON_DRAM", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts all demand data writes (RFOs)", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts all demand data writes (RFOs)", "EventCode": "0xB7, 0xBB", "MSRValue": "0x2000080002", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_E.SNOOP_NON_DRAM", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts all demand data writes (RFOs)", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts all demand data writes (RFOs)", "EventCode": "0xB7, 0xBB", "MSRValue": "0x2000040002", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_M.SNOOP_NON_DRAM", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts all demand data writes (RFOs)", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts all demand data writes (RFOs)", "EventCode": "0xB7, 0xBB", "MSRValue": "0x2000020002", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.SUPPLIER_NONE.SNOOP_NON_DRAM", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts all demand data writes (RFOs)", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts demand data reads", "EventCode": "0xB7, 0xBB", "MSRValue": "0x3FFC400001", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS.ANY_SNOOP", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts demand data reads", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts demand data reads", "EventCode": "0xB7, 0xBB", "MSRValue": "0x203C400001", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS.SNOOP_NON_DRAM", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts demand data reads", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts demand data reads", "EventCode": "0xB7, 0xBB", "MSRValue": "0x103C400001", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS.SNOOP_HITM", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts demand data reads", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts demand data reads", "EventCode": "0xB7, 0xBB", "MSRValue": "0x043C400001", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS.SNOOP_HIT_NO_FWD", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts demand data reads", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts demand data reads", "EventCode": "0xB7, 0xBB", "MSRValue": "0x023C400001", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS.SNOOP_MISS", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts demand data reads", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts demand data reads", "EventCode": "0xB7, 0xBB", "MSRValue": "0x013C400001", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS.SNOOP_NOT_NEEDED", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts demand data reads", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts demand data reads", "EventCode": "0xB7, 0xBB", "MSRValue": "0x00BC400001", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS.SNOOP_NONE", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts demand data reads", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts demand data reads", "EventCode": "0xB7, 0xBB", "MSRValue": "0x007C400001", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS.SPL_HIT", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts demand data reads", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts demand data reads", "EventCode": "0xB7, 0xBB", "MSRValue": "0x3FC4000001", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts demand data reads", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts demand data reads", "EventCode": "0xB7, 0xBB", "MSRValue": "0x2004000001", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NON_DRAM", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts demand data reads", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts demand data reads", "EventCode": "0xB7, 0xBB", "MSRValue": "0x1004000001", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_HITM", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts demand data reads", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts demand data reads", "EventCode": "0xB7, 0xBB", "MSRValue": "0x0404000001", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_HIT_NO_FWD", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts demand data reads", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts demand data reads", "EventCode": "0xB7, 0xBB", "MSRValue": "0x0204000001", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts demand data reads", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts demand data reads", "EventCode": "0xB7, 0xBB", "MSRValue": "0x0104000001", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NOT_NEEDED", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts demand data reads", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts demand data reads", "EventCode": "0xB7, 0xBB", "MSRValue": "0x0084000001", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts demand data reads", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts demand data reads", "EventCode": "0xB7, 0xBB", "MSRValue": "0x0044000001", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.SPL_HIT", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts demand data reads", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts demand data reads", "EventCode": "0xB7, 0xBB", "MSRValue": "0x2000400001", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L4_HIT_LOCAL_L4.SNOOP_NON_DRAM", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts demand data reads", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts demand data reads", "EventCode": "0xB7, 0xBB", "MSRValue": "0x20001C0001", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT.SNOOP_NON_DRAM", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts demand data reads", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts demand data reads", "EventCode": "0xB7, 0xBB", "MSRValue": "0x2000100001", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_S.SNOOP_NON_DRAM", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts demand data reads", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts demand data reads", "EventCode": "0xB7, 0xBB", "MSRValue": "0x2000080001", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_E.SNOOP_NON_DRAM", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts demand data reads", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts demand data reads", "EventCode": "0xB7, 0xBB", "MSRValue": "0x2000040001", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_M.SNOOP_NON_DRAM", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts demand data reads", "Offcore": "1", "CounterHTOff": "0,1,2,3" }, { "PublicDescription": "Counts demand data reads", "EventCode": "0xB7, 0xBB", "MSRValue": "0x2000020001", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.SUPPLIER_NONE.SNOOP_NON_DRAM", "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts demand data reads", "Offcore": "1", "CounterHTOff": "0,1,2,3" } ]