aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-s3c24xx/irq-s3c244x.c
blob: 5fe8e58d3afdb5a5c6f7d1d40e621ed383b0dd42 (plain) (blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
/* linux/arch/arm/plat-s3c24xx/s3c244x-irq.c
 *
 * Copyright (c) 2003-2004 Simtec Electronics
 *	Ben Dooks <ben@simtec.co.uk>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 *
*/

#include <linux/init.h>
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/device.h>
#include <linux/io.h>

#include <mach/hardware.h>
#include <asm/irq.h>

#include <asm/mach/irq.h>

#include <mach/regs-irq.h>
#include <mach/regs-gpio.h>

#include <plat/cpu.h>
#include <plat/pm.h>
#include <plat/irq.h>

/* camera irq */

static void s3c_irq_demux_cam(unsigned int irq,
			      struct irq_desc *desc)
{
	unsigned int subsrc, submsk;

	/* read the current pending interrupts, and the mask
	 * for what it is available */

	subsrc = __raw_readl(S3C2410_SUBSRCPND);
	submsk = __raw_readl(S3C2410_INTSUBMSK);

	subsrc &= ~submsk;
	subsrc >>= 11;
	subsrc &= 3;

	if (subsrc != 0) {
		if (subsrc & 1) {
			generic_handle_irq(IRQ_S3C2440_CAM_C);
		}
		if (subsrc & 2) {
			generic_handle_irq(IRQ_S3C2440_CAM_P);
		}
	}
}

#define INTMSK_CAM (1UL << (IRQ_CAM - IRQ_EINT0))

static void
s3c_irq_cam_mask(struct irq_data *data)
{
	s3c_irqsub_mask(data->irq, INTMSK_CAM, 3 << 11);
}

static void
s3c_irq_cam_unmask(struct irq_data *data)
{
	s3c_irqsub_unmask(data->irq, INTMSK_CAM);
}

static void
s3c_irq_cam_ack(struct irq_data *data)
{
	s3c_irqsub_maskack(data->irq, INTMSK_CAM, 3 << 11);
}

static struct irq_chip s3c_irq_cam = {
	.irq_mask	= s3c_irq_cam_mask,
	.irq_unmask	= s3c_irq_cam_unmask,
	.irq_ack	= s3c_irq_cam_ack,
};

static int s3c244x_irq_add(struct device *dev, struct subsys_interface *sif)
{
	unsigned int irqno;

	irq_set_chip_and_handler(IRQ_NFCON, &s3c_irq_level_chip,
				 handle_level_irq);
	set_irq_flags(IRQ_NFCON, IRQF_VALID);

	/* add chained handler for camera */

	irq_set_chip_and_handler(IRQ_CAM, &s3c_irq_level_chip,
				 handle_level_irq);
	irq_set_chained_handler(IRQ_CAM, s3c_irq_demux_cam);

	for (irqno = IRQ_S3C2440_CAM_C; irqno <= IRQ_S3C2440_CAM_P; irqno++) {
		irq_set_chip_and_handler(irqno, &s3c_irq_cam,
					 handle_level_irq);
		set_irq_flags(irqno, IRQF_VALID);
	}

	return 0;
}

static struct subsys_interface s3c2440_irq_interface = {
	.name		= "s3c2440_irq",
	.subsys		= &s3c2440_subsys,
	.add_dev	= s3c244x_irq_add,
};

static int s3c2440_irq_init(void)
{
	return subsys_interface_register(&s3c2440_irq_interface);
}

arch_initcall(s3c2440_irq_init);

static struct subsys_interface s3c2442_irq_interface = {
	.name		= "s3c2442_irq",
	.subsys		= &s3c2442_subsys,
	.add_dev	= s3c244x_irq_add,
};


static int s3c2442_irq_init(void)
{
	return subsys_interface_register(&s3c2442_irq_interface);
}

arch_initcall(s3c2442_irq_init);