linux-rng/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src, branch master

drm/amd/display: Fix redundant GPUVMEnable checks in dcn6 flip schedule

2026-08-25T22:23:50Z

Inside dcn6_calculate_flip_schedule(), GPUVMEnable is already checked in the outer if block. But the same GPUVMEnable is checked again in two inner if blocks inside it. Since GPUVMEnable is always true at that point, the inner else branches that assign meta_row_height are never reached. Remove the redundant inner GPUVMEnable checks and directly assign dpte_row_height, which is always the correct value here. Fixes: 7f7d7ea1fa51 ("drm/amd/display: Add new sources for DCN6") Reported-by: Dan Carpenter Cc: Roman Li Cc: Alex Hung Cc: Tom Chung Cc: Aurabindo Pillai Signed-off-by: Srinivasan Shanmugam Reviewed-by: George Zhang Signed-off-by: Alex Deucher

drm/amd/display: Fix wrong bytes-per-pixel value for dml2_422_packed_10

2026-08-25T22:23:05Z

The pixel format dml2_422_packed_10 needs BytePerPixelDETY set to 8.0/3. But it was accidentally placed in the wrong group that sets it to 4, so the correct value was never used. This caused wrong DET buffer size and bandwidth calculations whenever this format was used. Fix it by moving dml2_422_packed_10 out of the wrong group so it gets the correct value of 8.0/3. Fixes: 7f7d7ea1fa51 ("drm/amd/display: Add new sources for DCN6") Reported-by: Dan Carpenter Cc: Roman Li Cc: Alex Hung Cc: Tom Chung Cc: Aurabindo Pillai Signed-off-by: Srinivasan Shanmugam Reviewed-by: George Zhang Signed-off-by: Alex Deucher

drm/amd/display: Enable DCN6 sources compilation

2026-08-06T13:53:32Z

- Add hooks in various entry points to perform hw/sw init for DCN6 asic - Add dependent changes needed to enable DCN6 asic - Update the Makefiles so that DCN6 related newly added sources are compiled Signed-off-by: Aurabindo Pillai Signed-off-by: Roman Li Reviewed-by: Ivan Lipski Tested-by: Dan Wheeler Signed-off-by: Alex Deucher

drm/amd/display: Add new sources for DCN6

2026-08-06T13:48:29Z

Add DCN6 code to DC, DML2, and DMUB Signed-off-by: Aurabindo Pillai Signed-off-by: Roman Li Reviewed-by: Ivan Lipski Tested-by: Dan Wheeler Signed-off-by: Alex Deucher

drm/amd/display: plumb PMO per-plane pstate methods into mode_support

2026-07-28T23:17:31Z

[Why] mode_support reads mode_lib.ms.uclk_pstate_switch_modes to enforce the vactive pstate margin, but nothing populates it: the memset clears it and the PMO selection is never passed in. The check always sees na and never runs, so a plane with negative vactive margin can still pass and blank the display. [How] Add a const per-plane pstate-method pointer to mode_support_ex, point it at stage3.pstate_switch_modes when stage 3 has run (NULL otherwise), and copy it into mode_lib.ms after the memset. Scope the support-required check to the vactive methods it governs (vactive, fw_vactive_drr) so SVP, DRR and vblank planes are not rejected by the vactive support flag. Reviewed-by: Charlene Liu Signed-off-by: Alexander Chechik Signed-off-by: Matthew Stewart Signed-off-by: Fangzhi Zuo Tested-by: Dan Wheeler Signed-off-by: Alex Deucher

drm/amd/display: Fix rounding errors in CalculatePrefetchSchedule

2026-07-28T23:17:31Z

[why] Rounding errors were causing mode validation to fail in some cases when it should not. (IE. Increasing fclk from a lower value could lead to validation failure, which should not happen.) Reviewed-by: Dillon Varone Signed-off-by: Matthew Stewart Signed-off-by: Fangzhi Zuo Tested-by: Dan Wheeler Signed-off-by: Alex Deucher

drm/amd/display: enforce UCLK pstate support in mode_support

2026-07-28T23:17:31Z

[Why] mode_support does not require UCLK pstate today, so later PMO optimization stages can push a plane's VActive latency-hiding margin below zero without rechecking that the config still supports UCLK pstate. This can blank the display on high-bandwidth configs. [How] Plumb the PMO-selected per-plane pstate method into mode_support and fail the config only when UCLK pstate is required (method != na) but not supported. For planes committed to a vactive method, require a non-negative VActive latency-hiding margin, and skip the check when all streams are blanked. No-op the PMO DCN42 pstate test (returning false only on the initial candidate so the optimize/FAMS2 stage-3 setup still runs), since reserved time is guaranteed by the override and the vactive margin is now enforced in core mode_support. Reviewed-by: Dillon Varone Signed-off-by: Alexander Chechik Signed-off-by: Matthew Stewart Signed-off-by: Fangzhi Zuo Tested-by: Dan Wheeler Signed-off-by: Alex Deucher

drm/amd/display: Fix divide-by-zero in calculate_mcache_setting on zero viewport

2026-07-28T23:17:31Z

If a plane reaches calculate_mcache_setting with a zero-area viewport, calculate_mcache_setting exits early with num_mcaches == 0 and mvmpg_width/height == 0. This will cause a divide-by-zero panic and can also cause an underflow on num_mcaches. Fix this by changing calculate_mcache_setting to bool and adding guards after each calculate_mcache_row_bytes call. If num_mcaches or mvmpg_width/height is zero, return a false. Callers will propagate the failure as a rejected mode, which prevents the panic. Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/5302 Reviewed-by: Sun peng (Leo) Li Reviewed-by: Dillon Varone Signed-off-by: George Zhang Signed-off-by: Fangzhi Zuo Tested-by: Dan Wheeler Signed-off-by: Alex Deucher

drm/amd/display: Correct vblank_end calc for fams cmd packet

2026-07-28T23:17:30Z

[Why] By changing how we populate vblank_nom, constraining vblank size, the vblank_end calculation for the fams command packet gets affected. We add up v_active with a new vblank_nom value for stream pstate's nom_vtotal, which describes the vtotal and nominal refresh rate, and that causes underflow. [How] Set nom_vtotal equal to the timing's v_total. Reviewed-by: Dillon Varone Signed-off-by: Nicholas Carbones Signed-off-by: Fangzhi Zuo Tested-by: Dan Wheeler Signed-off-by: Alex Deucher

drm/amd/display: Add DWB validation support to DML2.1 wrapper

2026-07-28T22:33:24Z

[WHY&HOW] DML2.1 wrapper was lacking translation for DWB. This change adds the necessary translation for DWB validation and programming support. Reviewed-by: Austin Zheng Signed-off-by: Dillon Varone Signed-off-by: Wayne Lin Tested-by: Dan Wheeler Signed-off-by: Alex Deucher