linux-rng/drivers/gpu/drm/xe/xe_sysctrl_mailbox.h, branch masterDevelopment tree for the kernel CSPRNGhttps://git.zx2c4.com/linux-rng/atom/drivers/gpu/drm/xe/xe_sysctrl_mailbox.h?h=master2026-08-27T16:00:17Zdrm/xe/sysctrl: Read mailbox phase bit from hardware2026-08-27T16:00:17ZAnoop Vijayanoop.c.vijay@intel.com2026-08-25T17:28:28Zurn:sha1:a62212b35a214c2ff3bd1c785a440d7ad8205ec9
The mailbox PHASE bit in SYSCTRL_MB_CTRL is toggled per-message and
was tracked in software as sc->phase_bit, reset to 0 on error paths.
If the cached value ever drifts from what the hardware last saw, all
following messages carry the wrong phase and get silently misread by
firmware.
Drop the cache and read PHASE directly from SYSCTRL_MB_CTRL before
each frame instead, removing xe_sysctrl_mailbox_init() and its call
sites along with it.
Fixes: 1f95f618182b ("drm/xe/xe_sysctrl: Add System Controller mailbox communication support")
Signed-off-by: Anoop Vijay <anoop.c.vijay@intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patch.msgid.link/20260825172827.3801591-2-anoop.c.vijay@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
(cherry picked from commit 04984fcdbf6876c940c01026a7404c1e9cc91ba7)
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
drm/xe/xe_ras: Add support to get error counter value2026-06-22T04:57:30ZRiana Tauroriana.tauro@intel.com2026-06-18T06:06:36Zurn:sha1:fe48a86980798ffc78c8713ec964877c8594610d
Add request/response structures and helper functions to query system
controller to get error counter value.
Reviewed-by: Raag Jadav <raag.jadav@intel.com>
Link: https://patch.msgid.link/20260618060633.2790109-10-riana.tauro@intel.com
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
drm/xe/xe_sysctrl: Drop redundant endian conversions in mailbox header macros2026-04-09T19:37:06ZAnoop Vijayanoop.c.vijay@intel.com2026-04-08T11:07:59Zurn:sha1:45334d5c364498629b314391c7d1eac0b64c882f
Remove unnecessary le32_to_cpu() conversions from XE_SYSCTRL_APP_HDR_*
macros.
Fixes: 37ace5254a2b ("drm/xe/xe_sysctrl: Add ABI and mailbox interface headers")
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202604010228.Z20DhK4g-lkp@intel.com/
Signed-off-by: Anoop Vijay <anoop.c.vijay@intel.com>
Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Reviewed-by: Riana Tauro <riana.tauro@intel.com>
Link: https://patch.msgid.link/20260408110759.1407342-2-anoop.c.vijay@intel.com
drm/xe/xe_sysctrl: Add ABI and mailbox interface headers2026-03-30T17:06:55ZAnoop Vijayanoop.c.vijay@intel.com2026-03-27T13:18:40Zurn:sha1:37ace5254a2b1520753762527365ecad7fad797a
Add ABI definitions, mailbox API, and command data structures required
for System Controller communication.
No functional changes. This patch introduces definitions for mailbox
communication.
Signed-off-by: Anoop Vijay <anoop.c.vijay@intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Link: https://patch.msgid.link/20260327131837.2192929-12-anoop.c.vijay@intel.com