<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-rng/drivers/powercap, branch master</title>
<subtitle>Development tree for the kernel CSPRNG</subtitle>
<id>https://git.zx2c4.com/linux-rng/atom/drivers/powercap?h=master</id>
<link rel='self' href='https://git.zx2c4.com/linux-rng/atom/drivers/powercap?h=master'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-rng/'/>
<updated>2025-11-21T20:47:08Z</updated>
<entry>
<title>powercap: intel_rapl: Enable MSR-based RAPL PMU support</title>
<updated>2025-11-21T20:47:08Z</updated>
<author>
<name>Kuppuswamy Sathyanarayanan</name>
<email>sathyanarayanan.kuppuswamy@linux.intel.com</email>
</author>
<published>2025-11-21T00:05:39Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-rng/commit/?id=748d6ba43afde7e9ac27443233203995cc15d235'/>
<id>urn:sha1:748d6ba43afde7e9ac27443233203995cc15d235</id>
<content type='text'>
Currently, RAPL PMU support requires adding CPU model entries to
arch/x86/events/rapl.c for each new generation. However, RAPL MSRs are
not architectural and require platform-specific customization, making
arch/x86 an inappropriate location for this functionality.

The powercap subsystem already handles RAPL functionality and is the
natural place to consolidate all RAPL features. The powercap RAPL
driver already includes PMU support for TPMI-based RAPL interfaces,
making it straightforward to extend this support to MSR-based RAPL
interfaces as well.

This consolidation eliminates the need to maintain RAPL support in
multiple subsystems and provides a unified approach for both TPMI and
MSR-based RAPL implementations.

The MSR-based PMU support includes the following updates:

 1. Register MSR-based PMU support for the supported platforms
    and unregister it when no online CPUs remain in the package.

 2. Remove existing checks that restrict RAPL PMU support to TPMI-based
    interfaces and extend the logic to allow MSR-based RAPL interfaces.

 3. Define a CPU model list to determine which processors should
    register RAPL PMU interface through the powercap driver for
    MSR-based RAPL, excluding those that support TPMI interface.
    This list prevents conflicts with existing arch/x86 PMU code
    that already registers RAPL PMU for some processors. Add
    Panther Lake &amp; Wildcat Lake to the CPU models list.

Signed-off-by: Kuppuswamy Sathyanarayanan &lt;sathyanarayanan.kuppuswamy@linux.intel.com&gt;
Reviewed-by: Srinivas Pandruvada &lt;srinivas.pandruvada@linux.intel.com&gt;
[ rjw: Changelog edits ]
Link: https://patch.msgid.link/20251121000539.386069-3-sathyanarayanan.kuppuswamy@linux.intel.com
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
</entry>
<entry>
<title>powercap: intel_rapl: Prepare read_raw() interface for atomic-context callers</title>
<updated>2025-11-21T20:47:08Z</updated>
<author>
<name>Kuppuswamy Sathyanarayanan</name>
<email>sathyanarayanan.kuppuswamy@linux.intel.com</email>
</author>
<published>2025-11-21T00:05:38Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-rng/commit/?id=1d6c915819f5b805c35487b6ce5923e31a28266b'/>
<id>urn:sha1:1d6c915819f5b805c35487b6ce5923e31a28266b</id>
<content type='text'>
The current read_raw() implementation of the TPMI, MMIO and MSR
interfaces does not distinguish between atomic and non-atomic callers.

rapl_msr_read_raw() uses rdmsrq_safe_on_cpu(), which can sleep and
issue cross CPU calls. When MSR-based RAPL PMU support is enabled, PMU
event handlers can invoke this function from atomic context where
sleeping or rescheduling is not allowed. In atomic context, the caller
is already executing on the target CPU, so a direct rdmsrq() is
sufficient.

To support such usage, introduce an atomic flag to the read_raw()
interface to allow callers pass the context information. Modify the
common RAPL code to propagate this flag, and set the flag to reflect
the calling contexts.

Utilize the atomic flag in rapl_msr_read_raw() to perform direct MSR
read with rdmsrq() when running in atomic context, and a sanity check
to ensure target CPU matches the current CPU for such use cases.

The TPMI and MMIO implementations do not require special atomic
handling, so the flag is ignored in those paths.

This is a preparatory patch for adding MSR-based RAPL PMU support.

Signed-off-by: Kuppuswamy Sathyanarayanan &lt;sathyanarayanan.kuppuswamy@linux.intel.com&gt;
Reviewed-by: Srinivas Pandruvada &lt;srinivas.pandruvada@linux.intel.com&gt;
[ rjw: Subject tweak ]
Link: https://patch.msgid.link/20251121000539.386069-2-sathyanarayanan.kuppuswamy@linux.intel.com
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
</entry>
<entry>
<title>powercap: intel_rapl: Add support for Nova Lake processors</title>
<updated>2025-11-18T14:39:29Z</updated>
<author>
<name>Kaushlendra Kumar</name>
<email>kaushlendra.kumar@intel.com</email>
</author>
<published>2025-10-28T10:18:14Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-rng/commit/?id=58075aec92a8141fd7f42e1c36d1bc54552c015e'/>
<id>urn:sha1:58075aec92a8141fd7f42e1c36d1bc54552c015e</id>
<content type='text'>
Add RAPL support for Intel Nova Lake and Nova Lake L processors using
the core defaults configuration.

Signed-off-by: Kaushlendra Kumar &lt;kaushlendra.kumar@intel.com&gt;
[ rjw: Subject and changelog edits, rebase ]
Link: https://patch.msgid.link/20251028101814.3482508-1-kaushlendra.kumar@intel.com
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
</entry>
<entry>
<title>powercap: intel_rapl: Add support for Wildcat Lake platform</title>
<updated>2025-10-30T19:15:02Z</updated>
<author>
<name>Srinivas Pandruvada</name>
<email>srinivas.pandruvada@linux.intel.com</email>
</author>
<published>2025-10-23T17:45:32Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-rng/commit/?id=39f421f2e301f995c17c35b783e2863155b3f647'/>
<id>urn:sha1:39f421f2e301f995c17c35b783e2863155b3f647</id>
<content type='text'>
Add Wildcat Lake to the list of supported processors for RAPL.

Signed-off-by: Srinivas Pandruvada &lt;srinivas.pandruvada@linux.intel.com&gt;
Link: https://patch.msgid.link/20251023174532.1882008-1-srinivas.pandruvada@linux.intel.com
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
</entry>
<entry>
<title>powercap: idle_inject: use us_to_ktime() where appropriate</title>
<updated>2025-08-21T19:57:54Z</updated>
<author>
<name>Xichao Zhao</name>
<email>zhao.xichao@vivo.com</email>
</author>
<published>2025-08-13T07:54:33Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-rng/commit/?id=03cf825911c95f39d77d2a60b35fe5b4a33115b1'/>
<id>urn:sha1:03cf825911c95f39d77d2a60b35fe5b4a33115b1</id>
<content type='text'>
Convert values in microseconds to ktime using us_to_ktime() instead of
multiplying them by NSEC_PER_USEC and using ns_to_ktime() for the
conversion.

Signed-off-by: Xichao Zhao &lt;zhao.xichao@vivo.com&gt;
Link: https://patch.msgid.link/20250813075433.464786-1-zhao.xichao@vivo.com
[ rjw: Subject and changelog edits ]
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'platform-drivers-x86-v6.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86</title>
<updated>2025-07-29T06:21:28Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2025-07-29T06:21:28Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-rng/commit/?id=9669b2499ea377764f8320dd562dd6cd4ea80a5d'/>
<id>urn:sha1:9669b2499ea377764f8320dd562dd6cd4ea80a5d</id>
<content type='text'>
Pull x86 platform drivers from Ilpo Järvinen:

 - alienware: Add more precise labels to fans

 - amd/hsmp: Improve misleading probe errors (make the legacy driver
   aware when HSMP is supported through the ACPI driver)

 - amd/pmc: Add Lenovo Yoga 6 13ALCL6 to pmc quirk list

 - drm/xe: Correct (D)VSEC information to support PMT crashlog feature

 - fujitsu: Clamp charge threshold instead of returning an error

 - ideapad: Expore change types

 - intel/pmt:
     - Add PMT Discovery driver
     - Add API to retrieve telemetry regions by feature
     - Fix crashlog NULL access
     - Support Battlemage GPU (BMG) crashlog

 - intel/vsec:
     - Add Discovery feature
     - Add feature dependency support using device links

 - lenovo:
     - Move lenovo drivers under drivers/platform/x86/lenovo/
     - Add WMI drivers for Lenovo Gaming series
     - Improve DMI handling

 - oxpec:
     - Add support for OneXPlayer X1 Mini Pro (Strix Point variant)
     - Fix EC registers for G1 AMD

 - samsung-laptop: Expose change types

 - wmi: Fix WMI device naming issue (same GUID corner cases)

 - x86-android-tables: Add ovc-capacity-table to generic battery nodes

 - Miscellaneous cleanups / refactoring / improvements

* tag 'platform-drivers-x86-v6.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86: (63 commits)
  platform/x86: oxpec: Add support for OneXPlayer X1 Mini Pro (Strix Point)
  platform/x86: oxpec: Fix turbo register for G1 AMD
  platform/x86/intel/pmt: support BMG crashlog
  platform/x86/intel/pmt: use a version struct
  platform/x86/intel/pmt: refactor base parameter
  platform/x86/intel/pmt: add register access helpers
  platform/x86/intel/pmt: decouple sysfs and namespace
  platform/x86/intel/pmt: correct types
  platform/x86/intel/pmt: re-order trigger logic
  platform/x86/intel/pmt: use guard(mutex)
  platform/x86/intel/pmt: mutex clean up
  platform/x86/intel/pmt: white space cleanup
  drm/xe: Correct BMG VSEC header sizing
  drm/xe: Correct the rev value for the DVSEC entries
  platform/x86/intel/pmt: fix a crashlog NULL pointer access
  platform/x86: samsung-laptop: Expose charge_types
  platform/x86/amd: pmc: Add Lenovo Yoga 6 13ALC6 to pmc quirk list
  platform/x86: dell-uart-backlight: Use blacklight power constant
  platform/x86/intel/pmt: fix build dependency for kunit test
  platform/x86: lenovo: gamezone needs "other mode"
  ...
</content>
</entry>
<entry>
<title>powercap: dtpm_cpu: Fix NULL pointer dereference in get_pd_power_uw()</title>
<updated>2025-07-03T15:19:37Z</updated>
<author>
<name>Sivan Zohar-Kotzer</name>
<email>sivany32@gmail.com</email>
</author>
<published>2025-07-01T22:13:55Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-rng/commit/?id=46dc57406887dd02565cb264224194a6776d882b'/>
<id>urn:sha1:46dc57406887dd02565cb264224194a6776d882b</id>
<content type='text'>
The get_pd_power_uw() function can crash with a NULL pointer dereference
when em_cpu_get() returns NULL. This occurs when a CPU becomes impossible
during runtime, causing get_cpu_device() to return NULL, which propagates
through em_cpu_get() and leads to a crash when em_span_cpus() dereferences
the NULL pointer.

Add a NULL check after em_cpu_get() and return 0 if unavailable,
matching the existing fallback behavior in __dtpm_cpu_setup().

Fixes: eb82bace8931 ("powercap/drivers/dtpm: Scale the power with the load")
Signed-off-by: Sivan Zohar-Kotzer &lt;sivany32@gmail.com&gt;
Link: https://patch.msgid.link/20250701221355.96916-1-sivany32@gmail.com
[ rjw: Drop an excess empty code line ]
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
</entry>
<entry>
<title>platform/x86/intel/tpmi: Relocate platform info to intel_vsec.h</title>
<updated>2025-07-03T08:09:35Z</updated>
<author>
<name>David E. Box</name>
<email>david.e.box@linux.intel.com</email>
</author>
<published>2025-07-03T02:28:25Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-rng/commit/?id=934954df0f44de5e10afc1af84c06f78149f15fe'/>
<id>urn:sha1:934954df0f44de5e10afc1af84c06f78149f15fe</id>
<content type='text'>
The TPMI platform information provides a mapping of OOBMSM PCI devices to
logical CPUs. Since this mapping is consistent across all OOBMSM features
(e.g., TPMI, PMT, SDSi), it can be leveraged by multiple drivers. To
facilitate reuse, relocate the struct intel_tpmi_plat_info to intel_vsec.h,
renaming it to struct oobmsm_plat_info, making it accessible to other
features. While modifying headers, place them in alphabetical order.

Signed-off-by: David E. Box &lt;david.e.box@linux.intel.com&gt;
Reviewed-by: Ilpo Järvinen &lt;ilpo.jarvinen@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20250703022832.1302928-11-david.e.box@linux.intel.com
Signed-off-by: Ilpo Järvinen &lt;ilpo.jarvinen@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>powercap: intel_rapl: Add support for Bartlett Lake platform</title>
<updated>2025-06-30T18:34:57Z</updated>
<author>
<name>Qiao Wei</name>
<email>wei.qiao@intel.com</email>
</author>
<published>2025-06-12T07:06:13Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-rng/commit/?id=82a7021f5074ff69478b5104739b91ff2ae3bb4a'/>
<id>urn:sha1:82a7021f5074ff69478b5104739b91ff2ae3bb4a</id>
<content type='text'>
Add Bartlett Lake to the list of supported processors in the RAPL
common driver.

Acked-by: Zhang Rui &lt;rui.zhang@intel.com&gt;
Signed-off-by: Qiao Wei &lt;wei.qiao@intel.com&gt;
[ rjw: Changelog edits ]
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
</entry>
<entry>
<title>powercap: intel_rapl_msr: Add PL4 support for Panther Lake</title>
<updated>2025-06-30T18:34:57Z</updated>
<author>
<name>Zhang Rui</name>
<email>rui.zhang@intel.com</email>
</author>
<published>2025-06-25T02:05:22Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-rng/commit/?id=afc6a5b12b62c7743fb96fe27864604d7b33a5d2'/>
<id>urn:sha1:afc6a5b12b62c7743fb96fe27864604d7b33a5d2</id>
<content type='text'>
Add Panther Lake to the list of processors where PL4 is supported.

Signed-off-by: Zhang Rui &lt;rui.zhang@intel.com&gt;
Link: https://patch.msgid.link/20250625020522.253548-1-rui.zhang@intel.com
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
</entry>
</feed>
