linux-rng/include/linux/pcs, branch master

net: pcs: xpcs: add Rockchip RK3568 platform glue driver

2026-10-21T23:41:37Z

The RK3568 SoC integrates a Synopsys DesignWare XPCS that is accessed via APB3 memory-mapped registers. This driver provides the glue logic to make the XPCS accessible to the generic pcs-xpcs core. The XPCS block contains four MII ports (0..3). On RK3568 the MII port used by SGMII follows the MAC it is routed to: GMAC0 maps to port 0 and GMAC1 maps to port 1. The glue driver receives the port index from the MAC side and passes it to xpcs_create_mdiodev(). The hardware maps these ports to different MMDs: - port 0: MMD 7 (ROCKCHIP_MMD_MII) - port 1: MMD 2 (ROCKCHIP_MMD_MII1) - port 2: MMD 3 (ROCKCHIP_MMD_MII2) - port 3: MMD 4 (ROCKCHIP_MMD_MII3) This driver creates a virtual MDIO bus that translates MDIO operations to APB3 register accesses, with proper address remapping for each port. The generic xpcs driver then creates a phylink_pcs instance on top of this bus, allowing the MAC to use the PCS via the standard phylink API. The generic XPCS platform glue (pcs-xpcs-plat.o) is split out of the pcs_xpcs composite object into its own module, gated behind the new PCS_XPCS_PLATFORM symbol. There is no in-tree user of the generic snps,dw-xpcs glue that would need it selected by default, so the symbol has no default and platforms that need it select it explicitly. PCS_XPCS_ROCKCHIP selects GENERIC_PHY and PM_GENERIC_DOMAINS. ARCH_ROCKCHIP already selects PM, so the dependency of PM_GENERIC_DOMAINS on PM is satisfied on the target platform. The EEE multiplier is derived at runtime from the EEE clock rate instead of being hardcoded, because the clock is muxed between gpll200 (200 MHz) and cpll125 (125 MHz) and can be changed by the board or firmware. A 64-bit intermediate avoids overflow on 32-bit builds, and the result is clamped to the 4-bit DW_VR_MII_EEE_MULT_FACT_100NS field. Power management ================ The XPCS, its SerDes PHY and the SATA/PCIe controllers share the PD_PIPE power domain on RK3568. genpd powers the domain down during system suspend once every consumer is suspended, which also kills the SerDes and the XPCS. Boards that rely on MAC WoL need the PCS and SerDes alive to receive magic packets, so PD_PIPE must stay powered across system suspend. Keep it on by marking the XPCS as part of the wakeup path via device_set_wakeup_path(). genpd then leaves the domain powered, because the Rockchip power domain driver sets GENPD_FLAG_ACTIVE_WAKEUP on PD_PIPE, which makes genpd check the wakeup path of its consumers during system suspend. This is unconditional because the XPCS core currently has no platform callback through which a consumer could convey the MAC WoL state, and the state itself is dynamic: WoL is toggled at runtime via ethtool, so a static DT property cannot express it either. The affected hardware is limited to RK3568 boards using SGMII, which are always-on routers where system suspend is not a realistic use case; the extra power draw is therefore acceptable. Runtime PM is unaffected: the runtime callbacks only gate the CSR clock, and dev_pm_genpd_rpm_always_on() already keeps PD_PIPE on at runtime. Link: https://dl.radxa.com/rock3/docs/hw/datasheet/Rockchip%20RK3568%20TRM%20Part1%20V1.1-20210301.pdf (Page 59, CRU_CLKSEL_CON29) Link: https://dl.radxa.com/rock3/docs/hw/datasheet/Rockchip%20RK3568%20TRM%20Part2%20V1.1-20210301.pdf (Page 2078) Signed-off-by: Coia Prant Link: https://patch.msgid.link/20261017054406.1828061-4-coiaprant@gmail.com Signed-off-by: Jakub Kicinski

net: pcs: pcs-mtk-lynxi: pass SGMIISYS OF node to PCS

2026-01-22T03:46:58Z

The Mediatek LynxI PCS is used from the MT7530 DSA driver (where it does not have an OF presence) and from mtk_eth_soc, where it does (Documentation/devicetree/bindings/net/pcs/mediatek,sgmiisys.yaml informs of a combined clock provider + SGMII PCS "SGMIISYS" syscon block). Currently, mtk_eth_soc parses the SGMIISYS OF node for the "mediatek,pnswap" property and sets a bit in the "flags" argument of mtk_pcs_lynxi_create() if set. I'd like to deprecate "mediatek,pnswap" in favour of a property which takes the current phy-mode into consideration. But this is only known at mtk_pcs_lynxi_config() time, and not known at mtk_pcs_lynxi_create(), when the SGMIISYS OF node is parsed. To achieve that, we must pass the OF node of the PCS, if it exists, to mtk_pcs_lynxi_create(), and let the PCS take a reference on it and handle property parsing whenever it wants. Use the fwnode API which is more general than OF (in case we ever need to describe the PCS using some other format). This API should be NULL tolerant, so add no particular tests for the mt7530 case. Signed-off-by: Vladimir Oltean Link: https://patch.msgid.link/20260119091220.1493761-5-vladimir.oltean@nxp.com Signed-off-by: Jakub Kicinski

net: pcs: xpcs: Add support for FBNIC 25G, 50G, 100G PMD

2025-11-27T09:41:31Z

The fbnic driver is planning to make use of the XPCS driver to enable support for PCS and better integration with phylink. To do this though we will need to enable several workarounds since the PMD interface for fbnic is likely to be unique since it is a mix of two different vendor products with a unique wrapper around the IP. I have generated a PHY identifier based on IEEE 802.3-2022 22.2.4.3.1 using an OUI belonging to Meta Platforms and used with our NICs. Using this we will provide it as the PMD ID via the SW based MDIO interface so that the fbnic device can be identified and necessary workarounds enabled in the XPCS driver. As an initial workaround this change adds an exception so that soft_reset is not set when the driver is initially bound to the PCS. In addition I have added logic to integrate the PMD Rx signal detect state into the link state for the PCS. With this we can avoid the link coming up too soon on the FBNIC PMD and as a result of it being in the training state so we can avoid link flaps. Signed-off-by: Alexander Duyck Link: https://patch.msgid.link/176374321695.959489.6648161125012056619.stgit@ahduyck-xeon-server.home.arpa Signed-off-by: Paolo Abeni

net: pcs: xpcs: Fix PMA identifier handling in XPCS

2025-11-27T09:41:31Z

The XPCS driver was mangling the PMA identifier as the original code appears to have been focused on just capturing the OUI. Rather than store a mangled ID it is better to work with the actual PMA ID and instead just mask out the values that don't apply rather than shifting them and reordering them as you still don't get the original OUI for the NIC without having to bitswap the values as per the definition of the layout in IEEE 802.3-2022 22.2.4.3.1. By laying it out as it was in the hardware it is also less likely for us to have an unintentional collision as the enum values will occupy the revision number area while the OUI occupies the upper 22 bits. Signed-off-by: Alexander Duyck Link: https://patch.msgid.link/176374320920.959489.17267159479370601070.stgit@ahduyck-xeon-server.home.arpa Signed-off-by: Paolo Abeni

net: xpcs: remove xpcs_config_eee() from global scope

2025-02-14T21:42:52Z

Make xpcs_config_eee() private to the XPCS driver, called only from the phylink pcs_disable_eee() and pcs_enable_eee() methods. Signed-off-by: Russell King (Oracle) Link: https://patch.msgid.link/E1thRQT-003w7O-Ec@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski

net: xpcs: add function to configure EEE clock multiplying factor

2025-02-14T21:42:51Z

Add a function to separate out the EEE clock multiplying factor. This will be called by the stmmac driver to configure this value. It would have been better had the driver used the CLK API to retrieve this clock, get its rate and calculate the appropriate multiplier, but that door has closed. Signed-off-by: Russell King (Oracle) Link: https://patch.msgid.link/E1thRQ8-003w70-VT@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski

net: pcs: xpcs: make xpcs_get_interfaces() static

2025-01-07T00:26:13Z

xpcs_get_interfaces() should no longer be used outside of the XPCS code, so make it static. Signed-off-by: Russell King (Oracle) Reviewed-by: Andrew Lunn Link: https://patch.msgid.link/E1tTffk-007Roi-JM@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski

net: pcs: xpcs: move definition of struct dw_xpcs to private header

2024-10-09T11:13:11Z

There should be no reason for anything outside the XPCS code to know the contents of struct dw_xpcs - this is a private structure to XPCS. Move the definition to the private pcs-xpcs.h header, leaving a declaration in the global pcs/pcs-xpcs.h Signed-off-by: Russell King (Oracle) Signed-off-by: David S. Miller

net: pcs: xpcs: provide a helper to get the phylink pcs given xpcs

2024-10-09T11:13:11Z

Provide a helper to provide the pointer to the phylink_pcs struct given a valid xpcs pointer. This will be necessary when we make struct dw_xpcs private to pcs-xpcs.c Signed-off-by: Russell King (Oracle) Signed-off-by: David S. Miller

net: pcs: xpcs: make xpcs_do_config() and xpcs_link_up() internal

2024-10-03T00:32:01Z

As nothing outside pcs-xpcs.c calls neither xpcs_do_config() nor xpcs_link_up(), remove their exports and prototypes. Reviewed-by: Vladimir Oltean Signed-off-by: Russell King (Oracle) Link: https://patch.msgid.link/E1svfMv-005ZIv-2M@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski