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| author |   Macpaul Lin <macpaul.lin@mediatek.com> | 2024-10-02 13:16:19 +0800 |
|---|---|---|
| committer |   AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> | 2024-10-02 11:14:28 +0200 |
| commit | 0fc557b539a1e11bdc5053a308b12d84ea754786 (patch) | |
| tree | 0ab5a12aa754129e2370709813df997f7b6dc9c8 /arch/arm64/boot/dts/mediatek/mt8195.dtsi | |
| parent | arm64: dts: mediatek: mt8395-genio-1200-evk: Fix dtbs_check error for phy (diff) | |
| download | linux-rng-0fc557b539a1e11bdc5053a308b12d84ea754786.tar.xz linux-rng-0fc557b539a1e11bdc5053a308b12d84ea754786.zip | |
arm64: dts: mt8195: Fix dtbs_check error for mutex node
The mutex node in mt8195.dtsi was triggering a dtbs_check error:
mutex@1c101000: 'clock-names', 'reg-names' do not match any of the
regexes: 'pinctrl-[0-9]+'
This seems no need by inspecting the DT schemas and other reference boards,
so drop 'clock-names' and 'reg-names' in mt8195.dtsi.
Fixes: 92d2c23dc269 ("arm64: dts: mt8195: add display node for vdosys1")
Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20241002051620.2050-4-macpaul.lin@mediatek.com
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Diffstat (limited to '')
| -rw-r--r-- | arch/arm64/boot/dts/mediatek/mt8195.dtsi | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi index e89ba384c4aa..3a2ba8aac66b 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -3331,11 +3331,9 @@ mutex1: mutex@1c101000 { compatible = "mediatek,mt8195-disp-mutex"; reg = <0 0x1c101000 0 0x1000>; - reg-names = "vdo1_mutex"; interrupts = <GIC_SPI 494 IRQ_TYPE_LEVEL_HIGH 0>; power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>; clocks = <&vdosys1 CLK_VDO1_DISP_MUTEX>; - clock-names = "vdo1_mutex"; mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x1000 0x1000>; mediatek,gce-events = <CMDQ_EVENT_VDO1_STREAM_DONE_ENG_0>; }; |