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| author |   Ulrich Hecht <uli+renesas@fpond.eu> | 2021-01-12 17:59:09 +0100 |
|---|---|---|
| committer |   Geert Uytterhoeven <geert+renesas@glider.be> | 2021-01-14 12:06:15 +0100 |
| commit | 9f2af9e5613636b4717352b24ebf1041bcfc5d01 (patch) | |
| tree | 06edad287b85b896817d5a4d78c2cfe8f132a32d /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | pinctrl: renesas: Add I/O voltage level flag (diff) | |
| download | linux-rng-9f2af9e5613636b4717352b24ebf1041bcfc5d01.tar.xz linux-rng-9f2af9e5613636b4717352b24ebf1041bcfc5d01.zip | |
pinctrl: renesas: Add PORT_GP_CFG_{2,31} macros
Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210112165912.30876-4-uli+renesas@fpond.eu
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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