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2019-06-27arm64: dts: rockchip: Fix USB3 Type-C on rk3399-sapphireVicente Bergas1-3/+2
Before this patch, the Type-C port on the Sapphire board is dead. If setting the 'regulator-always-on' property to 'vcc5v0_typec0' then the port works for about 4 seconds at start-up. This is a sample trace with a memory stick plugged in: 1.- The memory stick LED lights on and kernel reports: [ 4.782999] scsi 0:0:0:0: Direct-Access USB DISK PMAP PQ: 0 ANSI: 4 [ 5.904580] sd 0:0:0:0: [sdb] 3913344 512-byte logical blocks: (2.00 GB/1.87 GiB) [ 5.906860] sd 0:0:0:0: [sdb] Write Protect is off [ 5.908973] sd 0:0:0:0: [sdb] Mode Sense: 23 00 00 00 [ 5.909122] sd 0:0:0:0: [sdb] No Caching mode page found [ 5.911214] sd 0:0:0:0: [sdb] Assuming drive cache: write through [ 5.951585] sdb: sdb1 [ 5.954816] sd 0:0:0:0: [sdb] Attached SCSI removable disk 2.- 4 seconds later the memory stick LED lights off and kernel reports: [ 9.082822] phy phy-ff770000.syscon:usb2-phy@e450.2: charger = USB_DCP_CHARGER 3.- After a minute the kernel reports: [ 71.666761] usb 5-1: USB disconnect, device number 2 It has been checked that, although the LED is off, VBUS is present. If, instead, the dr_mode is changed to host and the phy-supply changed accordingly, then it works. It has only been tested in host mode. Signed-off-by: Vicente Bergas <vicencb@gmail.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-06-27arm64: dts: rockchip: Update DWC3 modules on RK3399 SoCsEnric Balletbo i Serra1-0/+6
As per binding documentation [1], the DWC3 core should have the "ref", "bus_early" and "suspend" clocks. As explained in the binding, those clocks are required for new platforms but not for existing platforms before commit fe8abf332b8f ("usb: dwc3: support clocks and resets for DWC3 core"). However, as those clocks are really treated as required, this ends with having some annoying messages when the "rockchip,rk3399-dwc3" is used: [ 1.724107] dwc3 fe800000.dwc3: Failed to get clk 'ref': -2 [ 1.731893] dwc3 fe900000.dwc3: Failed to get clk 'ref': -2 [ 2.495937] dwc3 fe800000.dwc3: Failed to get clk 'ref': -2 [ 2.647239] dwc3 fe900000.dwc3: Failed to get clk 'ref': -2 In order to remove those annoying messages, update the DWC3 hardware module node and add all the required clocks. With this change, both, the glue node and the DWC3 core node, have the clocks defined, but that's not really a problem and there isn't a side effect on do this. So, we can get rid of the annoying get clk error messages. [1] Documentation/devicetree/bindings/usb/dwc3.txt Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-06-27arm64: dts: rockchip: enable rk3328 watchdog clockLeonidas P. Papadakos1-0/+1
Add the missing clock property for the watchdog on rk3328. Signed-off-by: Leonidas P. Papadakos <papadakospan@gmail.com> [set wdt node to always enabled, as it is not board-specific] Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-06-27ARM: dts: rockchip: add display nodes for rk322xJustin Swartz1-0/+83
Add display_subsystem, hdmi_phy, vop, and hdmi device nodes plus a few hdmi pinctrl entries to allow for HDMI output. Signed-off-by: Justin Swartz <justin.swartz@risingedge.co.za> [added assigned-clock settings for hdmiphy output] Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-06-27ARM: dts: rockchip: fix vop iommu-cells on rk322xJustin Swartz1-1/+1
iommu-cells obviously needs to start with a "#". Signed-off-by: Justin Swartz <justin.swartz@risingedge.co.za> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-06-27clk: rockchip: add clock id for hdmi_phy special clock on rk3228Heiko Stuebner1-0/+1
Add the needed clock id to enable clock settings from devicetree. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Justin Swartz <justin.swartz@risingedge.co.za>
2019-06-27clk: rockchip: add clock id for watchdog pclk on rk3328Heiko Stuebner1-0/+1
Needed to export that added clock. Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-06-27arm64: dts: rockchip: Add support for Hugsun X99 TV BoxVivek Unune4-0/+741
Add devicetree support for Hugsun X99 TV Box based on RK3399 SoC Tested with LibreElec running kernel v5.1.2. Following peripherals tested and work: Peripheral works: - UART2 debug - eMMC - USB 3.0 port - USB 2.0 port - sdio, sd-card - HDMI - Ethernet - WiFi/BT Not tested: - Type-C port - OPTICAL - IR Signed-off-by: Vivek Unune <npcomplete13@gmail.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-06-27arm64: dts: rockchip: Define values for the IPA governor for rock960Daniel Lezcano1-0/+39
Currently the default thermal values for the rk3399-rock960 board is inherited from the generic definition in rk3399.dtsi. In order to ensure the rock960 has more room for througput before being capped by the thermal framework and is correctly supported by the IPA governor, let's define the power values and the right trip points for better performances: - sustainable power is tested to be 1550mW - increase the first mitigation point to 75°C in order to get better performances - the first trip point is 65°C in order to let the IPA to collect enough data for the PID regulation when it reaches 75°C - restrict the cooling device to the big CPUs as the little CPUs contribution to the heating effect can be considered negligible The intelligent power allocator PID coefficient to be set in sysfs are: k_d: 0 k_po: 79 k_i: 10 k_pu: 50 Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-06-27arm64: dts: rockchip: Fix multiple thermal zones conflict in rk3399.dtsiDaniel Lezcano1-9/+0
Currently the common thermal zones definitions for the rk3399 assumes multiple thermal zones are supported by the governors. This is not the case and each thermal zone has its own governor instance acting individually without collaboration with other governors. As the cooling device for the CPU and the GPU thermal zones is the same, each governors take different decisions for the same cooling device leading to conflicting instructions and an erratic behavior. As the cooling-maps is about to become an optional property, let's remove the cpu cooling device map from the GPU thermal zone. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>