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2019-06-27ARM: dts: rockchip: add display nodes for rk322xJustin Swartz1-0/+83
Add display_subsystem, hdmi_phy, vop, and hdmi device nodes plus a few hdmi pinctrl entries to allow for HDMI output. Signed-off-by: Justin Swartz <justin.swartz@risingedge.co.za> [added assigned-clock settings for hdmiphy output] Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-06-27ARM: dts: rockchip: fix vop iommu-cells on rk322xJustin Swartz1-1/+1
iommu-cells obviously needs to start with a "#". Signed-off-by: Justin Swartz <justin.swartz@risingedge.co.za> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-06-27clk: rockchip: add clock id for hdmi_phy special clock on rk3228Heiko Stuebner1-0/+1
Add the needed clock id to enable clock settings from devicetree. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Justin Swartz <justin.swartz@risingedge.co.za>
2019-06-27clk: rockchip: add clock id for watchdog pclk on rk3328Heiko Stuebner1-0/+1
Needed to export that added clock. Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-06-27Revert "ARM: dts: rockchip: set PWM delay backlight settings for Minnie"Matthias Kaehlcke1-2/+0
This reverts commit 288ceb85b505c19abe1895df068dda5ed20cf482. The commit assumes that the minnie panel is a AUO B101EAN01.1 (LVDS interface), however it is a AUO B101EAN01.8 (eDP interface). The eDP panel doesn't need the 200 ms delay. Signed-off-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-06-26ARM: dts: rockchip: Configure BT_DEV_WAKE in on rk3288-veyronDouglas Anderson2-0/+22
This is the other half of the hacky solution from commit f497ab6b4bb8 ("ARM: dts: rockchip: Configure BT_HOST_WAKE as wake-up signal on veyron"). Specifically the LPM driver that the Broadcom Bluetooth expects to have (but is missing in mainline) has two halves of the equation: BT_HOST_WAKE and BT_DEV_WAKE. The BT_HOST_WAKE (which was handled in the previous commit) is the one that lets the Bluetooth wake the system up. The BT_DEV_WAKE (this patch) tells the Bluetooth that it's OK to go into a low power mode. That means we were burning a bit of extra power in S3 without this patch. Measurements are a bit noisy, but it appears to be a few mA worth of difference. NOTE: Though these pins don't do much on systems with Marvell Bluetooth, downstream kernels set it on all veyron boards so we'll do the same. Signed-off-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-06-25arm64: dts: qcom: sdm845-cheza: add initial cheza dtRob Clark5-0/+1979
This is essentialy a squash of a bunch of history of cheza dt updates from chromium kernel, some of which were themselves squashes of history from older chromium kernels. I don't claim any credit other than wanting to more easily boot upstream kernel on cheza to have an easier way to test upstream driver work ;-) I've added below in Cc tags all the original actual authors (apologies if I missed any). Cc: Douglas Anderson <dianders@chromium.org> Cc: Sibi Sankar <sibis@codeaurora.org> Cc: Evan Green <evgreen@chromium.org> Cc: Matthias Kaehlcke <mka@chromium.org> Cc: Abhinav Kumar <abhinavk@codeaurora.org> Cc: Brian Norris <briannorris@chromium.org> Cc: Venkat Gopalakrishnan <venkatg@codeaurora.org> Cc: Rajendra Nayak <rnayak@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Andy Gross <agross@kernel.org>
2019-06-25ARM: dts: msm8974-FP2: Add vibration motorLuca Weiss1-0/+6
Add a node describing the vibration motor on the Fairphone 2. Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Signed-off-by: Andy Gross <agross@kernel.org>
2019-06-25arm64: dts: qcom: qcs404: Add thermal zones for each sensorAmit Kucheria1-0/+252
qcs404 has 10 sensors connected to the single TSENS IP. Define a thermal zone for each of those sensors to expose the temperature of each zone. Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Andy Gross <agross@kernel.org>
2019-06-25arm64: dts: qcom: qcs404: Add tsens controllerAmit Kucheria1-0/+20
qcs404 has a single TSENS IP block with 10 sensors. The calibration data is stored in an eeprom (qfprom) that is accessed through the nvmem framework. We add the qfprom node to allow the tsens sensors to be calibrated correctly. Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Andy Gross <agross@kernel.org>
2019-06-26arm64: dts: uniphier: add reserved-memory for secure memoryMasahiro Yamada3-6/+33
The memory regions specified by /memreserve/ are passed to early_init_dt_reserve_memory_arch() with nomap=false, so it is not suitable for reserving memory for Trusted Firmware-A etc. Use the more robust /reserved-memory node with the no-map property to prevent the kernel from mapping it. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-06-26arm64: dts: uniphier: update to new Denali NAND bindingMasahiro Yamada5-0/+14
With commit d8e8fd0ebf8b ("mtd: rawnand: denali: decouple controller and NAND chips"), the Denali NAND controller driver migrated to the new controller/chip representation. Update DT for it. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-06-26ARM: dts: uniphier: update to new Denali NAND bindingMasahiro Yamada9-4/+30
With commit d8e8fd0ebf8b ("mtd: rawnand: denali: decouple controller and NAND chips"), the Denali NAND controller driver migrated to the new controller/chip representation. Update DT for it. In the new binding, the number of connected chips are described in DT instead of run-time probed. I added just one chip to the reference boards, where we do not know if the on-board NAND device is a single chip or multiple chips. If we added too many chips into DT, it would end up with the timeout error in nand_scan_ident(). I changed all the pinctrl properties to use the single CS. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-06-24ARM: dts: exynos: Add GPU/Mali 400 node to Exynos4Krzysztof Kozlowski10-0/+114
Add nodes for GPU (Mali 400) to Exynos4210 and Exynos4412. Describe the GPU as much as possible however still few elements are missing: 1. Exynos4210 bus clock is not described in hardware manual therefore the IP gate clock was provided, 2. Exynos4412: Not sure what to do with CLK_G3D clock responsible for gating entire IP block (it is now being disabled as unused), 3. Regulator supplies on Trats board. Limited testing on Odroid U3 (Exynos4412). Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-06-24ARM: dts: exynos: Add GPU/Mali 400 node to Exynos3250Krzysztof Kozlowski4-0/+48
Add nodes for GPU (Mali 400) to Exynos3250. This is still limited and not tested: 1. No dynamic voltage and frequency scaling, 2. Not sure what to do with CLK_G3D clock responsible for gating entire IP block (it is now being disabled as unused). Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-06-24dt-bindings: gpu: mali: Add Samsung compatibles for Midgard and UtgardKrzysztof Kozlowski2-0/+2
Add vendor compatibles for specific implementation of Mali Utgard (Exynos3250, Exynos4-family) and Midgard (Exynos5433, Exynos7). Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-06-24arm64: dts: exynos: Add GPU/Mali T760 node to Exynos7Krzysztof Kozlowski2-0/+16
Add nodes for GPU (Mali T760) to Exynos7. Current support for Exynos7 misses a lot, including proper clocks, power domains, frequency and voltage scaling and cooling. However this still can provide basic GPU description. Not tested on HW. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-06-24arm64: dts: exynos: Add GPU/Mali T760 node to Exynos5433Krzysztof Kozlowski2-0/+56
Add nodes for GPU (Mali T760) to Exynos5433. Missing element is the cooling device. Not tested on HW. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-06-24ARM: dts: exynos: Use proper regulator for eMMC memory on Arndale OctaKrzysztof Kozlowski1-1/+1
The eMMC memory is supplied by LDO18 (PVDD_EMMC_1V8) and buck10 (PVDD_EMMCF_2V8), not by LDO10. The LDO10 (PVDD_PRE_1V8) supplies instead VDDP_MMC pin of eMMC host interface and it is already marked as always on. This change only properly models the hardware and reflects in usage of regulators. There is no functional change because: 1. LDO18 cannot be turned off (e.g. by lack of consumers) because in off mode it is controlled by LDO18EN pin, which is pulled up by always-on regulator LDO2 (PVDD_APIO_1V8). 2. LDO10 is marked as always on so removing its consumer will not have effect. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-06-24ARM: dts: exynos: Add regulator suspend configuration to Odroid XU3/XU4/HC1 familyKrzysztof Kozlowski1-0/+96
Add the PMIC regulator suspend configuration to entire Odroid XU3/XU4/HC1 family of boards to reduce power usage during suspend. The configuration is based on vendor (Hardkernel) reference kernel with additional buck9 suspend configuration (for USB hub suspend and proper reset). Energy consumption measurements from Marek Szyprowski during suspend to RAM: - all at 5 V power supply, - before: next-20190620, - after: next-20190620 + this patch + suspend configuration for s2mps11 regulator driver, Board | before [mA] | after [mA] | Odroid HC1 | 120 | 7-10 | Odroid XU4, sdcard | 88 | 6-9 | Odroid XU4, eMMC | 100 | 6-9 | Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Tested-by: Anand Moon <linux.amoon@gmail.com>
2019-06-24ARM: dts: exynos: Add regulator suspend configuration to Arndale Octa boardKrzysztof Kozlowski1-0/+80
Add the PMIC regulator suspend configuration to Arndale Octa board to reduce power usage during suspend and keep necessary regulators on. The configuration is based on vendor (Insignal) reference kernel and the board datasheet. Comparing to vendor kernel, additionally turn off in suspend all regulators controlled by external pin (LDO3, LDO7, LDO18 and buck10). This is purely for hardware description because board does not support Suspend to RAM and the S2MPS11 driver does not support "regulator-on-in-suspend" property. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-06-24ARM: dts: exynos: Disable unused buck10 regulator on Odroid HC1 boardKrzysztof Kozlowski2-2/+6
The eMMC memory on Odroid XU3/XU4 boards is supplied by two regulators LDO18 and buck10 (and LDO13 for the host interface). However the Odroid HC1 board does not have eMMC connector so this regulator does not have to be always on. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-06-24ARM: dts: imx7ulp-evk: enable USBOTG1 supportPeter Chen1-0/+35
Enable USBOTG1 support for evk board, it is dual-role function port. Signed-off-by: Peter Chen <peter.chen@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-24ARM: dts: imx7ulp: add imx7ulp USBOTG1 supportPeter Chen1-0/+28
Add imx7ulp USBOTG1 support. Signed-off-by: Peter Chen <peter.chen@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-24ARM: dts: imx6qdl-kontron-samx6i: add Kontron SMARC SoM SupportMichael Grzeschik3-0/+442
The patch adds the following interfaces according the SMARC Spec 1.1 [1] and provided schematics: - SMARC SPI0/1 Note: Since Kontron still uses silicon revisions below 1.3 they have add a spi-nor to implement Workaround #1 of erratum ERR006282. - SMARC SDIO - SMARC LCD - SMARC HDMI - SMARC Management pins Note: Kontron don't route all of these pins to the i.MX6, some are routed to the SoM CPLD. - SMARC GPIO - SMARC CSI Camera Note: As specified in [1] the data lanes are shared to cover the csi and the parallel case. The case depends on the baseboard so muxing the data lanes is not part of this patch. - SMARC I2S - SMARC Watchdog Note: The watchdog output pin is routed to the CPLD and the SMARC header. The CPLD performs a reset after a 30s timeout so we need to enable the watchdog per default. - SMARC module eeprom Due to the lack of hardware not all of these interfaces are tesetd. [1] https://sget.org/standards/smarc Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de> Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-24ARM: dts: pxa300-raumfeld-speaker-one: add channel output mapping for STA320Daniel Mack1-0/+3
These settings are needed to make the hardware operable. Signed-off-by: Daniel Mack <daniel@zonque.org> Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
2019-06-24ARM: pxa: raumfeld-common: fix comments in gpio_keys pinctrl nodeDaniel Mack1-3/+3
Careless oversight. Signed-off-by: Daniel Mack <daniel@zonque.org> Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
2019-06-24ARM: pxa: raumfeld-controller: add pinctrl for charger pinsDaniel Mack1-0/+10
The PEN2 line needs to be pulled up for the charger to enter high-current mode. Do this with a static pull on the GPIO. Signed-off-by: Daniel Mack <daniel@zonque.org> Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
2019-06-24ARM: pxa: raumfeld-controller: fix 'dock detect' GPIO keyDaniel Mack1-1/+10
The dock detection input key is active low. Also add a pinmux for it. Signed-off-by: Daniel Mack <daniel@zonque.org> Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
2019-06-24ARM: pxa3xx: dts: Add defines for pinctrl-single,bias-pull{up,down}Daniel Mack1-0/+8
This allows users of the pinctrl driver to specify either pinctrl-single,bias-pullup = MPF_PULL_UP; or pinctrl-single,bias-pulldown = MPF_PULL_DOWN; To activate the pull bits in the MFP registers. Signed-off-by: Daniel Mack <daniel@zonque.org> Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
2019-06-24arm64: dts: librem5: enable the SNVS power keyAngus Ainslie (Purism)1-0/+3
Enable the snvs power key. Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-24arm64: dts: librem5: Limit the USB to 5VAngus Ainslie (Purism)1-1/+1
The charge controller can handle 14V but the PTC on the devkit can only handle 6V so limit the negotiated voltage to 5V. Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-24arm64: dts: imx8qxp: added ddr performance monitor nodesFrank Li1-0/+14
Add ddr performance monitor Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-24arm64: dts: imx8qxp: sort LSIO subsystem devicesShawn Guo1-53/+53
We prefer to sort device nodes under simple bus in order of unit address. Let's sort the devices under lsio_subsys properly. Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-24arm64: dts: imx8qxp: sort alias alphabeticallyShawn Guo1-1/+1
We prefer to sort alias entries alphabetically, so let's move serial0 to the right place. Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-24arm64: dts: imx8qxp: Add lsio_mu13 nodeDaniel Baluta1-0/+8
lsio_mu13 node is used to communicate with DSP. Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>