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2024-07-12MIPS: Implement ieee754 NAN2008 emulation modeJiaxun Yang4-2/+30
Implement ieee754 NAN2008 emulation mode. When this mode is enabled, kernel will accept ELF file compiled for both NaN 2008 and NaN legacy, but if hardware does not have capability to match ELF's NaN mode, __own_fpu will fail for corresponding thread and fpuemu will then kick in. This mode trade performance for correctness, while maintaining support for both NaN mode regardless of hardware capability. It is useful for multilib installation that have both types of binary exist in system. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2024-07-12MIPS: lantiq: improve USB initializationHauke Mehrtens1-0/+20
This adds code to initialize the USB controller and PHY also on Danube, Amazon SE and AR10. This code is based on the Vendor driver from different UGW versions and compared to the hardware documentation. This patch is included in OpenWrt for many years. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2024-07-09MIPS: GIC: Generate redirect block accessorsPaul Burton1-16/+34
With CM 3.5 the "core-other" register block evolves into the "redirect" register block, which is capable of accessing not only the core local registers of other cores but also the shared/global registers of other clusters. This patch generates accessor functions for shared/global registers accessed via the redirect block, with "redir_" inserted after "gic_" in their names. For example the accessor function: read_gic_config() ...accesses the GIC_CONFIG register of the GIC in the local cluster. With this patch a new function: read_gic_redir_config() ...is added which accesses the GIC_CONFIG register of the GIC in whichever cluster the GCR_CL_REDIRECT register is configured to access. This mirrors the similar redirect block accessors already provided for the CM & CPC. Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Paul Burton <paulburton@kernel.org> Signed-off-by: Chao-ying Fu <cfu@wavecomp.com> Signed-off-by: Dragan Mladjenovic <dragan.mladjenovic@syrmia.com> Signed-off-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2024-07-09MIPS: CPS: Add a couple of multi-cluster utility functionsPaul Burton2-0/+76
This patch introduces a couple of utility functions which help later patches with introducing support for multi-cluster systems. - mips_cps_multicluster_cpus() allows its caller to determine whether the system includes CPUs spread across multiple clusters. This is useful because in some cases behaviour can be more optimal taking this knowledge into account. The means by which we check this is dependent upon the way we probe CPUs & assign their numbers, so keeping this knowledge confined here in arch/mips/ seems appropriate. - mips_cps_first_online_in_cluster() allows its caller to determine whether it is running upon the first CPU online within its cluster. This information is useful in cases where some cluster-wide configuration may need to occur, but should not be repeated if another CPU in the cluster is already online. Similarly to the above this is determined based upon knowledge of CPU numbering so it makes sense to keep that knowledge in arch/mips/. The function is defined in mips-cm.c rather than in asm/mips-cps.h in order to allow us to use asm/cpu-info.h & linux/smp.h without encountering an include nightmare. Signed-off-by: Paul Burton <paulburton@kernel.org> Signed-off-by: Chao-ying Fu <cfu@wavecomp.com> Signed-off-by: Dragan Mladjenovic <dragan.mladjenovic@syrmia.com> Signed-off-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2024-07-09MIPS: Octeron: remove source file executable bitDominique Martinet1-0/+0
This does not matter the least, but there is no other .[ch] file in the repo that is executable, so clean this up. Fixes: 29b83a64df3b ("MIPS: Octeon: Add PCIe link status check") Signed-off-by: Dominique Martinet <dominique.martinet@atmark-techno.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2024-07-03MAINTAINERS: Mobileye: add OLB drivers and dt-bindingsThéo Lebrun1-0/+5
Register OLB-related files part of the "MOBILEYE MIPS SOCS" MAINTAINERS section. Those include: - drivers (clk-eyeq, reset-eyeq, pinctrl-eyeq5), - dt-bindings (mobileye,eyeq5-olb.yaml file), - bindings includes file <dt-bindings/clock/mobileye,eyeq5-clk.h>. Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2024-07-03MIPS: mobileye: eyeq5: add OLB system-controller nodeThéo Lebrun3-39/+162
The OLB ("Other Logic Block") is a system-controller region hosting clock, reset and pin controllers. It contains registers such as I2C speed mode that need to be accessible by other nodes. Remove fixed-clocks previously used; replace references. Add parent crystal clock, fixed at 30MHz. Add pin nodes for all functions. Add mobileye,eyeq5-olb compatible node, hosting clk, reset and pinctrl. Add reset and pinctrl references to UART nodes. Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>