From fca8d64001fcfb26f7698c2052e1fc6634133ebc Mon Sep 17 00:00:00 2001 From: Yuntao Dai Date: Tue, 20 May 2025 15:44:23 +0800 Subject: dt-bindings: mailbox: add Sophgo CV18XX series SoC Introduce the mailbox module for CV18XX series SoC, which is responsible for interchanging messages between asymmetric processors. Signed-off-by: Yuntao Dai Signed-off-by: Junhui Liu Signed-off-by: Jassi Brar --- .../bindings/mailbox/sophgo,cv1800b-mailbox.yaml | 60 ++++++++++++++++++++++ 1 file changed, 60 insertions(+) create mode 100644 Documentation/devicetree/bindings/mailbox/sophgo,cv1800b-mailbox.yaml (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/mailbox/sophgo,cv1800b-mailbox.yaml b/Documentation/devicetree/bindings/mailbox/sophgo,cv1800b-mailbox.yaml new file mode 100644 index 000000000000..24e126bd3a20 --- /dev/null +++ b/Documentation/devicetree/bindings/mailbox/sophgo,cv1800b-mailbox.yaml @@ -0,0 +1,60 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mailbox/sophgo,cv1800b-mailbox.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Sophgo CV1800/SG2000 mailbox controller + +maintainers: + - Yuntao Dai + - Junhui Liu + +description: + Mailboxes integrated in Sophgo CV1800/SG2000 SoCs have 8 channels, each + shipping an 8-byte FIFO. Any processor can write to an arbitrary channel + and raise interrupts to receivers. Sending messages to itself is also + supported. + +properties: + compatible: + const: sophgo,cv1800b-mailbox + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + "#mbox-cells": + const: 2 + description: | + <&phandle channel target> + phandle : Label name of mailbox controller + channel : 0-7, Channel index + target : 0-3, Target processor ID + + Sophgo CV1800/SG2000 SoCs include the following processors, numbered as: + <0> Cortex-A53 (Only available on CV181X/SG200X) + <1> C906B + <2> C906L + <3> 8051 + +required: + - compatible + - reg + - interrupts + - "#mbox-cells" + +additionalProperties: false + +examples: + - | + #include + + mailbox@1900000 { + compatible = "sophgo,cv1800b-mailbox"; + reg = <0x01900000 0x1000>; + interrupts = <101 IRQ_TYPE_LEVEL_HIGH>; + #mbox-cells = <2>; + }; -- cgit v1.2.3-59-g8ed1b From 02e66dacb5b7ae21518fb24f8cb69295302bbfad Mon Sep 17 00:00:00 2001 From: David Wronek Date: Tue, 22 Apr 2025 23:17:05 +0300 Subject: dt-bindings: mailbox: qcom: Add the SM7150 APCS compatible Add compatible for the Qualcomm SM7150 APCS block to the Qualcomm APCS binding. Signed-off-by: David Wronek Signed-off-by: Danila Tikhonov Signed-off-by: Jassi Brar --- Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml index a58a018f3f7b..da00858d3a46 100644 --- a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml +++ b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml @@ -49,6 +49,7 @@ properties: - qcom,qcs615-apss-shared - qcom,sc7180-apss-shared - qcom,sc8180x-apss-shared + - qcom,sm7150-apss-shared - qcom,sm8150-apss-shared - const: qcom,sdm845-apss-shared - items: -- cgit v1.2.3-59-g8ed1b From c3c51387141db549c96db2fd4b8161fa0b4d7301 Mon Sep 17 00:00:00 2001 From: Stephan Gerhold Date: Tue, 6 May 2025 15:10:08 +0200 Subject: dt-bindings: mailbox: qcom,apcs: Add separate node for clock-controller APCS "global" is sort of a "miscellaneous" hardware block that combines multiple registers inside the application processor subsystem. Two distinct use cases are currently stuffed together in a single device tree node: - Mailbox: to communicate with other remoteprocs in the system. - Clock: for controlling the CPU frequency. These two use cases have unavoidable circular dependencies: the mailbox is needed as early as possible during boot to start controlling shared resources like clocks and power domains, while the clock controller needs one of these shared clocks as its parent. Currently, there is no way to distinguish these two use cases for generic mechanisms like fw_devlink. This is currently blocking conversion of the deprecated custom "qcom,ipc" properties to the standard "mboxes", see e.g. commit d92e9ea2f0f9 ("arm64: dts: qcom: msm8939: revert use of APCS mbox for RPM"): 1. remoteproc &rpm needs mboxes = <&apcs1_mbox 8>; 2. The clock controller inside &apcs1_mbox needs clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>. 3. &rpmcc is a child of remoteproc &rpm The mailbox itself does not need any clocks and should probe early to unblock the rest of the boot process. The "clocks" are only needed for the separate clock controller. In Linux, these are already two separate drivers that can probe independently. Break up the circular dependency chain in the device tree by separating the clock controller into a separate child node. Deprecate the old approach of specifying the clock properties as part of the root node, but keep them for backwards compatibility. Signed-off-by: Stephan Gerhold Reviewed-by: Krzysztof Kozlowski Signed-off-by: Jassi Brar --- .../bindings/mailbox/qcom,apcs-kpss-global.yaml | 169 ++++++++++++++------- 1 file changed, 118 insertions(+), 51 deletions(-) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml index da00858d3a46..ac726136f7e5 100644 --- a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml +++ b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml @@ -73,6 +73,7 @@ properties: description: phandles to the parent clocks of the clock driver minItems: 2 maxItems: 3 + deprecated: true '#mbox-cells': const: 1 @@ -83,6 +84,23 @@ properties: clock-names: minItems: 2 maxItems: 3 + deprecated: true + + clock-controller: + type: object + additionalProperties: false + properties: + clocks: + description: phandles to the parent clocks of the clock driver + minItems: 2 + maxItems: 3 + + '#clock-cells': + enum: [0, 1] + + clock-names: + minItems: 2 + maxItems: 3 required: - compatible @@ -91,6 +109,76 @@ required: additionalProperties: false +# Clocks should be specified either on the parent node or on the child node +oneOf: + - required: + - clock-controller + properties: + clocks: false + clock-names: false + '#clock-cells': false + - properties: + clock-controller: false + +$defs: + msm8916-apcs-clock-controller: + properties: + clocks: + items: + - description: primary pll parent of the clock driver + - description: auxiliary parent + clock-names: + items: + - const: pll + - const: aux + '#clock-cells': + const: 0 + + msm8939-apcs-clock-controller: + properties: + clocks: + items: + - description: primary pll parent of the clock driver + - description: auxiliary parent + - description: reference clock + clock-names: + items: + - const: pll + - const: aux + - const: ref + '#clock-cells': + const: 0 + + sdx55-apcs-clock-controller: + properties: + clocks: + items: + - description: reference clock + - description: primary pll parent of the clock driver + - description: auxiliary parent + clock-names: + items: + - const: ref + - const: pll + - const: aux + '#clock-cells': + const: 0 + + ipq6018-apcs-clock-controller: + properties: + clocks: + items: + - description: primary pll parent of the clock driver + - description: XO clock + - description: GCC GPLL0 clock source + clock-names: + items: + - const: pll + - const: xo + - const: gpll0 + '#clock-cells': + const: 1 + allOf: - if: properties: @@ -99,15 +187,10 @@ allOf: enum: - qcom,msm8916-apcs-kpss-global then: + $ref: "#/$defs/msm8916-apcs-clock-controller" properties: - clocks: - items: - - description: primary pll parent of the clock driver - - description: auxiliary parent - clock-names: - items: - - const: pll - - const: aux + clock-controller: + $ref: "#/$defs/msm8916-apcs-clock-controller" - if: properties: @@ -116,17 +199,10 @@ allOf: enum: - qcom,msm8939-apcs-kpss-global then: + $ref: "#/$defs/msm8939-apcs-clock-controller" properties: - clocks: - items: - - description: primary pll parent of the clock driver - - description: auxiliary parent - - description: reference clock - clock-names: - items: - - const: pll - - const: aux - - const: ref + clock-controller: + $ref: "#/$defs/msm8939-apcs-clock-controller" - if: properties: @@ -135,17 +211,10 @@ allOf: enum: - qcom,sdx55-apcs-gcc then: + $ref: "#/$defs/sdx55-apcs-clock-controller" properties: - clocks: - items: - - description: reference clock - - description: primary pll parent of the clock driver - - description: auxiliary parent - clock-names: - items: - - const: ref - - const: pll - - const: aux + clock-controller: + $ref: "#/$defs/sdx55-apcs-clock-controller" - if: properties: @@ -154,17 +223,10 @@ allOf: enum: - qcom,ipq6018-apcs-apps-global then: + $ref: "#/$defs/ipq6018-apcs-clock-controller" properties: - clocks: - items: - - description: primary pll parent of the clock driver - - description: XO clock - - description: GCC GPLL0 clock source - clock-names: - items: - - const: pll - - const: xo - - const: gpll0 + clock-controller: + $ref: "#/$defs/ipq6018-apcs-clock-controller" - if: properties: @@ -180,19 +242,7 @@ allOf: properties: clocks: false clock-names: false - - - if: - properties: - compatible: - contains: - enum: - - qcom,ipq6018-apcs-apps-global - then: - properties: - '#clock-cells': - const: 1 - else: - properties: + clock-controller: false '#clock-cells': const: 0 @@ -217,6 +267,23 @@ examples: }; # Example apcs with qcs404 + - | + #define GCC_APSS_AHB_CLK_SRC 1 + #define GCC_GPLL0_AO_OUT_MAIN 123 + mailbox@b011000 { + compatible = "qcom,qcs404-apcs-apps-global", + "qcom,msm8916-apcs-kpss-global", "syscon"; + reg = <0x0b011000 0x1000>; + #mbox-cells = <1>; + + apcs_clk: clock-controller { + clocks = <&apcs_hfpll>, <&gcc GCC_GPLL0_AO_OUT_MAIN>; + clock-names = "pll", "aux"; + #clock-cells = <0>; + }; + }; + + # Example apcs with qcs404 (deprecated: use clock-controller subnode) - | #define GCC_APSS_AHB_CLK_SRC 1 #define GCC_GPLL0_AO_OUT_MAIN 123 -- cgit v1.2.3-59-g8ed1b