From 93a105694f7dbf47ea5e8c60a04502fb72c3fc34 Mon Sep 17 00:00:00 2001 From: Andrey Smirnov Date: Tue, 18 Jun 2019 22:27:02 -0700 Subject: drm/bridge: tc358767: Simplify tc_poll_timeout() Implementation of tc_poll_timeout() is almost a 100% copy-and-paste of the code for regmap_read_poll_timeout(). Replace copied code with a call to the original. While at it change tc_poll_timeout to accept "struct tc_data *" instead of "struct regmap *" for brevity. No functional change intended. Signed-off-by: Andrey Smirnov Reviewed-by: Andrzej Hajda Reviewed-by: Laurent Pinchart Reviewed-by: Tomi Valkeinen Cc: Andrzej Hajda Cc: Laurent Pinchart Cc: Tomi Valkeinen Cc: Andrey Gusakov Cc: Philipp Zabel Cc: Cory Tusar Cc: Chris Healy Cc: Lucas Stach Cc: dri-devel@lists.freedesktop.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Andrzej Hajda Link: https://patchwork.freedesktop.org/patch/msgid/20190619052716.16831-2-andrew.smirnov@gmail.com --- drivers/gpu/drm/bridge/tc358767.c | 26 ++++++-------------------- 1 file changed, 6 insertions(+), 20 deletions(-) (limited to 'drivers/gpu/drm/bridge/tc358767.c') diff --git a/drivers/gpu/drm/bridge/tc358767.c b/drivers/gpu/drm/bridge/tc358767.c index 13ade28a36a8..684944f8e866 100644 --- a/drivers/gpu/drm/bridge/tc358767.c +++ b/drivers/gpu/drm/bridge/tc358767.c @@ -255,34 +255,21 @@ static inline struct tc_data *connector_to_tc(struct drm_connector *c) goto err; \ } while (0) -static inline int tc_poll_timeout(struct regmap *map, unsigned int addr, +static inline int tc_poll_timeout(struct tc_data *tc, unsigned int addr, unsigned int cond_mask, unsigned int cond_value, unsigned long sleep_us, u64 timeout_us) { - ktime_t timeout = ktime_add_us(ktime_get(), timeout_us); unsigned int val; - int ret; - for (;;) { - ret = regmap_read(map, addr, &val); - if (ret) - break; - if ((val & cond_mask) == cond_value) - break; - if (timeout_us && ktime_compare(ktime_get(), timeout) > 0) { - ret = regmap_read(map, addr, &val); - break; - } - if (sleep_us) - usleep_range((sleep_us >> 2) + 1, sleep_us); - } - return ret ?: (((val & cond_mask) == cond_value) ? 0 : -ETIMEDOUT); + return regmap_read_poll_timeout(tc->regmap, addr, val, + (val & cond_mask) == cond_value, + sleep_us, timeout_us); } static int tc_aux_wait_busy(struct tc_data *tc, unsigned int timeout_ms) { - return tc_poll_timeout(tc->regmap, DP0_AUXSTATUS, AUX_BUSY, 0, + return tc_poll_timeout(tc, DP0_AUXSTATUS, AUX_BUSY, 0, 1000, 1000 * timeout_ms); } @@ -589,8 +576,7 @@ static int tc_aux_link_setup(struct tc_data *tc) tc_write(DP1_PLLCTRL, PLLUPDATE | PLLEN); tc_wait_pll_lock(tc); - ret = tc_poll_timeout(tc->regmap, DP_PHY_CTRL, PHY_RDY, PHY_RDY, 1, - 1000); + ret = tc_poll_timeout(tc, DP_PHY_CTRL, PHY_RDY, PHY_RDY, 1, 1000); if (ret == -ETIMEDOUT) { dev_err(tc->dev, "Timeout waiting for PHY to become ready"); return ret; -- cgit v1.2.3-59-g8ed1b From ebcce4e642474764989f5c213394580ae5700ed7 Mon Sep 17 00:00:00 2001 From: Andrey Smirnov Date: Tue, 18 Jun 2019 22:27:03 -0700 Subject: drm/bridge: tc358767: Simplify polling in tc_main_link_setup() Replace explicit polling loop with equivalent call to tc_poll_timeout() for brevity. No functional change intended. Signed-off-by: Andrey Smirnov Reviewed-by: Andrzej Hajda Reviewed-by: Tomi Valkeinen Cc: Andrzej Hajda Cc: Laurent Pinchart Cc: Tomi Valkeinen Cc: Andrey Gusakov Cc: Philipp Zabel Cc: Cory Tusar Cc: Chris Healy Cc: Lucas Stach Cc: dri-devel@lists.freedesktop.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Andrzej Hajda Link: https://patchwork.freedesktop.org/patch/msgid/20190619052716.16831-3-andrew.smirnov@gmail.com --- drivers/gpu/drm/bridge/tc358767.c | 12 +++--------- 1 file changed, 3 insertions(+), 9 deletions(-) (limited to 'drivers/gpu/drm/bridge/tc358767.c') diff --git a/drivers/gpu/drm/bridge/tc358767.c b/drivers/gpu/drm/bridge/tc358767.c index 684944f8e866..109085c2660e 100644 --- a/drivers/gpu/drm/bridge/tc358767.c +++ b/drivers/gpu/drm/bridge/tc358767.c @@ -765,7 +765,6 @@ static int tc_main_link_enable(struct tc_data *tc) struct device *dev = tc->dev; unsigned int rate; u32 dp_phy_ctrl; - int timeout; u32 value; int ret; u8 tmp[8]; @@ -822,15 +821,10 @@ static int tc_main_link_enable(struct tc_data *tc) dp_phy_ctrl &= ~(DP_PHY_RST | PHY_M1_RST | PHY_M0_RST); tc_write(DP_PHY_CTRL, dp_phy_ctrl); - timeout = 1000; - do { - tc_read(DP_PHY_CTRL, &value); - udelay(1); - } while ((!(value & PHY_RDY)) && (--timeout)); - - if (timeout == 0) { + ret = tc_poll_timeout(tc, DP_PHY_CTRL, PHY_RDY, PHY_RDY, 1, 1000); + if (ret) { dev_err(dev, "timeout waiting for phy become ready"); - return -ETIMEDOUT; + return ret; } /* Set misc: 8 bits per color */ -- cgit v1.2.3-59-g8ed1b From aa92213f388ba88f895cc8eb432b95925b890e3b Mon Sep 17 00:00:00 2001 From: Andrey Smirnov Date: Tue, 18 Jun 2019 22:27:04 -0700 Subject: drm/bridge: tc358767: Simplify polling in tc_link_training() Replace explicit polling in tc_link_training() with equivalent call to tc_poll_timeout() for simplicity. No functional change intended (not including slightly altered debug output). Signed-off-by: Andrey Smirnov Reviewed-by: Andrzej Hajda Reviewed-by: Tomi Valkeinen Cc: Andrzej Hajda Cc: Laurent Pinchart Cc: Tomi Valkeinen Cc: Andrey Gusakov Cc: Philipp Zabel Cc: Cory Tusar Cc: Chris Healy Cc: Lucas Stach Cc: dri-devel@lists.freedesktop.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Andrzej Hajda Link: https://patchwork.freedesktop.org/patch/msgid/20190619052716.16831-4-andrew.smirnov@gmail.com --- drivers/gpu/drm/bridge/tc358767.c | 15 ++++++--------- 1 file changed, 6 insertions(+), 9 deletions(-) (limited to 'drivers/gpu/drm/bridge/tc358767.c') diff --git a/drivers/gpu/drm/bridge/tc358767.c b/drivers/gpu/drm/bridge/tc358767.c index 109085c2660e..0270d18deb5e 100644 --- a/drivers/gpu/drm/bridge/tc358767.c +++ b/drivers/gpu/drm/bridge/tc358767.c @@ -739,22 +739,19 @@ err: static int tc_wait_link_training(struct tc_data *tc) { - u32 timeout = 1000; u32 value; int ret; - do { - udelay(1); - tc_read(DP0_LTSTAT, &value); - } while ((!(value & LT_LOOPDONE)) && (--timeout)); - - if (timeout == 0) { + ret = tc_poll_timeout(tc, DP0_LTSTAT, LT_LOOPDONE, + LT_LOOPDONE, 1, 1000); + if (ret) { dev_err(tc->dev, "Link training timeout waiting for LT_LOOPDONE!\n"); - return -ETIMEDOUT; + return ret; } - return (value >> 8) & 0x7; + tc_read(DP0_LTSTAT, &value); + return (value >> 8) & 0x7; err: return ret; } -- cgit v1.2.3-59-g8ed1b From 3f072c304c0a7e1045ef2e5478403c0137746878 Mon Sep 17 00:00:00 2001 From: Andrey Smirnov Date: Tue, 18 Jun 2019 22:27:05 -0700 Subject: drm/bridge: tc358767: Simplify tc_set_video_mode() Simplify tc_set_video_mode() by replacing explicit shifting using macros from . No functional change intended. Signed-off-by: Andrey Smirnov Reviewed-by: Andrzej Hajda Reviewed-by: Tomi Valkeinen Cc: Andrzej Hajda Cc: Laurent Pinchart Cc: Tomi Valkeinen Cc: Andrey Gusakov Cc: Philipp Zabel Cc: Cory Tusar Cc: Chris Healy Cc: Lucas Stach Cc: dri-devel@lists.freedesktop.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Andrzej Hajda Link: https://patchwork.freedesktop.org/patch/msgid/20190619052716.16831-5-andrew.smirnov@gmail.com --- drivers/gpu/drm/bridge/tc358767.c | 106 ++++++++++++++++++++++++++++---------- 1 file changed, 78 insertions(+), 28 deletions(-) (limited to 'drivers/gpu/drm/bridge/tc358767.c') diff --git a/drivers/gpu/drm/bridge/tc358767.c b/drivers/gpu/drm/bridge/tc358767.c index 0270d18deb5e..b3a4814f2a62 100644 --- a/drivers/gpu/drm/bridge/tc358767.c +++ b/drivers/gpu/drm/bridge/tc358767.c @@ -15,6 +15,7 @@ * Author: Rob Clark */ +#include #include #include #include @@ -47,6 +48,7 @@ /* Video Path */ #define VPCTRL0 0x0450 +#define VSDELAY GENMASK(31, 20) #define OPXLFMT_RGB666 (0 << 8) #define OPXLFMT_RGB888 (1 << 8) #define FRMSYNC_DISABLED (0 << 4) /* Video Timing Gen Disabled */ @@ -54,9 +56,17 @@ #define MSF_DISABLED (0 << 0) /* Magic Square FRC disabled */ #define MSF_ENABLED (1 << 0) /* Magic Square FRC enabled */ #define HTIM01 0x0454 +#define HPW GENMASK(8, 0) +#define HBPR GENMASK(24, 16) #define HTIM02 0x0458 +#define HDISPR GENMASK(10, 0) +#define HFPR GENMASK(24, 16) #define VTIM01 0x045c +#define VSPR GENMASK(7, 0) +#define VBPR GENMASK(23, 16) #define VTIM02 0x0460 +#define VFPR GENMASK(23, 16) +#define VDISPR GENMASK(10, 0) #define VFUEN0 0x0464 #define VFUEN BIT(0) /* Video Frame Timing Upload */ @@ -99,14 +109,28 @@ /* Main Channel */ #define DP0_SECSAMPLE 0x0640 #define DP0_VIDSYNCDELAY 0x0644 +#define VID_SYNC_DLY GENMASK(15, 0) +#define THRESH_DLY GENMASK(31, 16) + #define DP0_TOTALVAL 0x0648 +#define H_TOTAL GENMASK(15, 0) +#define V_TOTAL GENMASK(31, 16) #define DP0_STARTVAL 0x064c +#define H_START GENMASK(15, 0) +#define V_START GENMASK(31, 16) #define DP0_ACTIVEVAL 0x0650 +#define H_ACT GENMASK(15, 0) +#define V_ACT GENMASK(31, 16) + #define DP0_SYNCVAL 0x0654 +#define VS_WIDTH GENMASK(30, 16) +#define HS_WIDTH GENMASK(14, 0) #define SYNCVAL_HS_POL_ACTIVE_LOW (1 << 15) #define SYNCVAL_VS_POL_ACTIVE_LOW (1 << 31) #define DP0_MISC 0x0658 #define TU_SIZE_RECOMMENDED (63) /* LSCLK cycles per TU */ +#define MAX_TU_SYMBOL GENMASK(28, 23) +#define TU_SIZE GENMASK(21, 16) #define BPC_6 (0 << 5) #define BPC_8 (1 << 5) @@ -183,6 +207,12 @@ /* Test & Debug */ #define TSTCTL 0x0a00 +#define COLOR_R GENMASK(31, 24) +#define COLOR_G GENMASK(23, 16) +#define COLOR_B GENMASK(15, 8) +#define ENI2CFILTER BIT(4) +#define COLOR_BAR_MODE GENMASK(1, 0) +#define COLOR_BAR_MODE_BARS 2 #define PLL_DBG 0x0a04 static bool tc_test_pattern; @@ -663,6 +693,7 @@ static int tc_set_video_mode(struct tc_data *tc, int upper_margin = mode->vtotal - mode->vsync_end; int lower_margin = mode->vsync_start - mode->vdisplay; int vsync_len = mode->vsync_end - mode->vsync_start; + u32 dp0_syncval; /* * Recommended maximum number of symbols transferred in a transfer unit: @@ -687,50 +718,69 @@ static int tc_set_video_mode(struct tc_data *tc, * assume we do not need any delay when DPI is a source of * sync signals */ - tc_write(VPCTRL0, (0 << 20) /* VSDELAY */ | + tc_write(VPCTRL0, + FIELD_PREP(VSDELAY, 0) | OPXLFMT_RGB888 | FRMSYNC_DISABLED | MSF_DISABLED); - tc_write(HTIM01, (ALIGN(left_margin, 2) << 16) | /* H back porch */ - (ALIGN(hsync_len, 2) << 0)); /* Hsync */ - tc_write(HTIM02, (ALIGN(right_margin, 2) << 16) | /* H front porch */ - (ALIGN(mode->hdisplay, 2) << 0)); /* width */ - tc_write(VTIM01, (upper_margin << 16) | /* V back porch */ - (vsync_len << 0)); /* Vsync */ - tc_write(VTIM02, (lower_margin << 16) | /* V front porch */ - (mode->vdisplay << 0)); /* height */ + tc_write(HTIM01, + FIELD_PREP(HBPR, ALIGN(left_margin, 2)) | + FIELD_PREP(HPW, ALIGN(hsync_len, 2))); + tc_write(HTIM02, + FIELD_PREP(HDISPR, ALIGN(mode->hdisplay, 2)) | + FIELD_PREP(HFPR, ALIGN(right_margin, 2))); + tc_write(VTIM01, + FIELD_PREP(VBPR, upper_margin) | + FIELD_PREP(VSPR, vsync_len)); + tc_write(VTIM02, + FIELD_PREP(VFPR, lower_margin) | + FIELD_PREP(VDISPR, mode->vdisplay)); tc_write(VFUEN0, VFUEN); /* update settings */ /* Test pattern settings */ tc_write(TSTCTL, - (120 << 24) | /* Red Color component value */ - (20 << 16) | /* Green Color component value */ - (99 << 8) | /* Blue Color component value */ - (1 << 4) | /* Enable I2C Filter */ - (2 << 0) | /* Color bar Mode */ - 0); + FIELD_PREP(COLOR_R, 120) | + FIELD_PREP(COLOR_G, 20) | + FIELD_PREP(COLOR_B, 99) | + ENI2CFILTER | + FIELD_PREP(COLOR_BAR_MODE, COLOR_BAR_MODE_BARS)); /* DP Main Stream Attributes */ vid_sync_dly = hsync_len + left_margin + mode->hdisplay; tc_write(DP0_VIDSYNCDELAY, - (max_tu_symbol << 16) | /* thresh_dly */ - (vid_sync_dly << 0)); + FIELD_PREP(THRESH_DLY, max_tu_symbol) | + FIELD_PREP(VID_SYNC_DLY, vid_sync_dly)); - tc_write(DP0_TOTALVAL, (mode->vtotal << 16) | (mode->htotal)); + tc_write(DP0_TOTALVAL, + FIELD_PREP(H_TOTAL, mode->htotal) | + FIELD_PREP(V_TOTAL, mode->vtotal)); tc_write(DP0_STARTVAL, - ((upper_margin + vsync_len) << 16) | - ((left_margin + hsync_len) << 0)); + FIELD_PREP(H_START, left_margin + hsync_len) | + FIELD_PREP(V_START, upper_margin + vsync_len)); + + tc_write(DP0_ACTIVEVAL, + FIELD_PREP(V_ACT, mode->vdisplay) | + FIELD_PREP(H_ACT, mode->hdisplay)); + + dp0_syncval = FIELD_PREP(VS_WIDTH, vsync_len) | + FIELD_PREP(HS_WIDTH, hsync_len); + + if (mode->flags & DRM_MODE_FLAG_NVSYNC) + dp0_syncval |= SYNCVAL_VS_POL_ACTIVE_LOW; - tc_write(DP0_ACTIVEVAL, (mode->vdisplay << 16) | (mode->hdisplay)); + if (mode->flags & DRM_MODE_FLAG_NHSYNC) + dp0_syncval |= SYNCVAL_HS_POL_ACTIVE_LOW; - tc_write(DP0_SYNCVAL, (vsync_len << 16) | (hsync_len << 0) | - ((mode->flags & DRM_MODE_FLAG_NHSYNC) ? SYNCVAL_HS_POL_ACTIVE_LOW : 0) | - ((mode->flags & DRM_MODE_FLAG_NVSYNC) ? SYNCVAL_VS_POL_ACTIVE_LOW : 0)); + tc_write(DP0_SYNCVAL, dp0_syncval); - tc_write(DPIPXLFMT, VS_POL_ACTIVE_LOW | HS_POL_ACTIVE_LOW | - DE_POL_ACTIVE_HIGH | SUB_CFG_TYPE_CONFIG1 | DPI_BPP_RGB888); + tc_write(DPIPXLFMT, + VS_POL_ACTIVE_LOW | HS_POL_ACTIVE_LOW | + DE_POL_ACTIVE_HIGH | SUB_CFG_TYPE_CONFIG1 | + DPI_BPP_RGB888); - tc_write(DP0_MISC, (max_tu_symbol << 23) | (TU_SIZE_RECOMMENDED << 16) | - BPC_8); + tc_write(DP0_MISC, + FIELD_PREP(MAX_TU_SYMBOL, max_tu_symbol) | + FIELD_PREP(TU_SIZE, TU_SIZE_RECOMMENDED) | + BPC_8); return 0; err: -- cgit v1.2.3-59-g8ed1b From 6d0c38315915d49fbbcc55340c06f811a55a4885 Mon Sep 17 00:00:00 2001 From: Andrey Smirnov Date: Tue, 18 Jun 2019 22:27:06 -0700 Subject: drm/bridge: tc358767: Drop custom tc_write()/tc_read() accessors A very unfortunate aspect of tc_write()/tc_read() macro helpers is that they capture quite a bit of context around them and thus require the caller to have magic variables 'ret' and 'tc' as well as label 'err'. That makes a number of code paths rather counter-intuitive and somewhat clunky, for example tc_stream_clock_calc() ends up being like this: int ret; tc_write(DP0_VIDMNGEN1, 32768); return 0; err: return ret; which is rather surprising when you read the code for the first time. Since those helpers arguably aren't really saving that much code and there's no way of fixing them without making them too verbose to be worth it change the driver code to not use them at all. Signed-off-by: Andrey Smirnov Reviewed-by: Andrzej Hajda Reviewed-by: Tomi Valkeinen Cc: Andrzej Hajda Cc: Laurent Pinchart Cc: Tomi Valkeinen Cc: Andrey Gusakov Cc: Philipp Zabel Cc: Cory Tusar Cc: Chris Healy Cc: Lucas Stach Cc: dri-devel@lists.freedesktop.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Andrzej Hajda Link: https://patchwork.freedesktop.org/patch/msgid/20190619052716.16831-6-andrew.smirnov@gmail.com --- drivers/gpu/drm/bridge/tc358767.c | 382 +++++++++++++++++++++++--------------- 1 file changed, 230 insertions(+), 152 deletions(-) (limited to 'drivers/gpu/drm/bridge/tc358767.c') diff --git a/drivers/gpu/drm/bridge/tc358767.c b/drivers/gpu/drm/bridge/tc358767.c index b3a4814f2a62..1b0ca1de2eae 100644 --- a/drivers/gpu/drm/bridge/tc358767.c +++ b/drivers/gpu/drm/bridge/tc358767.c @@ -271,20 +271,6 @@ static inline struct tc_data *connector_to_tc(struct drm_connector *c) return container_of(c, struct tc_data, connector); } -/* Simple macros to avoid repeated error checks */ -#define tc_write(reg, var) \ - do { \ - ret = regmap_write(tc->regmap, reg, var); \ - if (ret) \ - goto err; \ - } while (0) -#define tc_read(reg, var) \ - do { \ - ret = regmap_read(tc->regmap, reg, var); \ - if (ret) \ - goto err; \ - } while (0) - static inline int tc_poll_timeout(struct tc_data *tc, unsigned int addr, unsigned int cond_mask, unsigned int cond_value, @@ -342,7 +328,7 @@ static ssize_t tc_aux_transfer(struct drm_dp_aux *aux, ret = tc_aux_wait_busy(tc, 100); if (ret) - goto err; + return ret; if (request == DP_AUX_I2C_WRITE || request == DP_AUX_NATIVE_WRITE) { /* Store data */ @@ -353,7 +339,11 @@ static ssize_t tc_aux_transfer(struct drm_dp_aux *aux, tmp = (tmp << 8) | buf[i]; i++; if (((i % 4) == 0) || (i == size)) { - tc_write(DP0_AUXWDATA((i - 1) >> 2), tmp); + ret = regmap_write(tc->regmap, + DP0_AUXWDATA((i - 1) >> 2), + tmp); + if (ret) + return ret; tmp = 0; } } @@ -363,23 +353,32 @@ static ssize_t tc_aux_transfer(struct drm_dp_aux *aux, } /* Store address */ - tc_write(DP0_AUXADDR, msg->address); + ret = regmap_write(tc->regmap, DP0_AUXADDR, msg->address); + if (ret) + return ret; /* Start transfer */ - tc_write(DP0_AUXCFG0, ((size - 1) << 8) | request); + ret = regmap_write(tc->regmap, DP0_AUXCFG0, + ((size - 1) << 8) | request); + if (ret) + return ret; ret = tc_aux_wait_busy(tc, 100); if (ret) - goto err; + return ret; ret = tc_aux_get_status(tc, &msg->reply); if (ret) - goto err; + return ret; if (request == DP_AUX_I2C_READ || request == DP_AUX_NATIVE_READ) { /* Read data */ while (i < size) { - if ((i % 4) == 0) - tc_read(DP0_AUXRDATA(i >> 2), &tmp); + if ((i % 4) == 0) { + ret = regmap_read(tc->regmap, + DP0_AUXRDATA(i >> 2), &tmp); + if (ret) + return ret; + } buf[i] = tmp & 0xff; tmp = tmp >> 8; i++; @@ -387,8 +386,6 @@ static ssize_t tc_aux_transfer(struct drm_dp_aux *aux, } return size; -err: - return ret; } static const char * const training_pattern1_errors[] = { @@ -445,6 +442,7 @@ static int tc_pxl_pll_en(struct tc_data *tc, u32 refclk, u32 pixelclock) int ext_div[] = {1, 2, 3, 5, 7}; int best_pixelclock = 0; int vco_hi = 0; + u32 pxl_pllparam; dev_dbg(tc->dev, "PLL: requested %d pixelclock, ref %d\n", pixelclock, refclk); @@ -514,24 +512,29 @@ static int tc_pxl_pll_en(struct tc_data *tc, u32 refclk, u32 pixelclock) best_mul = 0; /* Power up PLL and switch to bypass */ - tc_write(PXL_PLLCTRL, PLLBYP | PLLEN); + ret = regmap_write(tc->regmap, PXL_PLLCTRL, PLLBYP | PLLEN); + if (ret) + return ret; + + pxl_pllparam = vco_hi << 24; /* For PLL VCO >= 300 MHz = 1 */ + pxl_pllparam |= ext_div[best_pre] << 20; /* External Pre-divider */ + pxl_pllparam |= ext_div[best_post] << 16; /* External Post-divider */ + pxl_pllparam |= IN_SEL_REFCLK; /* Use RefClk as PLL input */ + pxl_pllparam |= best_div << 8; /* Divider for PLL RefClk */ + pxl_pllparam |= best_mul; /* Multiplier for PLL */ - tc_write(PXL_PLLPARAM, - (vco_hi << 24) | /* For PLL VCO >= 300 MHz = 1 */ - (ext_div[best_pre] << 20) | /* External Pre-divider */ - (ext_div[best_post] << 16) | /* External Post-divider */ - IN_SEL_REFCLK | /* Use RefClk as PLL input */ - (best_div << 8) | /* Divider for PLL RefClk */ - (best_mul << 0)); /* Multiplier for PLL */ + ret = regmap_write(tc->regmap, PXL_PLLPARAM, pxl_pllparam); + if (ret) + return ret; /* Force PLL parameter update and disable bypass */ - tc_write(PXL_PLLCTRL, PLLUPDATE | PLLEN); + ret = regmap_write(tc->regmap, PXL_PLLCTRL, PLLUPDATE | PLLEN); + if (ret) + return ret; tc_wait_pll_lock(tc); return 0; -err: - return ret; } static int tc_pxl_pll_dis(struct tc_data *tc) @@ -542,7 +545,6 @@ static int tc_pxl_pll_dis(struct tc_data *tc) static int tc_stream_clock_calc(struct tc_data *tc) { - int ret; /* * If the Stream clock and Link Symbol clock are * asynchronous with each other, the value of M changes over @@ -558,16 +560,13 @@ static int tc_stream_clock_calc(struct tc_data *tc) * M/N = f_STRMCLK / f_LSCLK * */ - tc_write(DP0_VIDMNGEN1, 32768); - - return 0; -err: - return ret; + return regmap_write(tc->regmap, DP0_VIDMNGEN1, 32768); } static int tc_aux_link_setup(struct tc_data *tc) { unsigned long rate; + u32 dp0_auxcfg1; u32 value; int ret; @@ -592,18 +591,26 @@ static int tc_aux_link_setup(struct tc_data *tc) /* Setup DP-PHY / PLL */ value |= SYSCLK_SEL_LSCLK | LSCLK_DIV_2; - tc_write(SYS_PLLPARAM, value); - - tc_write(DP_PHY_CTRL, BGREN | PWR_SW_EN | PHY_A0_EN); + ret = regmap_write(tc->regmap, SYS_PLLPARAM, value); + if (ret) + goto err; + ret = regmap_write(tc->regmap, DP_PHY_CTRL, + BGREN | PWR_SW_EN | PHY_A0_EN); + if (ret) + goto err; /* * Initially PLLs are in bypass. Force PLL parameter update, * disable PLL bypass, enable PLL */ - tc_write(DP0_PLLCTRL, PLLUPDATE | PLLEN); + ret = regmap_write(tc->regmap, DP0_PLLCTRL, PLLUPDATE | PLLEN); + if (ret) + goto err; tc_wait_pll_lock(tc); - tc_write(DP1_PLLCTRL, PLLUPDATE | PLLEN); + ret = regmap_write(tc->regmap, DP1_PLLCTRL, PLLUPDATE | PLLEN); + if (ret) + goto err; tc_wait_pll_lock(tc); ret = tc_poll_timeout(tc, DP_PHY_CTRL, PHY_RDY, PHY_RDY, 1, 1000); @@ -615,9 +622,13 @@ static int tc_aux_link_setup(struct tc_data *tc) } /* Setup AUX link */ - tc_write(DP0_AUXCFG1, AUX_RX_FILTER_EN | - (0x06 << 8) | /* Aux Bit Period Calculator Threshold */ - (0x3f << 0)); /* Aux Response Timeout Timer */ + dp0_auxcfg1 = AUX_RX_FILTER_EN; + dp0_auxcfg1 |= 0x06 << 8; /* Aux Bit Period Calculator Threshold */ + dp0_auxcfg1 |= 0x3f << 0; /* Aux Response Timeout Timer */ + + ret = regmap_write(tc->regmap, DP0_AUXCFG1, dp0_auxcfg1); + if (ret) + goto err; return 0; err: @@ -718,48 +729,73 @@ static int tc_set_video_mode(struct tc_data *tc, * assume we do not need any delay when DPI is a source of * sync signals */ - tc_write(VPCTRL0, - FIELD_PREP(VSDELAY, 0) | - OPXLFMT_RGB888 | FRMSYNC_DISABLED | MSF_DISABLED); - tc_write(HTIM01, - FIELD_PREP(HBPR, ALIGN(left_margin, 2)) | - FIELD_PREP(HPW, ALIGN(hsync_len, 2))); - tc_write(HTIM02, - FIELD_PREP(HDISPR, ALIGN(mode->hdisplay, 2)) | - FIELD_PREP(HFPR, ALIGN(right_margin, 2))); - tc_write(VTIM01, - FIELD_PREP(VBPR, upper_margin) | - FIELD_PREP(VSPR, vsync_len)); - tc_write(VTIM02, - FIELD_PREP(VFPR, lower_margin) | - FIELD_PREP(VDISPR, mode->vdisplay)); - tc_write(VFUEN0, VFUEN); /* update settings */ + ret = regmap_write(tc->regmap, VPCTRL0, + FIELD_PREP(VSDELAY, 0) | + OPXLFMT_RGB888 | FRMSYNC_DISABLED | MSF_DISABLED); + if (ret) + return ret; + + ret = regmap_write(tc->regmap, HTIM01, + FIELD_PREP(HBPR, ALIGN(left_margin, 2)) | + FIELD_PREP(HPW, ALIGN(hsync_len, 2))); + if (ret) + return ret; + + ret = regmap_write(tc->regmap, HTIM02, + FIELD_PREP(HDISPR, ALIGN(mode->hdisplay, 2)) | + FIELD_PREP(HFPR, ALIGN(right_margin, 2))); + if (ret) + return ret; + + ret = regmap_write(tc->regmap, VTIM01, + FIELD_PREP(VBPR, upper_margin) | + FIELD_PREP(VSPR, vsync_len)); + if (ret) + return ret; + + ret = regmap_write(tc->regmap, VTIM02, + FIELD_PREP(VFPR, lower_margin) | + FIELD_PREP(VDISPR, mode->vdisplay)); + if (ret) + return ret; + + ret = regmap_write(tc->regmap, VFUEN0, VFUEN); /* update settings */ + if (ret) + return ret; /* Test pattern settings */ - tc_write(TSTCTL, - FIELD_PREP(COLOR_R, 120) | - FIELD_PREP(COLOR_G, 20) | - FIELD_PREP(COLOR_B, 99) | - ENI2CFILTER | - FIELD_PREP(COLOR_BAR_MODE, COLOR_BAR_MODE_BARS)); + ret = regmap_write(tc->regmap, TSTCTL, + FIELD_PREP(COLOR_R, 120) | + FIELD_PREP(COLOR_G, 20) | + FIELD_PREP(COLOR_B, 99) | + ENI2CFILTER | + FIELD_PREP(COLOR_BAR_MODE, COLOR_BAR_MODE_BARS)); + if (ret) + return ret; /* DP Main Stream Attributes */ vid_sync_dly = hsync_len + left_margin + mode->hdisplay; - tc_write(DP0_VIDSYNCDELAY, + ret = regmap_write(tc->regmap, DP0_VIDSYNCDELAY, FIELD_PREP(THRESH_DLY, max_tu_symbol) | FIELD_PREP(VID_SYNC_DLY, vid_sync_dly)); - tc_write(DP0_TOTALVAL, - FIELD_PREP(H_TOTAL, mode->htotal) | - FIELD_PREP(V_TOTAL, mode->vtotal)); + ret = regmap_write(tc->regmap, DP0_TOTALVAL, + FIELD_PREP(H_TOTAL, mode->htotal) | + FIELD_PREP(V_TOTAL, mode->vtotal)); + if (ret) + return ret; - tc_write(DP0_STARTVAL, - FIELD_PREP(H_START, left_margin + hsync_len) | - FIELD_PREP(V_START, upper_margin + vsync_len)); + ret = regmap_write(tc->regmap, DP0_STARTVAL, + FIELD_PREP(H_START, left_margin + hsync_len) | + FIELD_PREP(V_START, upper_margin + vsync_len)); + if (ret) + return ret; - tc_write(DP0_ACTIVEVAL, - FIELD_PREP(V_ACT, mode->vdisplay) | - FIELD_PREP(H_ACT, mode->hdisplay)); + ret = regmap_write(tc->regmap, DP0_ACTIVEVAL, + FIELD_PREP(V_ACT, mode->vdisplay) | + FIELD_PREP(H_ACT, mode->hdisplay)); + if (ret) + return ret; dp0_syncval = FIELD_PREP(VS_WIDTH, vsync_len) | FIELD_PREP(HS_WIDTH, hsync_len); @@ -770,21 +806,25 @@ static int tc_set_video_mode(struct tc_data *tc, if (mode->flags & DRM_MODE_FLAG_NHSYNC) dp0_syncval |= SYNCVAL_HS_POL_ACTIVE_LOW; - tc_write(DP0_SYNCVAL, dp0_syncval); + ret = regmap_write(tc->regmap, DP0_SYNCVAL, dp0_syncval); + if (ret) + return ret; - tc_write(DPIPXLFMT, - VS_POL_ACTIVE_LOW | HS_POL_ACTIVE_LOW | - DE_POL_ACTIVE_HIGH | SUB_CFG_TYPE_CONFIG1 | - DPI_BPP_RGB888); + ret = regmap_write(tc->regmap, DPIPXLFMT, + VS_POL_ACTIVE_LOW | HS_POL_ACTIVE_LOW | + DE_POL_ACTIVE_HIGH | SUB_CFG_TYPE_CONFIG1 | + DPI_BPP_RGB888); + if (ret) + return ret; - tc_write(DP0_MISC, - FIELD_PREP(MAX_TU_SYMBOL, max_tu_symbol) | - FIELD_PREP(TU_SIZE, TU_SIZE_RECOMMENDED) | - BPC_8); + ret = regmap_write(tc->regmap, DP0_MISC, + FIELD_PREP(MAX_TU_SYMBOL, max_tu_symbol) | + FIELD_PREP(TU_SIZE, TU_SIZE_RECOMMENDED) | + BPC_8); + if (ret) + return ret; return 0; -err: - return ret; } static int tc_wait_link_training(struct tc_data *tc) @@ -799,11 +839,11 @@ static int tc_wait_link_training(struct tc_data *tc) return ret; } - tc_read(DP0_LTSTAT, &value); + ret = regmap_read(tc->regmap, DP0_LTSTAT, &value); + if (ret) + return ret; return (value >> 8) & 0x7; -err: - return ret; } static int tc_main_link_enable(struct tc_data *tc) @@ -818,15 +858,25 @@ static int tc_main_link_enable(struct tc_data *tc) dev_dbg(tc->dev, "link enable\n"); - tc_read(DP0CTL, &value); - if (WARN_ON(value & DP_EN)) - tc_write(DP0CTL, 0); + ret = regmap_read(tc->regmap, DP0CTL, &value); + if (ret) + return ret; + + if (WARN_ON(value & DP_EN)) { + ret = regmap_write(tc->regmap, DP0CTL, 0); + if (ret) + return ret; + } - tc_write(DP0_SRCCTRL, tc_srcctrl(tc)); + ret = regmap_write(tc->regmap, DP0_SRCCTRL, tc_srcctrl(tc)); + if (ret) + return ret; /* SSCG and BW27 on DP1 must be set to the same as on DP0 */ - tc_write(DP1_SRCCTRL, + ret = regmap_write(tc->regmap, DP1_SRCCTRL, (tc->link.spread ? DP0_SRCCTRL_SSCG : 0) | ((tc->link.base.rate != 162000) ? DP0_SRCCTRL_BW27 : 0)); + if (ret) + return ret; rate = clk_get_rate(tc->refclk); switch (rate) { @@ -846,27 +896,36 @@ static int tc_main_link_enable(struct tc_data *tc) return -EINVAL; } value |= SYSCLK_SEL_LSCLK | LSCLK_DIV_2; - tc_write(SYS_PLLPARAM, value); + ret = regmap_write(tc->regmap, SYS_PLLPARAM, value); + if (ret) + return ret; /* Setup Main Link */ dp_phy_ctrl = BGREN | PWR_SW_EN | PHY_A0_EN | PHY_M0_EN; if (tc->link.base.num_lanes == 2) dp_phy_ctrl |= PHY_2LANE; - tc_write(DP_PHY_CTRL, dp_phy_ctrl); + + ret = regmap_write(tc->regmap, DP_PHY_CTRL, dp_phy_ctrl); + if (ret) + return ret; /* PLL setup */ - tc_write(DP0_PLLCTRL, PLLUPDATE | PLLEN); + ret = regmap_write(tc->regmap, DP0_PLLCTRL, PLLUPDATE | PLLEN); + if (ret) + return ret; tc_wait_pll_lock(tc); - tc_write(DP1_PLLCTRL, PLLUPDATE | PLLEN); + ret = regmap_write(tc->regmap, DP1_PLLCTRL, PLLUPDATE | PLLEN); + if (ret) + return ret; tc_wait_pll_lock(tc); /* Reset/Enable Main Links */ dp_phy_ctrl |= DP_PHY_RST | PHY_M1_RST | PHY_M0_RST; - tc_write(DP_PHY_CTRL, dp_phy_ctrl); + ret = regmap_write(tc->regmap, DP_PHY_CTRL, dp_phy_ctrl); usleep_range(100, 200); dp_phy_ctrl &= ~(DP_PHY_RST | PHY_M1_RST | PHY_M0_RST); - tc_write(DP_PHY_CTRL, dp_phy_ctrl); + ret = regmap_write(tc->regmap, DP_PHY_CTRL, dp_phy_ctrl); ret = tc_poll_timeout(tc, DP_PHY_CTRL, PHY_RDY, PHY_RDY, 1, 1000); if (ret) { @@ -877,7 +936,7 @@ static int tc_main_link_enable(struct tc_data *tc) /* Set misc: 8 bits per color */ ret = regmap_update_bits(tc->regmap, DP0_MISC, BPC_8, BPC_8); if (ret) - goto err; + return ret; /* * ASSR mode @@ -930,53 +989,71 @@ static int tc_main_link_enable(struct tc_data *tc) /* Clock-Recovery */ /* Set DPCD 0x102 for Training Pattern 1 */ - tc_write(DP0_SNKLTCTRL, DP_LINK_SCRAMBLING_DISABLE | - DP_TRAINING_PATTERN_1); + ret = regmap_write(tc->regmap, DP0_SNKLTCTRL, + DP_LINK_SCRAMBLING_DISABLE | + DP_TRAINING_PATTERN_1); + if (ret) + return ret; - tc_write(DP0_LTLOOPCTRL, - (15 << 28) | /* Defer Iteration Count */ - (15 << 24) | /* Loop Iteration Count */ - (0xd << 0)); /* Loop Timer Delay */ + ret = regmap_write(tc->regmap, DP0_LTLOOPCTRL, + (15 << 28) | /* Defer Iteration Count */ + (15 << 24) | /* Loop Iteration Count */ + (0xd << 0)); /* Loop Timer Delay */ + if (ret) + return ret; - tc_write(DP0_SRCCTRL, tc_srcctrl(tc) | DP0_SRCCTRL_SCRMBLDIS | - DP0_SRCCTRL_AUTOCORRECT | DP0_SRCCTRL_TP1); + ret = regmap_write(tc->regmap, DP0_SRCCTRL, + tc_srcctrl(tc) | DP0_SRCCTRL_SCRMBLDIS | + DP0_SRCCTRL_AUTOCORRECT | + DP0_SRCCTRL_TP1); + if (ret) + return ret; /* Enable DP0 to start Link Training */ - tc_write(DP0CTL, - ((tc->link.base.capabilities & DP_LINK_CAP_ENHANCED_FRAMING) ? EF_EN : 0) | - DP_EN); + ret = regmap_write(tc->regmap, DP0CTL, + ((tc->link.base.capabilities & + DP_LINK_CAP_ENHANCED_FRAMING) ? EF_EN : 0) | + DP_EN); + if (ret) + return ret; /* wait */ + ret = tc_wait_link_training(tc); if (ret < 0) - goto err; + return ret; if (ret) { dev_err(tc->dev, "Link training phase 1 failed: %s\n", training_pattern1_errors[ret]); - ret = -ENODEV; - goto err; + return -ENODEV; } /* Channel Equalization */ /* Set DPCD 0x102 for Training Pattern 2 */ - tc_write(DP0_SNKLTCTRL, DP_LINK_SCRAMBLING_DISABLE | - DP_TRAINING_PATTERN_2); + ret = regmap_write(tc->regmap, DP0_SNKLTCTRL, + DP_LINK_SCRAMBLING_DISABLE | + DP_TRAINING_PATTERN_2); + if (ret) + return ret; - tc_write(DP0_SRCCTRL, tc_srcctrl(tc) | DP0_SRCCTRL_SCRMBLDIS | - DP0_SRCCTRL_AUTOCORRECT | DP0_SRCCTRL_TP2); + ret = regmap_write(tc->regmap, DP0_SRCCTRL, + tc_srcctrl(tc) | DP0_SRCCTRL_SCRMBLDIS | + DP0_SRCCTRL_AUTOCORRECT | + DP0_SRCCTRL_TP2); + if (ret) + return ret; /* wait */ ret = tc_wait_link_training(tc); if (ret < 0) - goto err; + return ret; if (ret) { dev_err(tc->dev, "Link training phase 2 failed: %s\n", training_pattern2_errors[ret]); - ret = -ENODEV; - goto err; + return -ENODEV; } /* @@ -989,7 +1066,10 @@ static int tc_main_link_enable(struct tc_data *tc) */ /* Clear Training Pattern, set AutoCorrect Mode = 1 */ - tc_write(DP0_SRCCTRL, tc_srcctrl(tc) | DP0_SRCCTRL_AUTOCORRECT); + ret = regmap_write(tc->regmap, DP0_SRCCTRL, tc_srcctrl(tc) | + DP0_SRCCTRL_AUTOCORRECT); + if (ret) + return ret; /* Clear DPCD 0x102 */ /* Note: Can Not use DP0_SNKLTCTRL (0x06E4) short cut */ @@ -1033,7 +1113,7 @@ static int tc_main_link_enable(struct tc_data *tc) dev_err(dev, "0x0205 SINK_STATUS: 0x%02x\n", tmp[3]); dev_err(dev, "0x0206 ADJUST_REQUEST_LANE0_1: 0x%02x\n", tmp[4]); dev_err(dev, "0x0207 ADJUST_REQUEST_LANE2_3: 0x%02x\n", tmp[5]); - goto err; + return ret; } return 0; @@ -1042,7 +1122,6 @@ err_dpcd_read: return ret; err_dpcd_write: dev_err(tc->dev, "Failed to write DPCD: %d\n", ret); -err: return ret; } @@ -1052,12 +1131,11 @@ static int tc_main_link_disable(struct tc_data *tc) dev_dbg(tc->dev, "link disable\n"); - tc_write(DP0_SRCCTRL, 0); - tc_write(DP0CTL, 0); + ret = regmap_write(tc->regmap, DP0_SRCCTRL, 0); + if (ret) + return ret; - return 0; -err: - return ret; + return regmap_write(tc->regmap, DP0CTL, 0); } static int tc_stream_enable(struct tc_data *tc) @@ -1072,7 +1150,7 @@ static int tc_stream_enable(struct tc_data *tc) ret = tc_pxl_pll_en(tc, clk_get_rate(tc->refclk), 1000 * tc->mode.clock); if (ret) - goto err; + return ret; } ret = tc_set_video_mode(tc, &tc->mode); @@ -1087,7 +1165,9 @@ static int tc_stream_enable(struct tc_data *tc) value = VID_MN_GEN | DP_EN; if (tc->link.base.capabilities & DP_LINK_CAP_ENHANCED_FRAMING) value |= EF_EN; - tc_write(DP0CTL, value); + ret = regmap_write(tc->regmap, DP0CTL, value); + if (ret) + return ret; /* * VID_EN assertion should be delayed by at least N * LSCLK * cycles from the time VID_MN_GEN is enabled in order to @@ -1097,36 +1177,35 @@ static int tc_stream_enable(struct tc_data *tc) */ usleep_range(500, 1000); value |= VID_EN; - tc_write(DP0CTL, value); + ret = regmap_write(tc->regmap, DP0CTL, value); + if (ret) + return ret; /* Set input interface */ value = DP0_AUDSRC_NO_INPUT; if (tc_test_pattern) value |= DP0_VIDSRC_COLOR_BAR; else value |= DP0_VIDSRC_DPI_RX; - tc_write(SYSCTRL, value); + ret = regmap_write(tc->regmap, SYSCTRL, value); + if (ret) + return ret; return 0; -err: - return ret; } static int tc_stream_disable(struct tc_data *tc) { int ret; - u32 val; dev_dbg(tc->dev, "disable video stream\n"); - tc_read(DP0CTL, &val); - val &= ~VID_EN; - tc_write(DP0CTL, val); + ret = regmap_update_bits(tc->regmap, DP0CTL, VID_EN, 0); + if (ret) + return ret; tc_pxl_pll_dis(tc); return 0; -err: - return ret; } static void tc_bridge_pre_enable(struct drm_bridge *bridge) @@ -1278,7 +1357,9 @@ static enum drm_connector_status tc_connector_detect(struct drm_connector *conne return connector_status_unknown; } - tc_read(GPIOI, &val); + ret = regmap_read(tc->regmap, GPIOI, &val); + if (ret) + return connector_status_unknown; conn = val & BIT(tc->hpd_pin); @@ -1286,9 +1367,6 @@ static enum drm_connector_status tc_connector_detect(struct drm_connector *conne return connector_status_connected; else return connector_status_disconnected; - -err: - return connector_status_unknown; } static const struct drm_connector_funcs tc_connector_funcs = { -- cgit v1.2.3-59-g8ed1b From 53b166dca5feb96859cd235131b96b426ca1c998 Mon Sep 17 00:00:00 2001 From: Andrey Smirnov Date: Tue, 18 Jun 2019 22:27:07 -0700 Subject: drm/bridge: tc358767: Simplify AUX data read Simplify AUX data read by removing index arithmetic and shifting with a helper function that does two things: 1. Fetch data from up to 4 32-bit registers from the chip 2. Copy read data into user provided array. Signed-off-by: Andrey Smirnov Reviewed-by: Andrzej Hajda Reviewed-by: Tomi Valkeinen Cc: Andrzej Hajda Cc: Laurent Pinchart Cc: Tomi Valkeinen Cc: Andrey Gusakov Cc: Philipp Zabel Cc: Cory Tusar Cc: Chris Healy Cc: Lucas Stach Cc: dri-devel@lists.freedesktop.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Andrzej Hajda Link: https://patchwork.freedesktop.org/patch/msgid/20190619052716.16831-7-andrew.smirnov@gmail.com --- drivers/gpu/drm/bridge/tc358767.c | 31 ++++++++++++++++++------------- 1 file changed, 18 insertions(+), 13 deletions(-) (limited to 'drivers/gpu/drm/bridge/tc358767.c') diff --git a/drivers/gpu/drm/bridge/tc358767.c b/drivers/gpu/drm/bridge/tc358767.c index 1b0ca1de2eae..86ec5bec73c2 100644 --- a/drivers/gpu/drm/bridge/tc358767.c +++ b/drivers/gpu/drm/bridge/tc358767.c @@ -312,6 +312,20 @@ static int tc_aux_get_status(struct tc_data *tc, u8 *reply) return 0; } +static int tc_aux_read_data(struct tc_data *tc, void *data, size_t size) +{ + u32 auxrdata[DP_AUX_MAX_PAYLOAD_BYTES / sizeof(u32)]; + int ret, count = ALIGN(size, sizeof(u32)); + + ret = regmap_raw_read(tc->regmap, DP0_AUXRDATA(0), auxrdata, count); + if (ret) + return ret; + + memcpy(data, auxrdata, size); + + return size; +} + static ssize_t tc_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg) { @@ -370,19 +384,10 @@ static ssize_t tc_aux_transfer(struct drm_dp_aux *aux, if (ret) return ret; - if (request == DP_AUX_I2C_READ || request == DP_AUX_NATIVE_READ) { - /* Read data */ - while (i < size) { - if ((i % 4) == 0) { - ret = regmap_read(tc->regmap, - DP0_AUXRDATA(i >> 2), &tmp); - if (ret) - return ret; - } - buf[i] = tmp & 0xff; - tmp = tmp >> 8; - i++; - } + switch (request) { + case DP_AUX_NATIVE_READ: + case DP_AUX_I2C_READ: + return tc_aux_read_data(tc, msg->buffer, size); } return size; -- cgit v1.2.3-59-g8ed1b From 792a081a1b8e819898c506ea1b454ce6bcf3ba1b Mon Sep 17 00:00:00 2001 From: Andrey Smirnov Date: Tue, 18 Jun 2019 22:27:08 -0700 Subject: drm/bridge: tc358767: Simplify AUX data write Simplify AUX data write by dropping index arithmetic and shifting and replacing it with a call to a helper function that does two things: 1. Copies user-provided data into a write buffer 2. Transfers contents of the write buffer to up to 4 32-bit registers on the chip Note that separate data endianness fix: tmp = (tmp << 8) | buf[i]; that was reserved for DP_AUX_I2C_WRITE looks really strange, since it will place data differently depending on the passed user-data size. E.g. for a write of 1 byte, data transferred to the chip would look like: [byte0] [dummy1] [dummy2] [dummy3] whereas for a write of 4 bytes we'd get: [byte3] [byte2] [byte1] [byte0] Since there's no indication in the datasheet that I2C write buffer should be treated differently than AUX write buffer and no comment in the original code explaining why it was done this way, that special I2C write buffer transformation was dropped in this patch. Signed-off-by: Andrey Smirnov Reviewed-by: Andrzej Hajda Reviewed-by: Tomi Valkeinen Cc: Andrzej Hajda Cc: Laurent Pinchart Cc: Tomi Valkeinen Cc: Andrey Gusakov Cc: Philipp Zabel Cc: Cory Tusar Cc: Chris Healy Cc: Lucas Stach Cc: dri-devel@lists.freedesktop.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Andrzej Hajda Link: https://patchwork.freedesktop.org/patch/msgid/20190619052716.16831-8-andrew.smirnov@gmail.com --- drivers/gpu/drm/bridge/tc358767.c | 48 +++++++++++++++++++++------------------ 1 file changed, 26 insertions(+), 22 deletions(-) (limited to 'drivers/gpu/drm/bridge/tc358767.c') diff --git a/drivers/gpu/drm/bridge/tc358767.c b/drivers/gpu/drm/bridge/tc358767.c index 86ec5bec73c2..76e810d62253 100644 --- a/drivers/gpu/drm/bridge/tc358767.c +++ b/drivers/gpu/drm/bridge/tc358767.c @@ -312,6 +312,21 @@ static int tc_aux_get_status(struct tc_data *tc, u8 *reply) return 0; } +static int tc_aux_write_data(struct tc_data *tc, const void *data, + size_t size) +{ + u32 auxwdata[DP_AUX_MAX_PAYLOAD_BYTES / sizeof(u32)] = { 0 }; + int ret, count = ALIGN(size, sizeof(u32)); + + memcpy(auxwdata, data, size); + + ret = regmap_raw_write(tc->regmap, DP0_AUXWDATA(0), auxwdata, count); + if (ret) + return ret; + + return size; +} + static int tc_aux_read_data(struct tc_data *tc, void *data, size_t size) { u32 auxrdata[DP_AUX_MAX_PAYLOAD_BYTES / sizeof(u32)]; @@ -332,9 +347,6 @@ static ssize_t tc_aux_transfer(struct drm_dp_aux *aux, struct tc_data *tc = aux_to_tc(aux); size_t size = min_t(size_t, 8, msg->size); u8 request = msg->request & ~DP_AUX_I2C_MOT; - u8 *buf = msg->buffer; - u32 tmp = 0; - int i = 0; int ret; if (size == 0) @@ -344,25 +356,17 @@ static ssize_t tc_aux_transfer(struct drm_dp_aux *aux, if (ret) return ret; - if (request == DP_AUX_I2C_WRITE || request == DP_AUX_NATIVE_WRITE) { - /* Store data */ - while (i < size) { - if (request == DP_AUX_NATIVE_WRITE) - tmp = tmp | (buf[i] << (8 * (i & 0x3))); - else - tmp = (tmp << 8) | buf[i]; - i++; - if (((i % 4) == 0) || (i == size)) { - ret = regmap_write(tc->regmap, - DP0_AUXWDATA((i - 1) >> 2), - tmp); - if (ret) - return ret; - tmp = 0; - } - } - } else if (request != DP_AUX_I2C_READ && - request != DP_AUX_NATIVE_READ) { + switch (request) { + case DP_AUX_NATIVE_READ: + case DP_AUX_I2C_READ: + break; + case DP_AUX_NATIVE_WRITE: + case DP_AUX_I2C_WRITE: + ret = tc_aux_write_data(tc, msg->buffer, size); + if (ret < 0) + return ret; + break; + default: return -EINVAL; } -- cgit v1.2.3-59-g8ed1b From e0655feaec62d5139b6b13a7b1bbb1ab8f1c2d83 Mon Sep 17 00:00:00 2001 From: Andrey Smirnov Date: Tue, 18 Jun 2019 22:27:09 -0700 Subject: drm/bridge: tc358767: Increase AUX transfer length limit According to the datasheet tc358767 can transfer up to 16 bytes via its AUX channel, so the artificial limit of 8 appears to be too low. However only up to 15-bytes seem to be actually supported and trying to use 16-byte transfers results in transfers failing sporadically (with bogus status in case of I2C transfers), so limit it to 15. Signed-off-by: Andrey Smirnov Reviewed-by: Andrzej Hajda Reviewed-by: Tomi Valkeinen Cc: Andrzej Hajda Cc: Laurent Pinchart Cc: Tomi Valkeinen Cc: Andrey Gusakov Cc: Philipp Zabel Cc: Cory Tusar Cc: Chris Healy Cc: Lucas Stach Cc: dri-devel@lists.freedesktop.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Andrzej Hajda Link: https://patchwork.freedesktop.org/patch/msgid/20190619052716.16831-9-andrew.smirnov@gmail.com --- drivers/gpu/drm/bridge/tc358767.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/gpu/drm/bridge/tc358767.c') diff --git a/drivers/gpu/drm/bridge/tc358767.c b/drivers/gpu/drm/bridge/tc358767.c index 76e810d62253..0457ca4508c4 100644 --- a/drivers/gpu/drm/bridge/tc358767.c +++ b/drivers/gpu/drm/bridge/tc358767.c @@ -345,7 +345,7 @@ static ssize_t tc_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg) { struct tc_data *tc = aux_to_tc(aux); - size_t size = min_t(size_t, 8, msg->size); + size_t size = min_t(size_t, DP_AUX_MAX_PAYLOAD_BYTES - 1, msg->size); u8 request = msg->request & ~DP_AUX_I2C_MOT; int ret; -- cgit v1.2.3-59-g8ed1b From 12dfe7c4d9c53442efcb4113cff505f60d654906 Mon Sep 17 00:00:00 2001 From: Andrey Smirnov Date: Tue, 18 Jun 2019 22:27:10 -0700 Subject: drm/bridge: tc358767: Use reported AUX transfer size Don't assume that requested data transfer size is the same as amount of data that was transferred. Change the code to get that information from DP0_AUXSTATUS instead. Since the check for AUX_BUSY in tc_aux_get_status() is pointless (it will always called after tc_aux_wait_busy()) and there's only one user of it, inline its code into tc_aux_transfer() instead of trying to accommodate the change above. Signed-off-by: Andrey Smirnov Reviewed-by: Andrzej Hajda Reviewed-by: Tomi Valkeinen Cc: Andrzej Hajda Cc: Laurent Pinchart Cc: Tomi Valkeinen Cc: Andrey Gusakov Cc: Philipp Zabel Cc: Cory Tusar Cc: Chris Healy Cc: Lucas Stach Cc: dri-devel@lists.freedesktop.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Andrzej Hajda Link: https://patchwork.freedesktop.org/patch/msgid/20190619052716.16831-10-andrew.smirnov@gmail.com --- drivers/gpu/drm/bridge/tc358767.c | 40 ++++++++++++--------------------------- 1 file changed, 12 insertions(+), 28 deletions(-) (limited to 'drivers/gpu/drm/bridge/tc358767.c') diff --git a/drivers/gpu/drm/bridge/tc358767.c b/drivers/gpu/drm/bridge/tc358767.c index 0457ca4508c4..b60cd3607f4f 100644 --- a/drivers/gpu/drm/bridge/tc358767.c +++ b/drivers/gpu/drm/bridge/tc358767.c @@ -143,10 +143,10 @@ #define DP0_AUXWDATA(i) (0x066c + (i) * 4) #define DP0_AUXRDATA(i) (0x067c + (i) * 4) #define DP0_AUXSTATUS 0x068c -#define AUX_STATUS_MASK 0xf0 -#define AUX_STATUS_SHIFT 4 -#define AUX_TIMEOUT BIT(1) -#define AUX_BUSY BIT(0) +#define AUX_BYTES GENMASK(15, 8) +#define AUX_STATUS GENMASK(7, 4) +#define AUX_TIMEOUT BIT(1) +#define AUX_BUSY BIT(0) #define DP0_AUXI2CADR 0x0698 /* Link Training */ @@ -289,29 +289,6 @@ static int tc_aux_wait_busy(struct tc_data *tc, unsigned int timeout_ms) 1000, 1000 * timeout_ms); } -static int tc_aux_get_status(struct tc_data *tc, u8 *reply) -{ - int ret; - u32 value; - - ret = regmap_read(tc->regmap, DP0_AUXSTATUS, &value); - if (ret < 0) - return ret; - - if (value & AUX_BUSY) { - dev_err(tc->dev, "aux busy!\n"); - return -EBUSY; - } - - if (value & AUX_TIMEOUT) { - dev_err(tc->dev, "aux access timeout!\n"); - return -ETIMEDOUT; - } - - *reply = (value & AUX_STATUS_MASK) >> AUX_STATUS_SHIFT; - return 0; -} - static int tc_aux_write_data(struct tc_data *tc, const void *data, size_t size) { @@ -347,6 +324,7 @@ static ssize_t tc_aux_transfer(struct drm_dp_aux *aux, struct tc_data *tc = aux_to_tc(aux); size_t size = min_t(size_t, DP_AUX_MAX_PAYLOAD_BYTES - 1, msg->size); u8 request = msg->request & ~DP_AUX_I2C_MOT; + u32 auxstatus; int ret; if (size == 0) @@ -384,10 +362,16 @@ static ssize_t tc_aux_transfer(struct drm_dp_aux *aux, if (ret) return ret; - ret = tc_aux_get_status(tc, &msg->reply); + ret = regmap_read(tc->regmap, DP0_AUXSTATUS, &auxstatus); if (ret) return ret; + if (auxstatus & AUX_TIMEOUT) + return -ETIMEDOUT; + + size = FIELD_GET(AUX_BYTES, auxstatus); + msg->reply = FIELD_GET(AUX_STATUS, auxstatus); + switch (request) { case DP_AUX_NATIVE_READ: case DP_AUX_I2C_READ: -- cgit v1.2.3-59-g8ed1b From c49f60dfbf91ead366a7650ca7fb2bbf8fe4a4a0 Mon Sep 17 00:00:00 2001 From: Andrey Smirnov Date: Tue, 18 Jun 2019 22:27:11 -0700 Subject: drm/bridge: tc358767: Introduce tc_set_syspllparam() Move common code converting clock rate to an appropriate constant and configuring SYS_PLLPARAM register into a separate routine and convert the rest of the code to use it. No functional change intended. Signed-off-by: Andrey Smirnov Reviewed-by: Laurent Pinchart Reviewed-by: Andrzej Hajda Reviewed-by: Tomi Valkeinen Cc: Andrzej Hajda Cc: Laurent Pinchart Cc: Tomi Valkeinen Cc: Andrey Gusakov Cc: Philipp Zabel Cc: Chris Healy Cc: Cory Tusar Cc: Lucas Stach Cc: dri-devel@lists.freedesktop.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Andrzej Hajda Link: https://patchwork.freedesktop.org/patch/msgid/20190619052716.16831-11-andrew.smirnov@gmail.com --- drivers/gpu/drm/bridge/tc358767.c | 46 ++++++++++++++------------------------- 1 file changed, 16 insertions(+), 30 deletions(-) (limited to 'drivers/gpu/drm/bridge/tc358767.c') diff --git a/drivers/gpu/drm/bridge/tc358767.c b/drivers/gpu/drm/bridge/tc358767.c index b60cd3607f4f..40dea1b5e28a 100644 --- a/drivers/gpu/drm/bridge/tc358767.c +++ b/drivers/gpu/drm/bridge/tc358767.c @@ -556,35 +556,40 @@ static int tc_stream_clock_calc(struct tc_data *tc) return regmap_write(tc->regmap, DP0_VIDMNGEN1, 32768); } -static int tc_aux_link_setup(struct tc_data *tc) +static int tc_set_syspllparam(struct tc_data *tc) { unsigned long rate; - u32 dp0_auxcfg1; - u32 value; - int ret; + u32 pllparam = SYSCLK_SEL_LSCLK | LSCLK_DIV_2; rate = clk_get_rate(tc->refclk); switch (rate) { case 38400000: - value = REF_FREQ_38M4; + pllparam |= REF_FREQ_38M4; break; case 26000000: - value = REF_FREQ_26M; + pllparam |= REF_FREQ_26M; break; case 19200000: - value = REF_FREQ_19M2; + pllparam |= REF_FREQ_19M2; break; case 13000000: - value = REF_FREQ_13M; + pllparam |= REF_FREQ_13M; break; default: dev_err(tc->dev, "Invalid refclk rate: %lu Hz\n", rate); return -EINVAL; } + return regmap_write(tc->regmap, SYS_PLLPARAM, pllparam); +} + +static int tc_aux_link_setup(struct tc_data *tc) +{ + int ret; + u32 dp0_auxcfg1; + /* Setup DP-PHY / PLL */ - value |= SYSCLK_SEL_LSCLK | LSCLK_DIV_2; - ret = regmap_write(tc->regmap, SYS_PLLPARAM, value); + ret = tc_set_syspllparam(tc); if (ret) goto err; @@ -843,7 +848,6 @@ static int tc_main_link_enable(struct tc_data *tc) { struct drm_dp_aux *aux = &tc->aux; struct device *dev = tc->dev; - unsigned int rate; u32 dp_phy_ctrl; u32 value; int ret; @@ -871,25 +875,7 @@ static int tc_main_link_enable(struct tc_data *tc) if (ret) return ret; - rate = clk_get_rate(tc->refclk); - switch (rate) { - case 38400000: - value = REF_FREQ_38M4; - break; - case 26000000: - value = REF_FREQ_26M; - break; - case 19200000: - value = REF_FREQ_19M2; - break; - case 13000000: - value = REF_FREQ_13M; - break; - default: - return -EINVAL; - } - value |= SYSCLK_SEL_LSCLK | LSCLK_DIV_2; - ret = regmap_write(tc->regmap, SYS_PLLPARAM, value); + ret = tc_set_syspllparam(tc); if (ret) return ret; -- cgit v1.2.3-59-g8ed1b From 134fb306b1d8af36d586a08b2f0562b5d30bfab9 Mon Sep 17 00:00:00 2001 From: Andrey Smirnov Date: Tue, 18 Jun 2019 22:27:12 -0700 Subject: drm/bridge: tc358767: Introduce tc_pllupdate() tc_wait_pll_lock() is always called as a follow-up for updating PLLUPDATE and PLLEN bit of a given PLL control register. To simplify things, merge the two operation into a single helper function tc_pllupdate() and convert the rest of the code to use it. No functional change intended. Signed-off-by: Andrey Smirnov Reviewed-by: Laurent Pinchart Reviewed-by: Andrzej Hajda Reviewed-by: Tomi Valkeinen Cc: Andrzej Hajda Cc: Laurent Pinchart Cc: Tomi Valkeinen Cc: Andrey Gusakov Cc: Philipp Zabel Cc: Cory Tusar Cc: Chris Healy Cc: Lucas Stach Cc: dri-devel@lists.freedesktop.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Andrzej Hajda Link: https://patchwork.freedesktop.org/patch/msgid/20190619052716.16831-12-andrew.smirnov@gmail.com --- drivers/gpu/drm/bridge/tc358767.c | 30 ++++++++++++++---------------- 1 file changed, 14 insertions(+), 16 deletions(-) (limited to 'drivers/gpu/drm/bridge/tc358767.c') diff --git a/drivers/gpu/drm/bridge/tc358767.c b/drivers/gpu/drm/bridge/tc358767.c index 40dea1b5e28a..45181e5cb6ca 100644 --- a/drivers/gpu/drm/bridge/tc358767.c +++ b/drivers/gpu/drm/bridge/tc358767.c @@ -418,10 +418,18 @@ static u32 tc_srcctrl(struct tc_data *tc) return reg; } -static void tc_wait_pll_lock(struct tc_data *tc) +static int tc_pllupdate(struct tc_data *tc, unsigned int pllctrl) { + int ret; + + ret = regmap_write(tc->regmap, pllctrl, PLLUPDATE | PLLEN); + if (ret) + return ret; + /* Wait for PLL to lock: up to 2.09 ms, depending on refclk */ usleep_range(3000, 6000); + + return 0; } static int tc_pxl_pll_en(struct tc_data *tc, u32 refclk, u32 pixelclock) @@ -521,13 +529,7 @@ static int tc_pxl_pll_en(struct tc_data *tc, u32 refclk, u32 pixelclock) return ret; /* Force PLL parameter update and disable bypass */ - ret = regmap_write(tc->regmap, PXL_PLLCTRL, PLLUPDATE | PLLEN); - if (ret) - return ret; - - tc_wait_pll_lock(tc); - - return 0; + return tc_pllupdate(tc, PXL_PLLCTRL); } static int tc_pxl_pll_dis(struct tc_data *tc) @@ -601,15 +603,13 @@ static int tc_aux_link_setup(struct tc_data *tc) * Initially PLLs are in bypass. Force PLL parameter update, * disable PLL bypass, enable PLL */ - ret = regmap_write(tc->regmap, DP0_PLLCTRL, PLLUPDATE | PLLEN); + ret = tc_pllupdate(tc, DP0_PLLCTRL); if (ret) goto err; - tc_wait_pll_lock(tc); - ret = regmap_write(tc->regmap, DP1_PLLCTRL, PLLUPDATE | PLLEN); + ret = tc_pllupdate(tc, DP1_PLLCTRL); if (ret) goto err; - tc_wait_pll_lock(tc); ret = tc_poll_timeout(tc, DP_PHY_CTRL, PHY_RDY, PHY_RDY, 1, 1000); if (ret == -ETIMEDOUT) { @@ -889,15 +889,13 @@ static int tc_main_link_enable(struct tc_data *tc) return ret; /* PLL setup */ - ret = regmap_write(tc->regmap, DP0_PLLCTRL, PLLUPDATE | PLLEN); + ret = tc_pllupdate(tc, DP0_PLLCTRL); if (ret) return ret; - tc_wait_pll_lock(tc); - ret = regmap_write(tc->regmap, DP1_PLLCTRL, PLLUPDATE | PLLEN); + ret = tc_pllupdate(tc, DP1_PLLCTRL); if (ret) return ret; - tc_wait_pll_lock(tc); /* Reset/Enable Main Links */ dp_phy_ctrl |= DP_PHY_RST | PHY_M1_RST | PHY_M0_RST; -- cgit v1.2.3-59-g8ed1b From 7264892648bac9c1a5f20505a569abf85370b7c4 Mon Sep 17 00:00:00 2001 From: Andrey Smirnov Date: Tue, 18 Jun 2019 22:27:13 -0700 Subject: drm/bridge: tc358767: Simplify tc_aux_wait_busy() We never pass anything but 100 as timeout_ms to tc_aux_wait_busy(), so we may as well hardcode that value and simplify function's signature. Signed-off-by: Andrey Smirnov Reviewed-by: Andrzej Hajda Reviewed-by: Tomi Valkeinen Cc: Andrzej Hajda Cc: Laurent Pinchart Cc: Tomi Valkeinen Cc: Andrey Gusakov Cc: Philipp Zabel Cc: Cory Tusar Cc: Chris Healy Cc: Lucas Stach Cc: dri-devel@lists.freedesktop.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Andrzej Hajda Link: https://patchwork.freedesktop.org/patch/msgid/20190619052716.16831-13-andrew.smirnov@gmail.com --- drivers/gpu/drm/bridge/tc358767.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) (limited to 'drivers/gpu/drm/bridge/tc358767.c') diff --git a/drivers/gpu/drm/bridge/tc358767.c b/drivers/gpu/drm/bridge/tc358767.c index 45181e5cb6ca..643935027638 100644 --- a/drivers/gpu/drm/bridge/tc358767.c +++ b/drivers/gpu/drm/bridge/tc358767.c @@ -283,10 +283,9 @@ static inline int tc_poll_timeout(struct tc_data *tc, unsigned int addr, sleep_us, timeout_us); } -static int tc_aux_wait_busy(struct tc_data *tc, unsigned int timeout_ms) +static int tc_aux_wait_busy(struct tc_data *tc) { - return tc_poll_timeout(tc, DP0_AUXSTATUS, AUX_BUSY, 0, - 1000, 1000 * timeout_ms); + return tc_poll_timeout(tc, DP0_AUXSTATUS, AUX_BUSY, 0, 1000, 100000); } static int tc_aux_write_data(struct tc_data *tc, const void *data, @@ -330,7 +329,7 @@ static ssize_t tc_aux_transfer(struct drm_dp_aux *aux, if (size == 0) return 0; - ret = tc_aux_wait_busy(tc, 100); + ret = tc_aux_wait_busy(tc); if (ret) return ret; @@ -358,7 +357,7 @@ static ssize_t tc_aux_transfer(struct drm_dp_aux *aux, if (ret) return ret; - ret = tc_aux_wait_busy(tc, 100); + ret = tc_aux_wait_busy(tc); if (ret) return ret; -- cgit v1.2.3-59-g8ed1b From d174db0788b437d83b7fed4531dbe8ace2c0b2a8 Mon Sep 17 00:00:00 2001 From: Andrey Smirnov Date: Tue, 18 Jun 2019 22:27:14 -0700 Subject: drm/bridge: tc358767: Drop unnecessary 8 byte buffer tc_get_display_props() never reads more than a byte via AUX, so there's no need to reserve 8 for that purpose. No function change intended. Signed-off-by: Andrey Smirnov Reviewed-by: Andrzej Hajda Reviewed-by: Tomi Valkeinen Cc: Andrzej Hajda Cc: Laurent Pinchart Cc: Tomi Valkeinen Cc: Andrey Gusakov Cc: Philipp Zabel Cc: Cory Tusar Cc: Chris Healy Cc: Lucas Stach Cc: dri-devel@lists.freedesktop.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Andrzej Hajda Link: https://patchwork.freedesktop.org/patch/msgid/20190619052716.16831-14-andrew.smirnov@gmail.com --- drivers/gpu/drm/bridge/tc358767.c | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) (limited to 'drivers/gpu/drm/bridge/tc358767.c') diff --git a/drivers/gpu/drm/bridge/tc358767.c b/drivers/gpu/drm/bridge/tc358767.c index 643935027638..af14c7cd12e2 100644 --- a/drivers/gpu/drm/bridge/tc358767.c +++ b/drivers/gpu/drm/bridge/tc358767.c @@ -636,8 +636,7 @@ err: static int tc_get_display_props(struct tc_data *tc) { int ret; - /* temp buffer */ - u8 tmp[8]; + u8 reg; /* Read DP Rx Link Capability */ ret = drm_dp_link_probe(&tc->aux, &tc->link.base); @@ -653,21 +652,21 @@ static int tc_get_display_props(struct tc_data *tc) tc->link.base.num_lanes = 2; } - ret = drm_dp_dpcd_readb(&tc->aux, DP_MAX_DOWNSPREAD, tmp); + ret = drm_dp_dpcd_readb(&tc->aux, DP_MAX_DOWNSPREAD, ®); if (ret < 0) goto err_dpcd_read; - tc->link.spread = tmp[0] & DP_MAX_DOWNSPREAD_0_5; + tc->link.spread = reg & DP_MAX_DOWNSPREAD_0_5; - ret = drm_dp_dpcd_readb(&tc->aux, DP_MAIN_LINK_CHANNEL_CODING, tmp); + ret = drm_dp_dpcd_readb(&tc->aux, DP_MAIN_LINK_CHANNEL_CODING, ®); if (ret < 0) goto err_dpcd_read; tc->link.scrambler_dis = false; /* read assr */ - ret = drm_dp_dpcd_readb(&tc->aux, DP_EDP_CONFIGURATION_SET, tmp); + ret = drm_dp_dpcd_readb(&tc->aux, DP_EDP_CONFIGURATION_SET, ®); if (ret < 0) goto err_dpcd_read; - tc->link.assr = tmp[0] & DP_ALTERNATE_SCRAMBLER_RESET_ENABLE; + tc->link.assr = reg & DP_ALTERNATE_SCRAMBLER_RESET_ENABLE; dev_dbg(tc->dev, "DPCD rev: %d.%d, rate: %s, lanes: %d, framing: %s\n", tc->link.base.revision >> 4, tc->link.base.revision & 0x0f, -- cgit v1.2.3-59-g8ed1b From 32d3621996aa70f4db9bbf862e400471eed81e34 Mon Sep 17 00:00:00 2001 From: Andrey Smirnov Date: Tue, 18 Jun 2019 22:27:15 -0700 Subject: drm/bridge: tc358767: Replace magic number in tc_main_link_enable() We don't need 8 byte array, DP_LINK_STATUS_SIZE (6) should be enough. This also gets rid of a magic number as a bonus. Signed-off-by: Andrey Smirnov Reviewed-by: Andrzej Hajda Reviewed-by: Tomi Valkeinen Cc: Andrzej Hajda Cc: Laurent Pinchart Cc: Tomi Valkeinen Cc: Andrey Gusakov Cc: Philipp Zabel Cc: Cory Tusar Cc: Chris Healy Cc: Lucas Stach Cc: dri-devel@lists.freedesktop.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Andrzej Hajda Link: https://patchwork.freedesktop.org/patch/msgid/20190619052716.16831-15-andrew.smirnov@gmail.com --- drivers/gpu/drm/bridge/tc358767.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/gpu/drm/bridge/tc358767.c') diff --git a/drivers/gpu/drm/bridge/tc358767.c b/drivers/gpu/drm/bridge/tc358767.c index af14c7cd12e2..38f15e740b70 100644 --- a/drivers/gpu/drm/bridge/tc358767.c +++ b/drivers/gpu/drm/bridge/tc358767.c @@ -849,7 +849,7 @@ static int tc_main_link_enable(struct tc_data *tc) u32 dp_phy_ctrl; u32 value; int ret; - u8 tmp[8]; + u8 tmp[DP_LINK_STATUS_SIZE]; dev_dbg(tc->dev, "link enable\n"); -- cgit v1.2.3-59-g8ed1b From fdb29b738017672069f95747c48eac947b9beba2 Mon Sep 17 00:00:00 2001 From: Andrey Smirnov Date: Tue, 18 Jun 2019 22:27:16 -0700 Subject: drm/bridge: tc358767: Add support for address-only I2C transfers Transfer size of zero means a request to do an address-only transfer. Since the HW support this, we probably shouldn't be just ignoring such requests. While at it allow DP_AUX_I2C_MOT flag to pass through, since it is supported by the HW as well. Signed-off-by: Andrey Smirnov Reviewed-by: Andrzej Hajda Reviewed-by: Tomi Valkeinen Cc: Andrzej Hajda Cc: Laurent Pinchart Cc: Tomi Valkeinen Cc: Andrey Gusakov Cc: Philipp Zabel Cc: Cory Tusar Cc: Chris Healy Cc: Lucas Stach Cc: dri-devel@lists.freedesktop.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Andrzej Hajda Link: https://patchwork.freedesktop.org/patch/msgid/20190619052716.16831-16-andrew.smirnov@gmail.com --- drivers/gpu/drm/bridge/tc358767.c | 42 +++++++++++++++++++++++++++++---------- 1 file changed, 31 insertions(+), 11 deletions(-) (limited to 'drivers/gpu/drm/bridge/tc358767.c') diff --git a/drivers/gpu/drm/bridge/tc358767.c b/drivers/gpu/drm/bridge/tc358767.c index 38f15e740b70..e1ce4954e6af 100644 --- a/drivers/gpu/drm/bridge/tc358767.c +++ b/drivers/gpu/drm/bridge/tc358767.c @@ -136,6 +136,8 @@ /* AUX channel */ #define DP0_AUXCFG0 0x0660 +#define DP0_AUXCFG0_BSIZE GENMASK(11, 8) +#define DP0_AUXCFG0_ADDR_ONLY BIT(4) #define DP0_AUXCFG1 0x0664 #define AUX_RX_FILTER_EN BIT(16) @@ -317,6 +319,18 @@ static int tc_aux_read_data(struct tc_data *tc, void *data, size_t size) return size; } +static u32 tc_auxcfg0(struct drm_dp_aux_msg *msg, size_t size) +{ + u32 auxcfg0 = msg->request; + + if (size) + auxcfg0 |= FIELD_PREP(DP0_AUXCFG0_BSIZE, size - 1); + else + auxcfg0 |= DP0_AUXCFG0_ADDR_ONLY; + + return auxcfg0; +} + static ssize_t tc_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg) { @@ -326,9 +340,6 @@ static ssize_t tc_aux_transfer(struct drm_dp_aux *aux, u32 auxstatus; int ret; - if (size == 0) - return 0; - ret = tc_aux_wait_busy(tc); if (ret) return ret; @@ -339,9 +350,11 @@ static ssize_t tc_aux_transfer(struct drm_dp_aux *aux, break; case DP_AUX_NATIVE_WRITE: case DP_AUX_I2C_WRITE: - ret = tc_aux_write_data(tc, msg->buffer, size); - if (ret < 0) - return ret; + if (size) { + ret = tc_aux_write_data(tc, msg->buffer, size); + if (ret < 0) + return ret; + } break; default: return -EINVAL; @@ -352,8 +365,7 @@ static ssize_t tc_aux_transfer(struct drm_dp_aux *aux, if (ret) return ret; /* Start transfer */ - ret = regmap_write(tc->regmap, DP0_AUXCFG0, - ((size - 1) << 8) | request); + ret = regmap_write(tc->regmap, DP0_AUXCFG0, tc_auxcfg0(msg, size)); if (ret) return ret; @@ -367,14 +379,22 @@ static ssize_t tc_aux_transfer(struct drm_dp_aux *aux, if (auxstatus & AUX_TIMEOUT) return -ETIMEDOUT; - - size = FIELD_GET(AUX_BYTES, auxstatus); + /* + * For some reason address-only DP_AUX_I2C_WRITE (MOT), still + * reports 1 byte transferred in its status. To deal we that + * we ignore aux_bytes field if we know that this was an + * address-only transfer + */ + if (size) + size = FIELD_GET(AUX_BYTES, auxstatus); msg->reply = FIELD_GET(AUX_STATUS, auxstatus); switch (request) { case DP_AUX_NATIVE_READ: case DP_AUX_I2C_READ: - return tc_aux_read_data(tc, msg->buffer, size); + if (size) + return tc_aux_read_data(tc, msg->buffer, size); + break; } return size; -- cgit v1.2.3-59-g8ed1b From 52c2197aae1b9809830d59bc8f5fa95f7372b0c7 Mon Sep 17 00:00:00 2001 From: Lucas Stach Date: Thu, 27 Jun 2019 10:59:58 +0200 Subject: drm/bridge: tc358767: do a software reset if reset pin isn't connected To get the chip into the expected state, even when the hardware reset pin isn't connected, do a software reset in this case. It isn't as thorough as the hardware reset, as the I2C communication block can not be reset for obvious reasons, but it's getting the chip into a defined state. Signed-off-by: Lucas Stach Signed-off-by: Andrzej Hajda Link: https://patchwork.freedesktop.org/patch/msgid/20190627085958.28331-1-l.stach@pengutronix.de --- drivers/gpu/drm/bridge/tc358767.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) (limited to 'drivers/gpu/drm/bridge/tc358767.c') diff --git a/drivers/gpu/drm/bridge/tc358767.c b/drivers/gpu/drm/bridge/tc358767.c index e1ce4954e6af..42f03a985ac0 100644 --- a/drivers/gpu/drm/bridge/tc358767.c +++ b/drivers/gpu/drm/bridge/tc358767.c @@ -80,6 +80,13 @@ #define DP0_VIDSRC_DSI_RX (1 << 0) #define DP0_VIDSRC_DPI_RX (2 << 0) #define DP0_VIDSRC_COLOR_BAR (3 << 0) +#define SYSRSTENB 0x050c +#define ENBI2C (1 << 0) +#define ENBLCD0 (1 << 2) +#define ENBBM (1 << 3) +#define ENBDSIRX (1 << 4) +#define ENBREG (1 << 5) +#define ENBHDCP (1 << 8) #define GPIOM 0x0540 #define GPIOC 0x0544 #define GPIOO 0x0548 @@ -1597,6 +1604,22 @@ static int tc_probe(struct i2c_client *client, const struct i2c_device_id *id) tc->assr = (tc->rev == 0x6601); /* Enable ASSR for eDP panels */ + if (!tc->reset_gpio) { + /* + * If the reset pin isn't present, do a software reset. It isn't + * as thorough as the hardware reset, as we can't reset the I2C + * communication block for obvious reasons, but it's getting the + * chip into a defined state. + */ + regmap_update_bits(tc->regmap, SYSRSTENB, + ENBLCD0 | ENBBM | ENBDSIRX | ENBREG | ENBHDCP, + 0); + regmap_update_bits(tc->regmap, SYSRSTENB, + ENBLCD0 | ENBBM | ENBDSIRX | ENBREG | ENBHDCP, + ENBLCD0 | ENBBM | ENBDSIRX | ENBREG | ENBHDCP); + usleep_range(5000, 10000); + } + if (tc->hpd_pin >= 0) { u32 lcnt_reg = tc->hpd_pin == 0 ? INT_GP0_LCNT : INT_GP1_LCNT; u32 h_lc = INT_GPIO_H(tc->hpd_pin) | INT_GPIO_LC(tc->hpd_pin); -- cgit v1.2.3-59-g8ed1b From 7bb0a60aa57818a9c49c5b4ec64e5f75581c369d Mon Sep 17 00:00:00 2001 From: Sam Ravnborg Date: Sun, 4 Aug 2019 22:16:22 +0200 Subject: drm/bridge: tc358767: fix opencoded use of drm_panel_* Replace open coded version with call to drm_panel_get_modes(). Include change to deal with the possible negative return values from drm_panel_get_modes() v2: - Added more info to changelog (Philipp) Signed-off-by: Sam Ravnborg Reviewed-by: Philipp Zabel Reviewed-by: Emil Velikov Cc: Andrzej Hajda Cc: Neil Armstrong Cc: Laurent Pinchart Cc: Jonas Karlman Cc: Jernej Skrabec Link: https://patchwork.freedesktop.org/patch/msgid/20190804201637.1240-2-sam@ravnborg.org --- drivers/gpu/drm/bridge/tc358767.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) (limited to 'drivers/gpu/drm/bridge/tc358767.c') diff --git a/drivers/gpu/drm/bridge/tc358767.c b/drivers/gpu/drm/bridge/tc358767.c index 42f03a985ac0..cebc8e620820 100644 --- a/drivers/gpu/drm/bridge/tc358767.c +++ b/drivers/gpu/drm/bridge/tc358767.c @@ -1312,7 +1312,7 @@ static int tc_connector_get_modes(struct drm_connector *connector) { struct tc_data *tc = connector_to_tc(connector); struct edid *edid; - unsigned int count; + int count; int ret; ret = tc_get_display_props(tc); @@ -1321,11 +1321,9 @@ static int tc_connector_get_modes(struct drm_connector *connector) return 0; } - if (tc->panel && tc->panel->funcs && tc->panel->funcs->get_modes) { - count = tc->panel->funcs->get_modes(tc->panel); - if (count > 0) - return count; - } + count = drm_panel_get_modes(tc->panel); + if (count > 0) + return count; edid = drm_get_edid(connector, &tc->aux.ddc); -- cgit v1.2.3-59-g8ed1b