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/* SPDX-License-Identifier: GPL-2.0
*
* Copyright 2016-2018 HabanaLabs, Ltd.
* All Rights Reserved.
*
*/
/************************************
** This is an auto-generated file **
** DO NOT EDIT BELOW **
************************************/
#ifndef ASIC_REG_TPC4_RTR_REGS_H_
#define ASIC_REG_TPC4_RTR_REGS_H_
/*
*****************************************
* TPC4_RTR (Prototype: TPC_RTR)
*****************************************
*/
#define mmTPC4_RTR_HBW_RD_RQ_E_ARB 0xF00100
#define mmTPC4_RTR_HBW_RD_RQ_W_ARB 0xF00104
#define mmTPC4_RTR_HBW_RD_RQ_N_ARB 0xF00108
#define mmTPC4_RTR_HBW_RD_RQ_S_ARB 0xF0010C
#define mmTPC4_RTR_HBW_RD_RQ_L_ARB 0xF00110
#define mmTPC4_RTR_HBW_E_ARB_MAX 0xF00120
#define mmTPC4_RTR_HBW_W_ARB_MAX 0xF00124
#define mmTPC4_RTR_HBW_N_ARB_MAX 0xF00128
#define mmTPC4_RTR_HBW_S_ARB_MAX 0xF0012C
#define mmTPC4_RTR_HBW_L_ARB_MAX 0xF00130
#define mmTPC4_RTR_HBW_RD_RS_E_ARB 0xF00140
#define mmTPC4_RTR_HBW_RD_RS_W_ARB 0xF00144
#define mmTPC4_RTR_HBW_RD_RS_N_ARB 0xF00148
#define mmTPC4_RTR_HBW_RD_RS_S_ARB 0xF0014C
#define mmTPC4_RTR_HBW_RD_RS_L_ARB 0xF00150
#define mmTPC4_RTR_HBW_WR_RQ_E_ARB 0xF00170
#define mmTPC4_RTR_HBW_WR_RQ_W_ARB 0xF00174
#define mmTPC4_RTR_HBW_WR_RQ_N_ARB 0xF00178
#define mmTPC4_RTR_HBW_WR_RQ_S_ARB 0xF0017C
#define mmTPC4_RTR_HBW_WR_RQ_L_ARB 0xF00180
#define mmTPC4_RTR_HBW_WR_RS_E_ARB 0xF00190
#define mmTPC4_RTR_HBW_WR_RS_W_ARB 0xF00194
#define mmTPC4_RTR_HBW_WR_RS_N_ARB 0xF00198
#define mmTPC4_RTR_HBW_WR_RS_S_ARB 0xF0019C
#define mmTPC4_RTR_HBW_WR_RS_L_ARB 0xF001A0
#define mmTPC4_RTR_LBW_RD_RQ_E_ARB 0xF00200
#define mmTPC4_RTR_LBW_RD_RQ_W_ARB 0xF00204
#define mmTPC4_RTR_LBW_RD_RQ_N_ARB 0xF00208
#define mmTPC4_RTR_LBW_RD_RQ_S_ARB 0xF0020C
#define mmTPC4_RTR_LBW_RD_RQ_L_ARB 0xF00210
#define mmTPC4_RTR_LBW_E_ARB_MAX 0xF00220
#define mmTPC4_RTR_LBW_W_ARB_MAX 0xF00224
#define mmTPC4_RTR_LBW_N_ARB_MAX 0xF00228
#define mmTPC4_RTR_LBW_S_ARB_MAX 0xF0022C
#define mmTPC4_RTR_LBW_L_ARB_MAX 0xF00230
#define mmTPC4_RTR_LBW_RD_RS_E_ARB 0xF00250
#define mmTPC4_RTR_LBW_RD_RS_W_ARB 0xF00254
#define mmTPC4_RTR_LBW_RD_RS_N_ARB 0xF00258
#define mmTPC4_RTR_LBW_RD_RS_S_ARB 0xF0025C
#define mmTPC4_RTR_LBW_RD_RS_L_ARB 0xF00260
#define mmTPC4_RTR_LBW_WR_RQ_E_ARB 0xF00270
#define mmTPC4_RTR_LBW_WR_RQ_W_ARB 0xF00274
#define mmTPC4_RTR_LBW_WR_RQ_N_ARB 0xF00278
#define mmTPC4_RTR_LBW_WR_RQ_S_ARB 0xF0027C
#define mmTPC4_RTR_LBW_WR_RQ_L_ARB 0xF00280
#define mmTPC4_RTR_LBW_WR_RS_E_ARB 0xF00290
#define mmTPC4_RTR_LBW_WR_RS_W_ARB 0xF00294
#define mmTPC4_RTR_LBW_WR_RS_N_ARB 0xF00298
#define mmTPC4_RTR_LBW_WR_RS_S_ARB 0xF0029C
#define mmTPC4_RTR_LBW_WR_RS_L_ARB 0xF002A0
#define mmTPC4_RTR_DBG_E_ARB 0xF00300
#define mmTPC4_RTR_DBG_W_ARB 0xF00304
#define mmTPC4_RTR_DBG_N_ARB 0xF00308
#define mmTPC4_RTR_DBG_S_ARB 0xF0030C
#define mmTPC4_RTR_DBG_L_ARB 0xF00310
#define mmTPC4_RTR_DBG_E_ARB_MAX 0xF00320
#define mmTPC4_RTR_DBG_W_ARB_MAX 0xF00324
#define mmTPC4_RTR_DBG_N_ARB_MAX 0xF00328
#define mmTPC4_RTR_DBG_S_ARB_MAX 0xF0032C
#define mmTPC4_RTR_DBG_L_ARB_MAX 0xF00330
#define mmTPC4_RTR_SPLIT_COEF_0 0xF00400
#define mmTPC4_RTR_SPLIT_COEF_1 0xF00404
#define mmTPC4_RTR_SPLIT_COEF_2 0xF00408
#define mmTPC4_RTR_SPLIT_COEF_3 0xF0040C
#define mmTPC4_RTR_SPLIT_COEF_4 0xF00410
#define mmTPC4_RTR_SPLIT_COEF_5 0xF00414
#define mmTPC4_RTR_SPLIT_COEF_6 0xF00418
#define mmTPC4_RTR_SPLIT_COEF_7 0xF0041C
#define mmTPC4_RTR_SPLIT_COEF_8 0xF00420
#define mmTPC4_RTR_SPLIT_COEF_9 0xF00424
#define mmTPC4_RTR_SPLIT_CFG 0xF00440
#define mmTPC4_RTR_SPLIT_RD_SAT 0xF00444
#define mmTPC4_RTR_SPLIT_RD_RST_TOKEN 0xF00448
#define mmTPC4_RTR_SPLIT_RD_TIMEOUT_0 0xF0044C
#define mmTPC4_RTR_SPLIT_RD_TIMEOUT_1 0xF00450
#define mmTPC4_RTR_SPLIT_WR_SAT 0xF00454
#define mmTPC4_RTR_WPLIT_WR_TST_TOLEN 0xF00458
#define mmTPC4_RTR_SPLIT_WR_TIMEOUT_0 0xF0045C
#define mmTPC4_RTR_SPLIT_WR_TIMEOUT_1 0xF00460
#define mmTPC4_RTR_HBW_RANGE_HIT 0xF00470
#define mmTPC4_RTR_HBW_RANGE_MASK_L_0 0xF00480
#define mmTPC4_RTR_HBW_RANGE_MASK_L_1 0xF00484
#define mmTPC4_RTR_HBW_RANGE_MASK_L_2 0xF00488
#define mmTPC4_RTR_HBW_RANGE_MASK_L_3 0xF0048C
#define mmTPC4_RTR_HBW_RANGE_MASK_L_4 0xF00490
#define mmTPC4_RTR_HBW_RANGE_MASK_L_5 0xF00494
#define mmTPC4_RTR_HBW_RANGE_MASK_L_6 0xF00498
#define mmTPC4_RTR_HBW_RANGE_MASK_L_7 0xF0049C
#define mmTPC4_RTR_HBW_RANGE_MASK_H_0 0xF004A0
#define mmTPC4_RTR_HBW_RANGE_MASK_H_1 0xF004A4
#define mmTPC4_RTR_HBW_RANGE_MASK_H_2 0xF004A8
#define mmTPC4_RTR_HBW_RANGE_MASK_H_3 0xF004AC
#define mmTPC4_RTR_HBW_RANGE_MASK_H_4 0xF004B0
#define mmTPC4_RTR_HBW_RANGE_MASK_H_5 0xF004B4
#define mmTPC4_RTR_HBW_RANGE_MASK_H_6 0xF004B8
#define mmTPC4_RTR_HBW_RANGE_MASK_H_7 0xF004BC
#define mmTPC4_RTR_HBW_RANGE_BASE_L_0 0xF004C0
#define mmTPC4_RTR_HBW_RANGE_BASE_L_1 0xF004C4
#define mmTPC4_RTR_HBW_RANGE_BASE_L_2 0xF004C8
#define mmTPC4_RTR_HBW_RANGE_BASE_L_3 0xF004CC
#define mmTPC4_RTR_HBW_RANGE_BASE_L_4 0xF004D0
#define mmTPC4_RTR_HBW_RANGE_BASE_L_5 0xF004D4
#define mmTPC4_RTR_HBW_RANGE_BASE_L_6 0xF004D8
#define mmTPC4_RTR_HBW_RANGE_BASE_L_7 0xF004DC
#define mmTPC4_RTR_HBW_RANGE_BASE_H_0 0xF004E0
#define mmTPC4_RTR_HBW_RANGE_BASE_H_1 0xF004E4
#define mmTPC4_RTR_HBW_RANGE_BASE_H_2 0xF004E8
#define mmTPC4_RTR_HBW_RANGE_BASE_H_3 0xF004EC
#define mmTPC4_RTR_HBW_RANGE_BASE_H_4 0xF004F0
#define mmTPC4_RTR_HBW_RANGE_BASE_H_5 0xF004F4
#define mmTPC4_RTR_HBW_RANGE_BASE_H_6 0xF004F8
#define mmTPC4_RTR_HBW_RANGE_BASE_H_7 0xF004FC
#define mmTPC4_RTR_LBW_RANGE_HIT 0xF00500
#define mmTPC4_RTR_LBW_RANGE_MASK_0 0xF00510
#define mmTPC4_RTR_LBW_RANGE_MASK_1 0xF00514
#define mmTPC4_RTR_LBW_RANGE_MASK_2 0xF00518
#define mmTPC4_RTR_LBW_RANGE_MASK_3 0xF0051C
#define mmTPC4_RTR_LBW_RANGE_MASK_4 0xF00520
#define mmTPC4_RTR_LBW_RANGE_MASK_5 0xF00524
#define mmTPC4_RTR_LBW_RANGE_MASK_6 0xF00528
#define mmTPC4_RTR_LBW_RANGE_MASK_7 0xF0052C
#define mmTPC4_RTR_LBW_RANGE_MASK_8 0xF00530
#define mmTPC4_RTR_LBW_RANGE_MASK_9 0xF00534
#define mmTPC4_RTR_LBW_RANGE_MASK_10 0xF00538
#define mmTPC4_RTR_LBW_RANGE_MASK_11 0xF0053C
#define mmTPC4_RTR_LBW_RANGE_MASK_12 0xF00540
#define mmTPC4_RTR_LBW_RANGE_MASK_13 0xF00544
#define mmTPC4_RTR_LBW_RANGE_MASK_14 0xF00548
#define mmTPC4_RTR_LBW_RANGE_MASK_15 0xF0054C
#define mmTPC4_RTR_LBW_RANGE_BASE_0 0xF00550
#define mmTPC4_RTR_LBW_RANGE_BASE_1 0xF00554
#define mmTPC4_RTR_LBW_RANGE_BASE_2 0xF00558
#define mmTPC4_RTR_LBW_RANGE_BASE_3 0xF0055C
#define mmTPC4_RTR_LBW_RANGE_BASE_4 0xF00560
#define mmTPC4_RTR_LBW_RANGE_BASE_5 0xF00564
#define mmTPC4_RTR_LBW_RANGE_BASE_6 0xF00568
#define mmTPC4_RTR_LBW_RANGE_BASE_7 0xF0056C
#define mmTPC4_RTR_LBW_RANGE_BASE_8 0xF00570
#define mmTPC4_RTR_LBW_RANGE_BASE_9 0xF00574
#define mmTPC4_RTR_LBW_RANGE_BASE_10 0xF00578
#define mmTPC4_RTR_LBW_RANGE_BASE_11 0xF0057C
#define mmTPC4_RTR_LBW_RANGE_BASE_12 0xF00580
#define mmTPC4_RTR_LBW_RANGE_BASE_13 0xF00584
#define mmTPC4_RTR_LBW_RANGE_BASE_14 0xF00588
#define mmTPC4_RTR_LBW_RANGE_BASE_15 0xF0058C
#define mmTPC4_RTR_RGLTR 0xF00590
#define mmTPC4_RTR_RGLTR_WR_RESULT 0xF00594
#define mmTPC4_RTR_RGLTR_RD_RESULT 0xF00598
#define mmTPC4_RTR_SCRAMB_EN 0xF00600
#define mmTPC4_RTR_NON_LIN_SCRAMB 0xF00604
#endif /* ASIC_REG_TPC4_RTR_REGS_H_ */
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