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<title>qemu/fpu, branch master</title>
<subtitle>QEMU development tree</subtitle>
<id>https://git.zx2c4.com/qemu/atom/fpu?h=master</id>
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<updated>2024-06-05T16:05:10Z</updated>
<entry>
<title>target/sparc: Implement FMAf extension</title>
<updated>2024-06-05T16:05:10Z</updated>
<author>
<name>Richard Henderson</name>
<email>richard.henderson@linaro.org</email>
</author>
<published>2023-11-04T19:13:00Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/qemu/commit/?id=4fd71d19acd6e05b74927a0b5c4a5b0650e3d6f5'/>
<id>urn:sha1:4fd71d19acd6e05b74927a0b5c4a5b0650e3d6f5</id>
<content type='text'>
Rearrange PDIST so that do_dddd is general purpose and may
be re-used for FMADDd etc.  Add pickNaN and pickNaNMulAdd.

Signed-off-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
</content>
</entry>
<entry>
<title>target/nios2: Remove the deprecated Nios II target</title>
<updated>2024-04-24T14:03:38Z</updated>
<author>
<name>Philippe Mathieu-Daudé</name>
<email>philmd@linaro.org</email>
</author>
<published>2024-03-27T11:10:58Z</published>
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<id>urn:sha1:6c3014858c4c0024dd0560f08a6eda0f92f658d6</id>
<content type='text'>
The Nios II target is deprecated since v8.2 in commit 9997771bc1
("target/nios2: Deprecate the Nios II architecture").

Remove:
- Buildsys / CI infra
- User emulation
- System emulation (10m50-ghrd &amp; nios2-generic-nommu machines)
- Tests

Signed-off-by: Philippe Mathieu-Daudé &lt;philmd@linaro.org&gt;
Reviewed-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
Acked-by: Marek Vasut &lt;marex@denx.de&gt;
Message-Id: &lt;20240327144806.11319-3-philmd@linaro.org&gt;
</content>
</entry>
<entry>
<title>fpu/softfloat: Remove mention of TILE-Gx target</title>
<updated>2024-04-01T16:47:40Z</updated>
<author>
<name>Philippe Mathieu-Daudé</name>
<email>philmd@linaro.org</email>
</author>
<published>2024-03-27T14:48:04Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/qemu/commit/?id=9988c7b50e0ebd93a8ac10d7da6890d05971e98e'/>
<id>urn:sha1:9988c7b50e0ebd93a8ac10d7da6890d05971e98e</id>
<content type='text'>
TILE-Gx has been removed during the v6.0 release (see
commit 2cc1a90166 "Remove deprecated target tilegx"),
no need to mention it in the list of "supported targets".

Signed-off-by: Philippe Mathieu-Daudé &lt;philmd@linaro.org&gt;
Reviewed-by: Thomas Huth &lt;thuth@redhat.com&gt;
Reviewed-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
Reviewed-by: Michael Tokarev &lt;mjt@tls.msk.ru&gt;
Signed-off-by: Michael Tokarev &lt;mjt@tls.msk.ru&gt;
</content>
</entry>
<entry>
<title>fpu: Handle m68k extended precision denormals properly</title>
<updated>2023-09-16T14:57:16Z</updated>
<author>
<name>Richard Henderson</name>
<email>richard.henderson@linaro.org</email>
</author>
<published>2023-08-21T00:28:33Z</published>
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<id>urn:sha1:722460652b3aee89dc19df61f1f33df53a9b97c9</id>
<content type='text'>
Motorola treats denormals with explicit integer bit set as
having unbiased exponent 0, unlike Intel which treats it as
having unbiased exponent 1 (more like all other IEEE formats
that have no explicit integer bit).

Add a flag on FloatFmt to differentiate the behaviour.

Reported-by: Keith Packard &lt;keithp@keithp.com&gt;
Reviewed-by: Philippe Mathieu-Daudé &lt;philmd@linaro.org&gt;
Signed-off-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
</content>
</entry>
<entry>
<title>fpu: Add conversions between bfloat16 and [u]int8</title>
<updated>2023-09-16T14:57:15Z</updated>
<author>
<name>LIU Zhiwei</name>
<email>zhiwei_liu@linux.alibaba.com</email>
</author>
<published>2023-05-31T06:54:57Z</published>
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<id>urn:sha1:00f9ef8f3dd6940001311a6230985243c3ebb996</id>
<content type='text'>
We missed these functions when upstreaming the bfloat16 support.

Signed-off-by: LIU Zhiwei &lt;zhiwei_liu@linux.alibaba.com&gt;
Message-Id: &lt;20230531065458.2082-1-zhiwei_liu@linux.alibaba.com&gt;
Signed-off-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
</content>
</entry>
<entry>
<title>fpu: Add float64_to_int{32,64}_modulo</title>
<updated>2023-07-01T06:26:54Z</updated>
<author>
<name>Richard Henderson</name>
<email>richard.henderson@linaro.org</email>
</author>
<published>2023-05-27T14:19:07Z</published>
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<id>urn:sha1:e2041f4d5de01cb03b52908d36e9602b8c4a2479</id>
<content type='text'>
Add versions of float64_to_int* which do not saturate the result.

Reviewed-by: Christoph Muellner &lt;christoph.muellner@vrull.eu&gt;
Tested-by: Christoph Muellner &lt;christoph.muellner@vrull.eu&gt;
Signed-off-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
Reviewed-by: Alex Bennée &lt;alex.bennee@linaro.org&gt;
Message-Id: &lt;20230527141910.1885950-2-richard.henderson@linaro.org&gt;
</content>
</entry>
<entry>
<title>softfloat: use QEMU_FLATTEN to avoid mistaken isra inlining</title>
<updated>2023-06-26T15:33:00Z</updated>
<author>
<name>Alex Bennée</name>
<email>alex.bennee@linaro.org</email>
</author>
<published>2023-05-23T13:11:07Z</published>
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<id>urn:sha1:1d3daf95254d998b91445c48de875796df3b0998</id>
<content type='text'>
Balton discovered that asserts for the extract/deposit calls had a
significant impact on a lame benchmark on qemu-ppc. Replicating with:

  ./qemu-ppc64 ~/lsrc/tests/lame.git-svn/builds/ppc64/frontend/lame \
    -h pts-trondheim-3.wav pts-trondheim-3.mp3

showed up the pack/unpack routines not eliding the assert checks as it
should have done causing them to prominently figure in the profile:

  11.44%  qemu-ppc64  qemu-ppc64               [.] unpack_raw64.isra.0
  11.03%  qemu-ppc64  qemu-ppc64               [.] parts64_uncanon_normal
   8.26%  qemu-ppc64  qemu-ppc64               [.] helper_compute_fprf_float64
   6.75%  qemu-ppc64  qemu-ppc64               [.] do_float_check_status
   5.34%  qemu-ppc64  qemu-ppc64               [.] parts64_muladd
   4.75%  qemu-ppc64  qemu-ppc64               [.] pack_raw64.isra.0
   4.38%  qemu-ppc64  qemu-ppc64               [.] parts64_canonicalize
   3.62%  qemu-ppc64  qemu-ppc64               [.] float64r32_round_pack_canonical

After this patch the same test runs 31 seconds faster with a profile
where the generated code dominates more:

+   14.12%     0.00%  qemu-ppc64  [unknown]                [.] 0x0000004000619420
+   13.30%     0.00%  qemu-ppc64  [unknown]                [.] 0x0000004000616850
+   12.58%    12.19%  qemu-ppc64  qemu-ppc64               [.] parts64_uncanon_normal
+   10.62%     0.00%  qemu-ppc64  [unknown]                [.] 0x000000400061bf70
+    9.91%     9.73%  qemu-ppc64  qemu-ppc64               [.] helper_compute_fprf_float64
+    7.84%     7.82%  qemu-ppc64  qemu-ppc64               [.] do_float_check_status
+    6.47%     5.78%  qemu-ppc64  qemu-ppc64               [.] parts64_canonicalize.constprop.0
+    6.46%     0.00%  qemu-ppc64  [unknown]                [.] 0x0000004000620130
+    6.42%     0.00%  qemu-ppc64  [unknown]                [.] 0x0000004000619400
+    6.17%     6.04%  qemu-ppc64  qemu-ppc64               [.] parts64_muladd
+    5.85%     0.00%  qemu-ppc64  [unknown]                [.] 0x00000040006167e0
+    5.74%     0.00%  qemu-ppc64  [unknown]                [.] 0x0000b693fcffffd3
+    5.45%     4.78%  qemu-ppc64  qemu-ppc64               [.] float64r32_round_pack_canonical

Suggested-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
Message-Id: &lt;ec9cfe5a-d5f2-466d-34dc-c35817e7e010@linaro.org&gt;
[AJB: Patchified rth's suggestion]
Signed-off-by: Alex Bennée &lt;alex.bennee@linaro.org&gt;
Cc: BALATON Zoltan &lt;balaton@eik.bme.hu&gt;
Reviewed-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
Reviewed-by: Philippe Mathieu-Daudé &lt;philmd@linaro.org&gt;
Tested-by: BALATON Zoltan &lt;balaton@eik.bme.hu&gt;
Message-Id: &lt;20230523131107.3680641-1-alex.bennee@linaro.org&gt;
Signed-off-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
</content>
</entry>
<entry>
<title>softfloat: Fix the incorrect computation in float32_exp2</title>
<updated>2023-05-05T15:57:48Z</updated>
<author>
<name>Shivaprasad G Bhat</name>
<email>sbhat@linux.ibm.com</email>
</author>
<published>2023-05-02T15:25:30Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/qemu/commit/?id=1098cc3fcf952763fc9fd72c1c8fda30a18cc8ea'/>
<id>urn:sha1:1098cc3fcf952763fc9fd72c1c8fda30a18cc8ea</id>
<content type='text'>
The float32_exp2 function is computing wrong exponent of 2.

For example, with the following set of values {0.1, 2.0, 2.0, -1.0},
the expected output would be {1.071773, 4.000000, 4.000000, 0.500000}.
Instead, the function is computing {1.119102, 3.382044, 3.382044, -0.191022}

Looking at the code, the float32_exp2() attempts to do this

                  2     3     4     5           n
  x        x     x     x     x     x           x
 e  = 1 + --- + --- + --- + --- + --- + ... + --- + ...
           1!    2!    3!    4!    5!          n!

But because of the typo it ends up doing

  x        x     x     x     x     x           x
 e  = 1 + --- + --- + --- + --- + --- + ... + --- + ...
           1!    2!    3!    4!    5!          n!

This is because instead of the xnp which holds the numerator, parts_muladd
is using the xp which is just 'x'.  Commit '572c4d862ff2' refactored this
function, and mistakenly used xp instead of xnp.

Cc: qemu-stable@nongnu.org
Fixes: 572c4d862ff2 "softfloat: Convert float32_exp2 to FloatParts"
Partially-Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1623
Reported-By: Luca Barbato (https://gitlab.com/lu-zero)
Signed-off-by: Shivaprasad G Bhat &lt;sbhat@linux.ibm.com&gt;
Signed-off-by: Vaibhav Jain &lt;vaibhav@linux.ibm.com&gt;
Message-Id: &lt;168304110865.537992.13059030916325018670.stgit@localhost.localdomain&gt;
Reviewed-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
Signed-off-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
</content>
</entry>
<entry>
<title>softfloat: logB(0) should raise divideByZero exception</title>
<updated>2022-10-17T02:28:35Z</updated>
<author>
<name>Song Gao</name>
<email>gaosong@loongson.cn</email>
</author>
<published>2022-09-30T02:45:10Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/qemu/commit/?id=3cf71969095a99f840cd4b3f4aae696ce44b8078'/>
<id>urn:sha1:3cf71969095a99f840cd4b3f4aae696ce44b8078</id>
<content type='text'>
logB(0) should raise divideByZero exception from IEEE 754-2008 spec 7.3

Suggested-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
Signed-off-by: Song Gao &lt;gaosong@loongson.cn&gt;
Reviewed-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
Message-Id: &lt;20220930024510.800005-4-gaosong@loongson.cn&gt;
</content>
</entry>
<entry>
<title>fpu: Add rebias bool, value and operation</title>
<updated>2022-08-31T17:08:05Z</updated>
<author>
<name>Lucas Mateus Castro (alqotel)</name>
<email>lucas.araujo@eldorado.org.br</email>
</author>
<published>2022-08-05T14:15:21Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/qemu/commit/?id=c40da5c6fb6dd243e906900de1d22cf20e32a8cd'/>
<id>urn:sha1:c40da5c6fb6dd243e906900de1d22cf20e32a8cd</id>
<content type='text'>
Added the possibility of recalculating a result if it overflows or
underflows, if the result overflow and the rebias bool is true then the
intermediate result should have 3/4 of the total range subtracted from
the exponent. The same for underflow but it should be added to the
exponent of the intermediate number instead.

Signed-off-by: Lucas Mateus Castro (alqotel) &lt;lucas.araujo@eldorado.org.br&gt;
Reviewed-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
Message-Id: &lt;20220805141522.412864-2-lucas.araujo@eldorado.org.br&gt;
Signed-off-by: Daniel Henrique Barboza &lt;danielhb413@gmail.com&gt;
</content>
</entry>
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