<feed xmlns='http://www.w3.org/2005/Atom'>
<title>qemu/hw/timer, branch master</title>
<subtitle>QEMU development tree</subtitle>
<id>https://git.zx2c4.com/qemu/atom/hw/timer?h=master</id>
<link rel='self' href='https://git.zx2c4.com/qemu/atom/hw/timer?h=master'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/qemu/'/>
<updated>2024-07-22T17:19:44Z</updated>
<entry>
<title>hpet: avoid timer storms on periodic timers</title>
<updated>2024-07-22T17:19:44Z</updated>
<author>
<name>Paolo Bonzini</name>
<email>pbonzini@redhat.com</email>
</author>
<published>2024-07-16T10:35:39Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/qemu/commit/?id=7c912ffb59e8137091894d767433e65c3df8b0bf'/>
<id>urn:sha1:7c912ffb59e8137091894d767433e65c3df8b0bf</id>
<content type='text'>
If the period is set to a value that is too low, there could be no
time left to run the rest of QEMU.  Do not trigger interrupts faster
than 1 MHz.

Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>hpet: store full 64-bit target value of the counter</title>
<updated>2024-07-22T17:19:44Z</updated>
<author>
<name>Paolo Bonzini</name>
<email>pbonzini@redhat.com</email>
</author>
<published>2024-07-16T10:26:36Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/qemu/commit/?id=242d665396407f83a6acbffc804882eeb21cfdad'/>
<id>urn:sha1:242d665396407f83a6acbffc804882eeb21cfdad</id>
<content type='text'>
Store the full 64-bit value at which the timer should fire.

This makes it possible to skip the imprecise hpet_calculate_diff()
step, and to remove the clamping of the period to 31 or 63 bits.

Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>hpet: accept 64-bit reads and writes</title>
<updated>2024-07-22T17:19:44Z</updated>
<author>
<name>Paolo Bonzini</name>
<email>pbonzini@redhat.com</email>
</author>
<published>2024-07-10T07:58:01Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/qemu/commit/?id=c2366567378dd8fb89329816003801f54e30e6f3'/>
<id>urn:sha1:c2366567378dd8fb89329816003801f54e30e6f3</id>
<content type='text'>
Declare the MemoryRegionOps so that 64-bit reads and writes to the HPET
are received directly.  This makes it possible to unify the code to
process low and high parts: for 32-bit reads, extract the desired word;
for 32-bit writes, just merge the desired part into the old value and
proceed as with a 64-bit write.

Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>hpet: place read-only bits directly in "new_val"</title>
<updated>2024-07-22T17:19:44Z</updated>
<author>
<name>Paolo Bonzini</name>
<email>pbonzini@redhat.com</email>
</author>
<published>2024-07-10T08:55:13Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/qemu/commit/?id=ba88935b0fac2588b0a739f810b58dfabf7f92c8'/>
<id>urn:sha1:ba88935b0fac2588b0a739f810b58dfabf7f92c8</id>
<content type='text'>
The variable "val" is used for two different purposes.  As an intermediate
value when writing configuration registers, and to store the cleared bits
when writing ISR.

Use "new_val" for the former, and rename the variable so that it is clearer
for the latter case.

Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>hpet: remove unnecessary variable "index"</title>
<updated>2024-07-22T17:19:44Z</updated>
<author>
<name>Paolo Bonzini</name>
<email>pbonzini@redhat.com</email>
</author>
<published>2024-07-10T08:31:48Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/qemu/commit/?id=5895879aca252f4ebb2d1078eaf836c61ec54e9b'/>
<id>urn:sha1:5895879aca252f4ebb2d1078eaf836c61ec54e9b</id>
<content type='text'>
Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>hpet: ignore high bits of comparator in 32-bit mode</title>
<updated>2024-07-22T17:19:44Z</updated>
<author>
<name>Paolo Bonzini</name>
<email>pbonzini@redhat.com</email>
</author>
<published>2024-07-10T08:53:05Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/qemu/commit/?id=9eb7fad3546a89ee7cf0e90f5b1daccf89725cea'/>
<id>urn:sha1:9eb7fad3546a89ee7cf0e90f5b1daccf89725cea</id>
<content type='text'>
Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>hpet: fix and cleanup persistence of interrupt status</title>
<updated>2024-07-22T17:19:44Z</updated>
<author>
<name>Paolo Bonzini</name>
<email>pbonzini@redhat.com</email>
</author>
<published>2024-07-16T09:36:44Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/qemu/commit/?id=f0ccf770789e48b7a73497b465fdc892d28c1339'/>
<id>urn:sha1:f0ccf770789e48b7a73497b465fdc892d28c1339</id>
<content type='text'>
There are several bugs in the handling of the ISR register:

- switching level-&gt;edge was not lowering the interrupt and
  clearing ISR

- switching on the enable bit was not raising a level-triggered
  interrupt if the timer had fired

- the timer must be kept running even if not enabled, in
  order to set the ISR flag, so writes to HPET_TN_CFG must
  not call hpet_del_timer()

Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>hpet: fix HPET_TN_SETVAL for high 32-bits of the comparator</title>
<updated>2024-07-16T16:18:24Z</updated>
<author>
<name>Paolo Bonzini</name>
<email>pbonzini@redhat.com</email>
</author>
<published>2024-07-10T09:27:28Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/qemu/commit/?id=340627ec14968d64cfa3dd12d0e998639f227c49'/>
<id>urn:sha1:340627ec14968d64cfa3dd12d0e998639f227c49</id>
<content type='text'>
Commit 3787324101b ("hpet: Fix emulation of HPET_TN_SETVAL (Jan Kiszka)",
2009-04-17) applied the fix only to the low 32-bits of the comparator, but
it should be done for the high bits as well.  Otherwise, the high 32-bits
of the comparator cannot be written and they remain fixed to 0xffffffff.

Co-developed-by: TaiseiIto &lt;taisei1212@outlook.jp&gt;
Signed-off-by: TaiseiIto &lt;taisei1212@outlook.jp&gt;
Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>hpet: fix clamping of period</title>
<updated>2024-07-16T16:18:24Z</updated>
<author>
<name>Paolo Bonzini</name>
<email>pbonzini@redhat.com</email>
</author>
<published>2024-07-10T09:56:35Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/qemu/commit/?id=c9669d6d5741f7aa86e160c5e42979f90d25d168'/>
<id>urn:sha1:c9669d6d5741f7aa86e160c5e42979f90d25d168</id>
<content type='text'>
When writing a new period, the clamping should use a maximum value
rather tyhan a bit mask.  Also, when writing the high bits new_val
is shifted right by 32, so the maximum allowed period should also
be shifted right.

Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>hw/timer/a9gtimer: Handle QTest mode in a9_gtimer_get_current_cpu</title>
<updated>2024-06-21T13:01:59Z</updated>
<author>
<name>Zheyu Ma</name>
<email>zheyuma97@gmail.com</email>
</author>
<published>2024-06-18T14:40:09Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/qemu/commit/?id=ff8aff01fa20c4fd5bbe46e1d25fbefdf996ef73'/>
<id>urn:sha1:ff8aff01fa20c4fd5bbe46e1d25fbefdf996ef73</id>
<content type='text'>
This commit updates the a9_gtimer_get_current_cpu() function to handle
cases where QTest is enabled. When QTest is used, it returns 0 instead
of dereferencing the current_cpu, which can be NULL. This prevents the
program from crashing during QTest runs.

Reproducer:
cat &lt;&lt; EOF | qemu-system-aarch64 -display \
none -machine accel=qtest, -m 512M -machine npcm750-evb -qtest stdio
writel 0xf03fe20c 0x26d7468c
EOF

Signed-off-by: Zheyu Ma &lt;zheyuma97@gmail.com&gt;
Reviewed-by: Philippe Mathieu-Daudé &lt;philmd@linaro.org&gt;
Message-id: 20240618144009.3137806-1-zheyuma97@gmail.com
Signed-off-by: Peter Maydell &lt;peter.maydell@linaro.org&gt;
</content>
</entry>
</feed>
