<feed xmlns='http://www.w3.org/2005/Atom'>
<title>qemu/include/hw/core, branch master</title>
<subtitle>QEMU development tree</subtitle>
<id>https://git.zx2c4.com/qemu/atom/include/hw/core?h=master</id>
<link rel='self' href='https://git.zx2c4.com/qemu/atom/include/hw/core?h=master'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/qemu/'/>
<updated>2024-07-23T00:15:41Z</updated>
<entry>
<title>physmem: Add helper function to destroy CPU AddressSpace</title>
<updated>2024-07-23T00:15:41Z</updated>
<author>
<name>Salil Mehta</name>
<email>salil.mehta@huawei.com</email>
</author>
<published>2024-07-16T11:15:01Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/qemu/commit/?id=24bec42f3d6eae035d5df48c057157f83b260e17'/>
<id>urn:sha1:24bec42f3d6eae035d5df48c057157f83b260e17</id>
<content type='text'>
Virtual CPU Hot-unplug leads to unrealization of a CPU object. This also
involves destruction of the CPU AddressSpace. Add common function to help
destroy the CPU AddressSpace.

Signed-off-by: Salil Mehta &lt;salil.mehta@huawei.com&gt;
Tested-by: Vishnu Pajjuri &lt;vishnu@os.amperecomputing.com&gt;
Reviewed-by: Gavin Shan &lt;gshan@redhat.com&gt;
Tested-by: Xianglai Li &lt;lixianglai@loongson.cn&gt;
Tested-by: Miguel Luis &lt;miguel.luis@oracle.com&gt;
Reviewed-by: Shaoqin Huang &lt;shahuang@redhat.com&gt;
Tested-by: Zhao Liu &lt;zhao1.liu@intel.com&gt;
Acked-by: Igor Mammedov &lt;imammedo@redhat.com&gt;
Message-Id: &lt;20240716111502.202344-7-salil.mehta@huawei.com&gt;
Reviewed-by: Michael S. Tsirkin &lt;mst@redhat.com&gt;
Signed-off-by: Michael S. Tsirkin &lt;mst@redhat.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging</title>
<updated>2024-07-17T05:40:28Z</updated>
<author>
<name>Richard Henderson</name>
<email>richard.henderson@linaro.org</email>
</author>
<published>2024-07-17T05:40:28Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/qemu/commit/?id=58ee924b97d1c0898555647a31820c5a20d55a73'/>
<id>urn:sha1:58ee924b97d1c0898555647a31820c5a20d55a73</id>
<content type='text'>
* target/i386/tcg: fixes for seg_helper.c
* SEV: Don't allow automatic fallback to legacy KVM_SEV_INIT,
  but also don't use it by default
* scsi: honor bootindex again for legacy drives
* hpet, utils, scsi, build, cpu: miscellaneous bugfixes

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# gpg: Signature made Wed 17 Jul 2024 02:34:05 AM AEST
# gpg:                using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg:                issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini &lt;bonzini@gnu.org&gt;" [full]
# gpg:                 aka "Paolo Bonzini &lt;pbonzini@redhat.com&gt;" [full]

* tag 'for-upstream' of https://gitlab.com/bonzini/qemu:
  target/i386/tcg: save current task state before loading new one
  target/i386/tcg: use X86Access for TSS access
  target/i386/tcg: check for correct busy state before switching to a new task
  target/i386/tcg: Compute MMU index once
  target/i386/tcg: Introduce x86_mmu_index_{kernel_,}pl
  target/i386/tcg: Reorg push/pop within seg_helper.c
  target/i386/tcg: use PUSHL/PUSHW for error code
  target/i386/tcg: Allow IRET from user mode to user mode with SMAP
  target/i386/tcg: Remove SEG_ADDL
  target/i386/tcg: fix POP to memory in long mode
  hpet: fix HPET_TN_SETVAL for high 32-bits of the comparator
  hpet: fix clamping of period
  docs: Update description of 'user=username' for '-run-with'
  qemu/timer: Add host ticks function for LoongArch
  scsi: fix regression and honor bootindex again for legacy drives
  hw/scsi/lsi53c895a: bump instruction limit in scripts processing to fix regression
  disas: Fix build against Capstone v6
  cpu: Free queued CPU work
  Revert "qemu-char: do not operate on sources from finalize callbacks"
  i386/sev: Don't allow automatic fallback to legacy KVM_SEV*_INIT

Signed-off-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
</content>
</entry>
<entry>
<title>system/cpus: Add cpu_pause() function</title>
<updated>2024-07-16T18:04:08Z</updated>
<author>
<name>Nicholas Piggin</name>
<email>npiggin@gmail.com</email>
</author>
<published>2024-07-12T12:02:43Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/qemu/commit/?id=6b6593107d65113d3b83a936b06bab6c1c9fafe0'/>
<id>urn:sha1:6b6593107d65113d3b83a936b06bab6c1c9fafe0</id>
<content type='text'>
This factors the CPU pause function from pause_all_vcpus() into a
new cpu_pause() function, similarly to cpu_resume(). cpu_resume()
is moved to keep it next to cpu_pause().

Cc: Philippe Mathieu-Daudé &lt;philmd@linaro.org&gt;
Cc: Peter Xu &lt;peterx@redhat.com&gt;
Cc: Richard Henderson &lt;richard.henderson@linaro.org&gt;
Signed-off-by: Nicholas Piggin &lt;npiggin@gmail.com&gt;
Reviewed-by: Philippe Mathieu-Daudé &lt;philmd@linaro.org&gt;
Reviewed-by: Peter Xu &lt;peterx@redhat.com&gt;
Message-ID: &lt;20240712120247.477133-17-npiggin@gmail.com&gt;
Signed-off-by: Philippe Mathieu-Daudé &lt;philmd@linaro.org&gt;
</content>
</entry>
<entry>
<title>cpu: Free queued CPU work</title>
<updated>2024-07-16T10:47:44Z</updated>
<author>
<name>Akihiko Odaki</name>
<email>akihiko.odaki@daynix.com</email>
</author>
<published>2024-07-14T10:46:52Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/qemu/commit/?id=f8b64d35a625e49ee73f7d54ae80cb5503be975b'/>
<id>urn:sha1:f8b64d35a625e49ee73f7d54ae80cb5503be975b</id>
<content type='text'>
Running qemu-system-aarch64 -M virt -nographic and terminating it will
result in a LeakSanitizer error due to remaining queued CPU work so
free it.

Signed-off-by: Akihiko Odaki &lt;akihiko.odaki@daynix.com&gt;
Link: https://lore.kernel.org/r/20240714-cpu-v1-1-19c2f8de2055@daynix.com
Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>accel/tcg: Make TCGCPUOps::cpu_exec_halt mandatory</title>
<updated>2024-07-11T10:41:34Z</updated>
<author>
<name>Peter Maydell</name>
<email>peter.maydell@linaro.org</email>
</author>
<published>2024-07-04T15:57:10Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/qemu/commit/?id=0487c631801bf21e5e2ca8a54bf207fb78bd64bf'/>
<id>urn:sha1:0487c631801bf21e5e2ca8a54bf207fb78bd64bf</id>
<content type='text'>
Now that all targets set TCGCPUOps::cpu_exec_halt, we can make it
mandatory and remove the fallback handling that calls cpu_has_work.

Signed-off-by: Peter Maydell &lt;peter.maydell@linaro.org&gt;
Reviewed-by: Philippe Mathieu-Daudé &lt;philmd@linaro.org&gt;
</content>
</entry>
<entry>
<title>cpu: move Qemu[Thread|Cond] setup into common code</title>
<updated>2024-06-04T08:02:39Z</updated>
<author>
<name>Alex Bennée</name>
<email>alex.bennee@linaro.org</email>
</author>
<published>2024-05-30T19:42:47Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/qemu/commit/?id=a4c2735f35b8b2bca5784ff9bf754a99b654c9a8'/>
<id>urn:sha1:a4c2735f35b8b2bca5784ff9bf754a99b654c9a8</id>
<content type='text'>
Aside from the round robin threads this is all common code. By
moving the halt_cond setup we also no longer need hacks to work around
the race between QOM object creation and thread creation.

It is a little ugly to free stuff up for the round robin thread but
better it deal with its own specialises than making the other
accelerators jump through hoops.

Signed-off-by: Alex Bennée &lt;alex.bennee@linaro.org&gt;
Reviewed-by: Pierrick Bouvier &lt;pierrick.bouvier@linaro.org&gt;
Message-ID: &lt;20240530194250.1801701-3-alex.bennee@linaro.org&gt;
Signed-off-by: Philippe Mathieu-Daudé &lt;philmd@linaro.org&gt;
</content>
</entry>
<entry>
<title>hw/core: expand on the alignment of CPUState</title>
<updated>2024-06-04T08:02:39Z</updated>
<author>
<name>Alex Bennée</name>
<email>alex.bennee@linaro.org</email>
</author>
<published>2024-05-30T19:42:46Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/qemu/commit/?id=b8a208ccf51013a88eb410a7820a4951834a913f'/>
<id>urn:sha1:b8a208ccf51013a88eb410a7820a4951834a913f</id>
<content type='text'>
Make the relationship between CPUState, ArchCPU and cpu_env a bit
clearer in the kdoc comments.

Signed-off-by: Alex Bennée &lt;alex.bennee@linaro.org&gt;
Reviewed-by: Pierrick Bouvier &lt;pierrick.bouvier@linaro.org&gt;
Message-ID: &lt;20240530194250.1801701-2-alex.bennee@linaro.org&gt;
Signed-off-by: Philippe Mathieu-Daudé &lt;philmd@linaro.org&gt;
</content>
</entry>
<entry>
<title>accel/tcg: Make TCGCPUOps::cpu_exec_halt return bool for whether to halt</title>
<updated>2024-05-30T15:13:48Z</updated>
<author>
<name>Peter Maydell</name>
<email>peter.maydell@linaro.org</email>
</author>
<published>2024-04-30T14:00:34Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/qemu/commit/?id=408b2b3d9df631102919ada62add6d785f737f74'/>
<id>urn:sha1:408b2b3d9df631102919ada62add6d785f737f74</id>
<content type='text'>
The TCGCPUOps::cpu_exec_halt method is called from cpu_handle_halt()
when the CPU is halted, so that a target CPU emulation can do
anything target-specific it needs to do.  (At the moment we only use
this on i386.)

The current specification of the method doesn't allow the target
specific code to do something different if the CPU is about to come
out of the halt state, because cpu_handle_halt() only determines this
after the method has returned.  (If the method called cpu_has_work()
itself this would introduce a potential race if an interrupt arrived
between the target's method implementation checking and
cpu_handle_halt() repeating the check.)

Change the definition of the method so that it returns a bool to
tell cpu_handle_halt() whether to stay in halt or not.

We will want this for the Arm target, where FEAT_WFxT wants to do
some work only for the case where the CPU is in halt but about to
leave it.

Signed-off-by: Peter Maydell &lt;peter.maydell@linaro.org&gt;
Reviewed-by: Philippe Mathieu-Daudé &lt;philmd@linaro.org&gt;
Reviewed-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
Message-id: 20240430140035.3889879-2-peter.maydell@linaro.org
</content>
</entry>
<entry>
<title>Merge tag 'accel-20240506' of https://github.com/philmd/qemu into staging</title>
<updated>2024-05-06T17:19:10Z</updated>
<author>
<name>Richard Henderson</name>
<email>richard.henderson@linaro.org</email>
</author>
<published>2024-05-06T17:19:09Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/qemu/commit/?id=873f9ca3857cfeeef45441b116c91156736d529c'/>
<id>urn:sha1:873f9ca3857cfeeef45441b116c91156736d529c</id>
<content type='text'>
Accelerator patches

- Extract page-protection definitions to page-protection.h
- Rework in accel/tcg in preparation of extracting TCG fields from CPUState
- More uses of get_task_state() in user emulation
- Xen refactors in preparation for adding multiple map caches (Juergen &amp; Edgar)
- MAINTAINERS updates (Aleksandar and Bin)

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# gpg: Signature made Mon 06 May 2024 05:42:08 AM PDT
# gpg:                using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) &lt;f4bug@amsat.org&gt;" [full]

* tag 'accel-20240506' of https://github.com/philmd/qemu: (28 commits)
  MAINTAINERS: Update my email address
  MAINTAINERS: Update Aleksandar Rikalo email
  system: Pass RAM MemoryRegion and is_write in xen_map_cache()
  xen: mapcache: Break out xen_map_cache_init_single()
  xen: mapcache: Break out xen_invalidate_map_cache_single()
  xen: mapcache: Refactor xen_invalidate_map_cache_entry_unlocked
  xen: mapcache: Refactor xen_replace_cache_entry_unlocked
  xen: mapcache: Break out xen_ram_addr_from_mapcache_single
  xen: mapcache: Refactor xen_remap_bucket for multi-instance
  xen: mapcache: Refactor xen_map_cache for multi-instance
  xen: mapcache: Refactor lock functions for multi-instance
  xen: let xen_ram_addr_from_mapcache() return -1 in case of not found entry
  system: let qemu_map_ram_ptr() use qemu_ram_ptr_length()
  user: Use get_task_state() helper
  user: Declare get_task_state() once in 'accel/tcg/vcpu-state.h'
  user: Forward declare TaskState type definition
  accel/tcg: Move @plugin_mem_cbs from CPUState to CPUNegativeOffsetState
  accel/tcg: Restrict cpu_plugin_mem_cbs_enabled() to TCG
  accel/tcg: Restrict qemu_plugin_vcpu_exit_hook() to TCG plugins
  accel/tcg: Update CPUNegativeOffsetState::can_do_io field documentation
  ...

Signed-off-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
</content>
</entry>
<entry>
<title>accel/tcg: Move @plugin_mem_cbs from CPUState to CPUNegativeOffsetState</title>
<updated>2024-05-06T09:24:14Z</updated>
<author>
<name>Philippe Mathieu-Daudé</name>
<email>philmd@linaro.org</email>
</author>
<published>2024-01-09T22:38:04Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/qemu/commit/?id=80f034c5b2040b3cfea978361dfd7d813e3c75d9'/>
<id>urn:sha1:80f034c5b2040b3cfea978361dfd7d813e3c75d9</id>
<content type='text'>
@plugin_mem_cbs is accessed by tcg generated code, move it
to CPUNegativeOffsetState.

Signed-off-by: Philippe Mathieu-Daudé &lt;philmd@linaro.org&gt;
Reviewed-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
Message-Id: &lt;20240429213050.55177-4-philmd@linaro.org&gt;
</content>
</entry>
</feed>
