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<title>qemu/include/hw/display, branch master</title>
<subtitle>QEMU development tree</subtitle>
<id>https://git.zx2c4.com/qemu/atom/include/hw/display?h=master</id>
<link rel='self' href='https://git.zx2c4.com/qemu/atom/include/hw/display?h=master'/>
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<updated>2024-04-30T15:02:43Z</updated>
<entry>
<title>hw/display : Add device DM163</title>
<updated>2024-04-30T15:02:43Z</updated>
<author>
<name>Inès Varhol</name>
<email>ines.varhol@telecom-paris.fr</email>
</author>
<published>2024-04-24T20:06:51Z</published>
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<id>urn:sha1:c771f883f2e6db3acd7cbed0fde273bfc6cc580e</id>
<content type='text'>
This device implements the IM120417002 colors shield v1.1 for Arduino
(which relies on the DM163 8x3-channel led driving logic) and features
a simple display of an 8x8 RGB matrix. The columns of the matrix are
driven by the DM163 and the rows are driven externally.

Acked-by: Alistair Francis &lt;alistair.francis@wdc.com&gt;
Signed-off-by: Arnaud Minier &lt;arnaud.minier@telecom-paris.fr&gt;
Signed-off-by: Inès Varhol &lt;ines.varhol@telecom-paris.fr&gt;
Reviewed-by: Philippe Mathieu-Daudé &lt;philmd@linaro.org&gt;
Message-id: 20240424200929.240921-2-ines.varhol@telecom-paris.fr
[PMM: updated to new reset hold method prototype]
Signed-off-by: Peter Maydell &lt;peter.maydell@linaro.org&gt;
</content>
</entry>
<entry>
<title>hw/arm: Introduce Raspberry PI 4 machine</title>
<updated>2024-02-27T13:01:42Z</updated>
<author>
<name>Sergey Kambalin</name>
<email>serg.oker@gmail.com</email>
</author>
<published>2024-02-26T00:02:28Z</published>
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<id>urn:sha1:7785e8ea220493ef4faa98647946855ba1d28c43</id>
<content type='text'>
Signed-off-by: Sergey Kambalin &lt;sergey.kambalin@auriga.com&gt;
Reviewed-by: Peter Maydell &lt;peter.maydell@linaro.org&gt;
Message-id: 20240226000259.2752893-11-sergey.kambalin@auriga.com
[PMM: Change name to 'raspi4b', not 'raspi4b-2g']
Signed-off-by: Peter Maydell &lt;peter.maydell@linaro.org&gt;
</content>
</entry>
<entry>
<title>ramfb: add migration support</title>
<updated>2023-10-18T08:10:49Z</updated>
<author>
<name>Marc-André Lureau</name>
<email>marcandre.lureau@redhat.com</email>
</author>
<published>2023-10-09T06:32:45Z</published>
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<id>urn:sha1:303c33e606f629c7467b457a19c53698b114ee0f</id>
<content type='text'>
Implementing RAMFB migration is quite straightforward. One caveat is to
treat the whole RAMFBCfg as a blob, since that's what is exposed to the
guest directly. This avoid having to fiddle with endianness issues if we
were to migrate fields individually as integers.

The devices using RAMFB will have to include ramfb_vmstate in their
migration description.

Signed-off-by: Marc-André Lureau &lt;marcandre.lureau@redhat.com&gt;
Reviewed-by: Laszlo Ersek &lt;lersek@redhat.com&gt;
Acked-by: Gerd Hoffmann &lt;kraxel@redhat.com&gt;
Signed-off-by: Cédric Le Goater &lt;clg@redhat.com&gt;
</content>
</entry>
<entry>
<title>include: Include headers where needed</title>
<updated>2023-01-08T06:54:22Z</updated>
<author>
<name>Markus Armbruster</name>
<email>armbru@redhat.com</email>
</author>
<published>2022-12-22T12:08:11Z</published>
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<id>urn:sha1:7a5951f651ad5f158631a826070b24631e733763</id>
<content type='text'>
A number of headers neglect to include everything they need.  They
compile only if the headers they need are already included from
elsewhere.  Fix that.

Signed-off-by: Markus Armbruster &lt;armbru@redhat.com&gt;
Reviewed-by: Alistair Francis &lt;alistair.francis@wdc.com&gt;
Message-Id: &lt;20221222120813.727830-3-armbru@redhat.com&gt;
Reviewed-by: Michael S. Tsirkin &lt;mst@redhat.com&gt;
Signed-off-by: Michael S. Tsirkin &lt;mst@redhat.com&gt;
</content>
</entry>
<entry>
<title>xlnx_dp: Introduce a vblank signal</title>
<updated>2022-06-08T18:38:47Z</updated>
<author>
<name>Sai Pavan Boddu</name>
<email>sai.pavan.boddu@xilinx.com</email>
</author>
<published>2022-06-08T18:38:47Z</published>
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<id>urn:sha1:759ae1b47e7e0203eb6881304b4bbf0d935fd550</id>
<content type='text'>
Add a periodic timer which raises vblank at a frequency of 30Hz.

Note that this is a migration compatibility break for the
xlnx-zcu102 board type.

Signed-off-by: Sai Pavan Boddu &lt;saipava@xilinx.com&gt;
Signed-off-by: Edgar E. Iglesias &lt;edgar.iglesias@xilinx.com&gt;
Signed-off-by: Frederic Konrad &lt;fkonrad@amd.com&gt;
Acked-by: Alistair Francis &lt;alistair.francis@wdc.com&gt;
Message-id: 20220601172353.3220232-3-fkonrad@xilinx.com
Changes by fkonrad:
  - Switched to transaction-based ptimer API.
  - Added the DP_INT_VBLNK_START macro.
Signed-off-by: Frederic Konrad &lt;fkonrad@amd.com&gt;
[PMM: bump vmstate version, add commit message note about
 compat break]
Reviewed-by: Peter Maydell &lt;peter.maydell@linaro.org&gt;
Signed-off-by: Peter Maydell &lt;peter.maydell@linaro.org&gt;
</content>
</entry>
<entry>
<title>xlnx_dp: fix the wrong register size</title>
<updated>2022-06-08T18:38:47Z</updated>
<author>
<name>Frederic Konrad</name>
<email>fkonrad@amd.com</email>
</author>
<published>2022-06-08T18:38:47Z</published>
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<id>urn:sha1:d2008b3355061ab0cca823739cd98045e769a809</id>
<content type='text'>
The core and the vblend registers size are wrong, they should respectively be
0x3B0 and 0x1E0 according to:
  https://www.xilinx.com/htmldocs/registers/ug1087/ug1087-zynq-ultrascale-registers.html.

Let's fix that and use macros when creating the mmio region.

Fixes: 58ac482a66d ("introduce xlnx-dp")
Signed-off-by: Frederic Konrad &lt;fkonrad@amd.com&gt;
Reviewed-by: Edgar E. Iglesias &lt;edgar.iglesias@amd.com&gt;
Acked-by: Alistair Francis &lt;alistair.francis@wdc.com&gt;
Message-id: 20220601172353.3220232-2-fkonrad@xilinx.com
Signed-off-by: Peter Maydell &lt;peter.maydell@linaro.org&gt;
</content>
</entry>
<entry>
<title>macfb: increase number of registers saved in MacfbState</title>
<updated>2022-03-09T09:29:10Z</updated>
<author>
<name>Mark Cave-Ayland</name>
<email>mark.cave-ayland@ilande.co.uk</email>
</author>
<published>2022-03-05T15:55:23Z</published>
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<id>urn:sha1:dd2a56ab6f4743d77f3586749eb6934983944f1f</id>
<content type='text'>
The MacOS toolbox ROM accesses a number of addresses between 0x0 and 0x200 during
initialisation and resolution changes. Whilst the function of many of these
registers is unknown, it is worth the minimal cost of saving these extra values as
part of migration to help future-proof the migration stream for the q800 machine
as it starts to stabilise.

Note this is a migration break, but since there are upcoming incompatible changes
for the q800 machine (and migration does not even succeed without these patches)
then this is not an issue.

Signed-off-by: Mark Cave-Ayland &lt;mark.cave-ayland@ilande.co.uk&gt;
Reviewed-by: Peter Maydell &lt;peter.maydell@linaro.org&gt;
Reviewed-by: Laurent Vivier &lt;laurent@vivier.eu&gt;
Message-Id: &lt;20220305155530.9265-4-mark.cave-ayland@ilande.co.uk&gt;
Signed-off-by: Mark Cave-Ayland &lt;mark.cave-ayland@ilande.co.uk&gt;
</content>
</entry>
<entry>
<title>macfb: don't use special irq_state and irq_mask variables in MacfbState</title>
<updated>2022-03-09T09:29:10Z</updated>
<author>
<name>Mark Cave-Ayland</name>
<email>mark.cave-ayland@ilande.co.uk</email>
</author>
<published>2022-03-05T15:55:22Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/qemu/commit/?id=4718125192875085e6b1104e8286dbda7d4db682'/>
<id>urn:sha1:4718125192875085e6b1104e8286dbda7d4db682</id>
<content type='text'>
The current IRQ state and IRQ mask are handled exactly the same as standard
register accesses, so store these values directly in the regs array rather
than having separate variables for them.

Signed-off-by: Mark Cave-Ayland &lt;mark.cave-ayland@ilande.co.uk&gt;
Reviewed-by: Philippe Mathieu-Daudé &lt;f4bug@amsat.org&gt;
Reviewed-by: Laurent Vivier &lt;laurent@vivier.eu&gt;
Message-Id: &lt;20220305155530.9265-3-mark.cave-ayland@ilande.co.uk&gt;
Signed-off-by: Mark Cave-Ayland &lt;mark.cave-ayland@ilande.co.uk&gt;
</content>
</entry>
<entry>
<title>hw/mips/jazz: Inline vga_mmio_init() and remove it</title>
<updated>2022-01-13T09:58:54Z</updated>
<author>
<name>Philippe Mathieu-Daudé</name>
<email>f4bug@amsat.org</email>
</author>
<published>2021-12-06T22:45:28Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/qemu/commit/?id=7336c94434b2f697a375126d0df8549777a58148'/>
<id>urn:sha1:7336c94434b2f697a375126d0df8549777a58148</id>
<content type='text'>
vga_mmio_init() is used only one time and not very helpful,
inline and remove it.

Reviewed-by: BALATON Zoltan &lt;balaton@eik.bme.hu&gt;
Signed-off-by: Philippe Mathieu-Daudé &lt;f4bug@amsat.org&gt;
Reviewed-by: Thomas Huth &lt;thuth@redhat.com&gt;
Message-Id: &lt;20211206224528.563588-5-f4bug@amsat.org&gt;
Signed-off-by: Gerd Hoffmann &lt;kraxel@redhat.com&gt;
</content>
</entry>
<entry>
<title>hw/display/vga-mmio: QOM'ify vga_mmio_init() as TYPE_VGA_MMIO</title>
<updated>2022-01-13T09:58:54Z</updated>
<author>
<name>Philippe Mathieu-Daudé</name>
<email>f4bug@amsat.org</email>
</author>
<published>2021-12-06T22:45:27Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/qemu/commit/?id=23f6e3b11be74abae77584a069ec710d719ac5a1'/>
<id>urn:sha1:23f6e3b11be74abae77584a069ec710d719ac5a1</id>
<content type='text'>
Introduce TYPE_VGA_MMIO, a sysbus device.

While there is no change in the vga_mmio_init()
interface, this is a migration compatibility break
of the MIPS Acer Pica 61 Jazz machine (pica61).

Suggested-by: Thomas Huth &lt;thuth@redhat.com&gt;
Reviewed-by: BALATON Zoltan &lt;balaton@eik.bme.hu&gt;
Signed-off-by: Philippe Mathieu-Daudé &lt;f4bug@amsat.org&gt;
Reviewed-by: Thomas Huth &lt;thuth@redhat.com&gt;
Message-Id: &lt;20211206224528.563588-4-f4bug@amsat.org&gt;
Signed-off-by: Gerd Hoffmann &lt;kraxel@redhat.com&gt;
</content>
</entry>
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