<feed xmlns='http://www.w3.org/2005/Atom'>
<title>qemu/tests/data, branch master</title>
<subtitle>QEMU development tree</subtitle>
<id>https://git.zx2c4.com/qemu/atom/tests/data?h=master</id>
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<updated>2024-07-23T00:15:42Z</updated>
<entry>
<title>tests/acpi: Add expected ACPI AML files for RISC-V</title>
<updated>2024-07-23T00:15:42Z</updated>
<author>
<name>Sunil V L</name>
<email>sunilvl@ventanamicro.com</email>
</author>
<published>2024-07-16T14:43:06Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/qemu/commit/?id=e9c0d54f4aebeeeebf1124d6acd607e3015e0a51'/>
<id>urn:sha1:e9c0d54f4aebeeeebf1124d6acd607e3015e0a51</id>
<content type='text'>
As per the step 5 in the process documented in bios-tables-test.c,
generate the expected ACPI AML data files for RISC-V using the
rebuild-expected-aml.sh script and update the
bios-tables-test-allowed-diff.h.

These are all new files being added for the first time. Hence, iASL diff
output is not added.

Signed-off-by: Sunil V L &lt;sunilvl@ventanamicro.com&gt;
Acked-by: Alistair Francis &lt;alistair.francis@wdc.com&gt;
Acked-by: Igor Mammedov &lt;imammedo@redhat.com&gt;
Message-Id: &lt;20240716144306.2432257-10-sunilvl@ventanamicro.com&gt;
Reviewed-by: Michael S. Tsirkin &lt;mst@redhat.com&gt;
Signed-off-by: Michael S. Tsirkin &lt;mst@redhat.com&gt;
</content>
</entry>
<entry>
<title>tests/acpi: Add empty ACPI data files for RISC-V</title>
<updated>2024-07-23T00:15:42Z</updated>
<author>
<name>Sunil V L</name>
<email>sunilvl@ventanamicro.com</email>
</author>
<published>2024-07-16T14:43:04Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/qemu/commit/?id=cc3ba2422554b63f30b697eb67143b5d48c5b7a3'/>
<id>urn:sha1:cc3ba2422554b63f30b697eb67143b5d48c5b7a3</id>
<content type='text'>
As per process documented (steps 1-3) in bios-tables-test.c, add empty
AML data files for RISC-V ACPI tables and add the entries in
bios-tables-test-allowed-diff.h.

Signed-off-by: Sunil V L &lt;sunilvl@ventanamicro.com&gt;
Acked-by: Alistair Francis &lt;alistair.francis@wdc.com&gt;
Reviewed-by: Igor Mammedov &lt;imammedo@redhat.com&gt;
Message-Id: &lt;20240716144306.2432257-8-sunilvl@ventanamicro.com&gt;
Reviewed-by: Michael S. Tsirkin &lt;mst@redhat.com&gt;
Signed-off-by: Michael S. Tsirkin &lt;mst@redhat.com&gt;
</content>
</entry>
<entry>
<title>tests/acpi: update expected DSDT blob for aarch64 and microvm</title>
<updated>2024-07-23T00:15:42Z</updated>
<author>
<name>Sunil V L</name>
<email>sunilvl@ventanamicro.com</email>
</author>
<published>2024-07-16T14:43:02Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/qemu/commit/?id=0af3dfa5c5590ae21d1f58a389968d4b90112fd7'/>
<id>urn:sha1:0af3dfa5c5590ae21d1f58a389968d4b90112fd7</id>
<content type='text'>
After PCI link devices are moved out of the scope of PCI root complex,
the DSDT files of machines which use GPEX, will change. So, update the
expected AML files with these changes for these machines.

Mainly, there are 2 changes.

1) Since the link devices are created now directly under _SB for all PCI
root bridges in the system, they should have unique names. So, instead
of GSIx, named those devices as LXXY where L means link, XX will have
PCI bus number and Y will have the INTx number (ex: L000 or L001). The
_PRT entries will also be updated to reflect this name change.

2) PCI link devices are moved from the scope of each PCI root bridge to
directly under _SB.

Below is the sample iASL difference for one such link device.

Scope (\_SB)
{
    Name (_HID, "LNRO0005")  // _HID: Hardware ID
    Name (_UID, 0x1F)  // _UID: Unique ID
    Name (_CCA, One)  // _CCA: Cache Coherency Attribute
    Name (_CRS, ResourceTemplate ()  // _CRS: Current Resource Settings
    {
        Memory32Fixed (ReadWrite,
            0x0A003E00,         // Address Base
            0x00000200,         // Address Length
            )
        Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
        {
            0x0000004F,
        }
    })

+   Device (L000)
+   {
+       Name (_HID, "PNP0C0F" /* PCI Interrupt Link Device */)
+       Name (_UID, Zero)  // _UID: Unique ID
+       Name (_PRS, ResourceTemplate ()
+       {
+           Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+           {
+               0x00000023,
+           }
+       })
+       Name (_CRS, ResourceTemplate ()
+       {
+           Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+           {
+               0x00000023,
+           }
+       })
+       Method (_SRS, 1, NotSerialized)  // _SRS: Set Resource Settings
+       {
+       }
+   }
+
      Device (PCI0)
      {
          Name (_HID, "PNP0A08" /* PCI Express Bus */)  // _HID: Hardware ID
          Name (_CID, "PNP0A03" /* PCI Bus */)  // _CID: Compatible ID
          Name (_SEG, Zero)  // _SEG: PCI Segment
          Name (_BBN, Zero)  // _BBN: BIOS Bus Number
          Name (_UID, Zero)  // _UID: Unique ID
          Name (_STR, Unicode ("PCIe 0 Device"))  // _STR: Description String
          Name (_CCA, One)  // _CCA: Cache Coherency Attribute
          Name (_PRT, Package (0x80)  // _PRT: PCI Routing Table
          {

              Package (0x04)
              {
                  0xFFFF,
                  Zero,
-                 GSI0,
+                 L000,
                  Zero
              },

               .....

          })

          Device (GSI0)
          {
              Name (_HID, "PNP0C0F" /* PCI Interrupt Link Device */)
              Name (_UID, Zero)  // _UID: Unique ID
              Name (_PRS, ResourceTemplate ()
              {
                 Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
                 {
                     0x00000023,
                 }
              })
              Name (_CRS, ResourceTemplate ()
              {
                 Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
                 {
                     0x00000023,
                 }
              })
              Method (_SRS, 1, NotSerialized)  // _SRS: Set Resource Settings
              {
              }
          }
      }
}

Signed-off-by: Sunil V L &lt;sunilvl@ventanamicro.com&gt;
Message-Id: &lt;20240716144306.2432257-6-sunilvl@ventanamicro.com&gt;
Reviewed-by: Michael S. Tsirkin &lt;mst@redhat.com&gt;
Signed-off-by: Michael S. Tsirkin &lt;mst@redhat.com&gt;
</content>
</entry>
<entry>
<title>tests/data/acpi/rebuild-expected-aml.sh: Add RISC-V</title>
<updated>2024-07-03T22:14:07Z</updated>
<author>
<name>Sunil V L</name>
<email>sunilvl@ventanamicro.com</email>
</author>
<published>2024-06-25T15:08:36Z</published>
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<id>urn:sha1:0f130d9e372552ef900bfac062ffc6a77b4049cc</id>
<content type='text'>
Update the list of supported architectures to include RISC-V.

Signed-off-by: Sunil V L &lt;sunilvl@ventanamicro.com&gt;
Reviewed-by: Alistair Francis &lt;alistair.francis@wdc.com&gt;
Reviewed-by: Igor Mammedov &lt;imammedo@redhat.com&gt;
Message-Id: &lt;20240625150839.1358279-14-sunilvl@ventanamicro.com&gt;
Reviewed-by: Michael S. Tsirkin &lt;mst@redhat.com&gt;
Signed-off-by: Michael S. Tsirkin &lt;mst@redhat.com&gt;
</content>
</entry>
<entry>
<title>tests/data/acpi/virt: Move ARM64 ACPI tables under aarch64/${machine} path</title>
<updated>2024-07-03T22:14:06Z</updated>
<author>
<name>Sunil V L</name>
<email>sunilvl@ventanamicro.com</email>
</author>
<published>2024-06-25T15:08:33Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/qemu/commit/?id=7434f904673c36b78871a3b18ab1f5c09c640131'/>
<id>urn:sha1:7434f904673c36b78871a3b18ab1f5c09c640131</id>
<content type='text'>
Same machine name can be used by different architectures. Hence, create
aarch64 folder and move all aarch64 related AML files for virt machine
inside.

Signed-off-by: Sunil V L &lt;sunilvl@ventanamicro.com&gt;
Reviewed-by: Igor Mammedov &lt;imammedo@redhat.com&gt;
Message-Id: &lt;20240625150839.1358279-11-sunilvl@ventanamicro.com&gt;
Reviewed-by: Michael S. Tsirkin &lt;mst@redhat.com&gt;
Signed-off-by: Michael S. Tsirkin &lt;mst@redhat.com&gt;
</content>
</entry>
<entry>
<title>tests/data/acpi: Move x86 ACPI tables under x86/${machine} path</title>
<updated>2024-07-03T22:14:06Z</updated>
<author>
<name>Sunil V L</name>
<email>sunilvl@ventanamicro.com</email>
</author>
<published>2024-06-25T15:08:32Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/qemu/commit/?id=7c08eefcaf6588b80bd8ce027fab748db3c53f11'/>
<id>urn:sha1:7c08eefcaf6588b80bd8ce027fab748db3c53f11</id>
<content type='text'>
To support multiple architectures using same machine name, create x86
folder and move all x86 related AML files for each machine type inside.

Signed-off-by: Sunil V L &lt;sunilvl@ventanamicro.com&gt;
Reviewed-by: Igor Mammedov &lt;imammedo@redhat.com&gt;
Message-Id: &lt;20240625150839.1358279-10-sunilvl@ventanamicro.com&gt;
Reviewed-by: Michael S. Tsirkin &lt;mst@redhat.com&gt;
Signed-off-by: Michael S. Tsirkin &lt;mst@redhat.com&gt;
</content>
</entry>
<entry>
<title>tests/data/uefi-boot-images: Add RISC-V ISO image</title>
<updated>2024-07-03T22:14:06Z</updated>
<author>
<name>Sunil V L</name>
<email>sunilvl@ventanamicro.com</email>
</author>
<published>2024-06-25T15:08:27Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/qemu/commit/?id=2f95279aa8c3ced9607eb5959c20d2995ecd980b'/>
<id>urn:sha1:2f95279aa8c3ced9607eb5959c20d2995ecd980b</id>
<content type='text'>
To test ACPI tables, edk2 needs to be booted with a disk image having
EFI partition. This image is created using UefiTestToolsPkg.

The image is generated using tests/uefi-test-tools source.

Signed-off-by: Sunil V L &lt;sunilvl@ventanamicro.com&gt;
Message-Id: &lt;20240625150839.1358279-5-sunilvl@ventanamicro.com&gt;
Reviewed-by: Michael S. Tsirkin &lt;mst@redhat.com&gt;
Signed-off-by: Michael S. Tsirkin &lt;mst@redhat.com&gt;
</content>
</entry>
<entry>
<title>tests: acpi: update expected SSDT.dimmpxm blob</title>
<updated>2024-03-18T12:42:46Z</updated>
<author>
<name>Igor Mammedov</name>
<email>imammedo@redhat.com</email>
</author>
<published>2024-03-14T15:23:01Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/qemu/commit/?id=86e372ad1e22df373878e5c1cbda2d5026a34331'/>
<id>urn:sha1:86e372ad1e22df373878e5c1cbda2d5026a34331</id>
<content type='text'>
address shift is caused by switch to 32-bit SMBIOS entry point
which has slightly different size from 64-bit one and happens
to trigger a bit different memory layout.

Expected diff:

-    Name (MEMA, 0x07FFE000)
+    Name (MEMA, 0x07FFF000)

Signed-off-by: Igor Mammedov &lt;imammedo@redhat.com&gt;
Acked-by: Ani Sinha &lt;anisinha@redhat.com&gt;
Message-Id: &lt;20240314152302.2324164-21-imammedo@redhat.com&gt;
Reviewed-by: Michael S. Tsirkin &lt;mst@redhat.com&gt;
Signed-off-by: Michael S. Tsirkin &lt;mst@redhat.com&gt;
</content>
</entry>
<entry>
<title>tests: smbios: add test for legacy mode CLI options</title>
<updated>2024-03-18T12:42:45Z</updated>
<author>
<name>Igor Mammedov</name>
<email>imammedo@redhat.com</email>
</author>
<published>2024-03-14T15:22:44Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/qemu/commit/?id=579094cb995b605af07ba3ced3d0a5dc1545509c'/>
<id>urn:sha1:579094cb995b605af07ba3ced3d0a5dc1545509c</id>
<content type='text'>
Unfortunately having 2.0 machine type deprecated is not enough
to get rid of legacy SMBIOS handling since 'isapc' also uses
that and it's staying around.

Hence add test for CLI options handling to be sure that it
ain't broken during SMBIOS code refactoring.

Signed-off-by: Igor Mammedov &lt;imammedo@redhat.com&gt;
Reviewed-by: Ani Sinha &lt;anisinha@redhat.com&gt;
Tested-by: Fiona Ebner &lt;f.ebner@proxmox.com&gt;
Message-Id: &lt;20240314152302.2324164-4-imammedo@redhat.com&gt;
Reviewed-by: Michael S. Tsirkin &lt;mst@redhat.com&gt;
Signed-off-by: Michael S. Tsirkin &lt;mst@redhat.com&gt;
</content>
</entry>
<entry>
<title>tests: smbios: add test for -smbios type=11 option</title>
<updated>2024-03-18T12:42:45Z</updated>
<author>
<name>Igor Mammedov</name>
<email>imammedo@redhat.com</email>
</author>
<published>2024-03-14T15:22:43Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/qemu/commit/?id=ed75658af39ea29c5bf2d6fd2c645a54c95db78a'/>
<id>urn:sha1:ed75658af39ea29c5bf2d6fd2c645a54c95db78a</id>
<content type='text'>
Signed-off-by: Igor Mammedov &lt;imammedo@redhat.com&gt;
Reviewed-by: Ani Sinha &lt;anisinha@redhat.com&gt;
Tested-by: Fiona Ebner &lt;f.ebner@proxmox.com&gt;
Message-Id: &lt;20240314152302.2324164-3-imammedo@redhat.com&gt;
Reviewed-by: Michael S. Tsirkin &lt;mst@redhat.com&gt;
Signed-off-by: Michael S. Tsirkin &lt;mst@redhat.com&gt;
</content>
</entry>
</feed>
