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* tcg/i386: Use TEST r,r to test 8/16/32 bitsPaolo Bonzini2024-02-031-0/+17
| | | | | | | | | | Just like when testing against the sign bits, TEST r,r can be used when the immediate is 0xff, 0xff00, 0xffff, 0xffffffff. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg/i386: Improve TSTNE/TESTEQ vs powers of twoRichard Henderson2024-02-033-8/+53
| | | | | | | Use "test x,x" when the bit is one of the 4 sign bits. Use "bt imm,x" otherwise. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg/i386: Support TCG_COND_TST{EQ,NE}Richard Henderson2024-02-032-37/+60
| | | | | | | Merge tcg_out_testi into tcg_out_cmp and adjust the two uses. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg/i386: Move tcg_cond_to_jcc[] into tcg_out_cmpRichard Henderson2024-02-031-11/+13
| | | | | | | Return the x86 condition codes to use after the compare. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg/i386: Pass x86 condition codes to tcg_out_cmovRichard Henderson2024-02-031-8/+8
| | | | | | | Hoist the tcg_cond_to_jcc index outside the function. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg/arm: Support TCG_COND_TST{EQ,NE}Richard Henderson2024-02-032-2/+29
| | | | | | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231028194522.245170-12-richard.henderson@linaro.org> [PMD: Split from bigger patch, part 2/2] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20231108145244.72421-2-philmd@linaro.org>
* tcg/arm: Split out tcg_out_cmp()Richard Henderson2024-02-031-15/+17
| | | | | | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231028194522.245170-12-richard.henderson@linaro.org> [PMD: Split from bigger patch, part 1/2] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20231108145244.72421-1-philmd@linaro.org>
* tcg/aarch64: Generate CBNZ for TSTNE of UINT32_MAXRichard Henderson2024-02-031-0/+6
| | | | | | | | ... and the inverse, CBZ for TSTEQ. Suggested-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg/aarch64: Generate TBZ, TBNZRichard Henderson2024-02-031-12/+62
| | | | | | | | Test the sign bit for LT/GE vs 0, and TSTNE/EQ vs a power of 2. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20240119224737.48943-2-philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg/aarch64: Massage tcg_out_brcond()Philippe Mathieu-Daudé2024-02-031-8/+23
| | | | | | | | | In order to ease next commit review, modify tcg_out_brcond() to switch over TCGCond. No logical change intended. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20240119224737.48943-1-philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg/aarch64: Support TCG_COND_TST{EQ,NE}Richard Henderson2024-02-034-19/+43
| | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg: Add TCGConst argument to tcg_target_const_matchRichard Henderson2024-02-0311-12/+52
| | | | | | | | Fill the new argument from any condition within the opcode. Not yet used within any backend. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* target/s390x: Improve general case of disas_jccRichard Henderson2024-02-031-44/+22
| | | | | | | | | | | | Avoid code duplication by handling 7 of the 14 cases by inverting the test for the other 7 cases. Use TCG_COND_TSTNE for cc in {1,3}. Use (cc - 1) <= 1 for cc in {1,2}. Acked-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* target/s390x: Use TCG_COND_TSTNE for CC_OP_{TM,ICM}Richard Henderson2024-02-031-11/+7
| | | | | | | These are all test-and-compare type instructions. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* target/sparc: Use TCG_COND_TSTEQ in gen_op_mulsccRichard Henderson2024-02-031-2/+2
| | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* target/m68k: Use TCG_COND_TST{EQ,NE} in gen_fcc_condRichard Henderson2024-02-031-41/+33
| | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* target/alpha: Use TCG_COND_TSTNE for gen_fold_mzeroRichard Henderson2024-02-031-26/+23
| | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* target/alpha: Use TCG_COND_TST{EQ,NE} for CMOVLB{C,S}Richard Henderson2024-02-031-6/+2
| | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* target/alpha: Use TCG_COND_TST{EQ,NE} for BLB{C,S}Richard Henderson2024-02-031-10/+10
| | | | | | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231028194522.245170-33-richard.henderson@linaro.org> [PMD: Split from bigger patch, part 2/2] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20231108205247.83234-2-philmd@linaro.org>
* target/alpha: Pass immediate value to gen_bcond_internal()Richard Henderson2024-02-031-14/+7
| | | | | | | | | | | Simplify gen_bcond() by passing an immediate value. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231028194522.245170-33-richard.henderson@linaro.org> [PMD: Split from bigger patch, part 1/2] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20231108205247.83234-1-philmd@linaro.org>
* tcg/optimize: Lower TCG_COND_TST{EQ,NE} if unsupportedRichard Henderson2024-02-033-9/+55
| | | | | | | | After having performed other simplifications, lower any remaining test comparisons with AND. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg/optimize: Handle TCG_COND_TST{EQ,NE}Richard Henderson2024-02-031-22/+218
| | | | | | | | | | | Fold constant comparisons. Canonicalize "tst x,x" to equality vs zero. Canonicalize "tst x,sign" to sign test vs zero. Fold double-word comparisons with zero parts. Fold setcond of "tst x,pow2" to a bit extract. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg/optimize: Do swap_commutative2 in do_constant_folding_cond2Richard Henderson2024-02-031-50/+57
| | | | | | | | Mirror the new do_constant_folding_cond1 by doing all argument and condition adjustment within one helper. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg/optimize: Split out do_constant_folding_cond1Richard Henderson2024-02-031-30/+27
| | | | | | | | Handle modifications to the arguments and condition in a single place. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg/optimize: Split out arg_is_const_valRichard Henderson2024-02-031-15/+23
| | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg: Introduce TCG_TARGET_HAS_tstRichard Henderson2024-02-0310-0/+20
| | | | | | | Define as 0 for all tcg backends. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg: Introduce TCG_COND_TST{EQ,NE}Richard Henderson2024-02-033-17/+53
| | | | | | | | Add the enumerators, adjust the helpers to match, and dump. Not supported anywhere else just yet. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* Merge tag 'pull-qapi-2024-02-03' of https://repo.or.cz/qemu/armbru into stagingPeter Maydell2024-02-035-22/+17
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | QAPI patches patches for 2024-02-03 # -----BEGIN PGP SIGNATURE----- # # iQJGBAABCAAwFiEENUvIs9frKmtoZ05fOHC0AOuRhlMFAmW992gSHGFybWJydUBy # ZWRoYXQuY29tAAoJEDhwtADrkYZTgt4P/RLioQBDBeFw77RMVJqU7YHjvdPrFtVa # jpN3g+OqX7zN97aCfMnTueTi989qyHr7J8ufxcMsxKjxH8//Qs5vbkjVmzecxsiq # GOP0a1HrvvKvjAvttsM3OLYKWwwas5mvZ1wjerHItkC8t5QHIzAKHCHiJkzD5W0r # Kew9Mi9gzqRdETHlY+QFnwdr1ksG+L6iB3yefWu01emSPI5XXdQHGMyorYauwZGy # ettuSFwc/kVLd0wipsr7EKNEeK8c211EmAj4aqgpDSAzTDUyjNc/CjI1YGYvcBkz # 6ejgIRrUMmS3F9hytj0Gp0CC7mjAcZzMN3HNm1VHeuBR3Eo3iWnPAGeIV8w1bihp # GsioU+a6ZbcB1ylYRIadpUyrVABNGSlv9SLJiHYeZI+N/0Wz2ByWpYvjrmvvQIB9 # Kt7Tq+biab26OR+b7jZqae4d9EhTkYifP3cV2Bnv9gf9uONV8LRMDoCHSAm3EdCH # 3R361imS1y394YZbp2iMI4PxeNjh+PvL+rduNZbSGPNY+x9dEbBUH5YJBjnnw/Du # YM1yCiyoWyiQbSxGcILn9BCCBDcntof4XzFg7MYhN717fvQaLJMEuRlKE9LTC3GT # Wrbu4ZkTq7r//gXLtnO/L3S7y4inhKow3nKPXUmiqxVuRlRvLq06d1NHVI60FZFf # keNA4PC6X/6R # =2BzL # -----END PGP SIGNATURE----- # gpg: Signature made Sat 03 Feb 2024 08:20:56 GMT # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653 # gpg: issuer "armbru@redhat.com" # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full] # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [full] # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653 * tag 'pull-qapi-2024-02-03' of https://repo.or.cz/qemu/armbru: qga/qapi-schema: Move command description right after command name qga: Move type description right after type name qapi: Elide "Potential additional modes" from generated docs qapi: Drop redundant documentation of conditional qapi: Drop redundant documentation of inherited members Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * qga/qapi-schema: Move command description right after command nameMarkus Armbruster2024-02-031-9/+9
| | | | | | | | | | | | | | | | | | | | | | Documentation of commands guest-ssh-get-authorized-keys, guest-ssh-add-authorized-keys, and guest-ssh-remove-authorized-keys describes the command's purpose after its arguments. Everywhere else, we do it the other way round. Move it for consistency. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-ID: <20240129115008.674248-6-armbru@redhat.com> Reviewed-by: Konstantin Kostiuk <kkostiuk@redhat.com>
| * qga: Move type description right after type nameMarkus Armbruster2024-02-031-2/+2
| | | | | | | | | | | | | | | | | | | | Documentation of type BlockdevOptionsIscsi describes the type's purpose after its members. Everywhere else, we do it the other way round. Move it for consistency. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-ID: <20240129115008.674248-5-armbru@redhat.com> Reviewed-by: Konstantin Kostiuk <kkostiuk@redhat.com>
| * qapi: Elide "Potential additional modes" from generated docsMarkus Armbruster2024-02-031-5/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Documentation of BlockExportRemoveMode has Potential additional modes to be added in the future: hide: Just hide export from new clients, leave existing connections as is. Remove export after all clients are disconnected. soft: Hide export from new clients, answer with ESHUTDOWN for all further requests from existing clients. I think this is useful only for developers. Elide it from generated documentation by turning it into a TODO section. This effectively reverts my own commit b71fd73cc45 (Revert "qapi: BlockExportRemoveMode: move comments to TODO"). At the time, I was about to elide TODO sections from the generated manual, I wasn't sure about this one, and decided to avoid change. And now I've made up my mind. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-ID: <20240129115008.674248-4-armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com>
| * qapi: Drop redundant documentation of conditionalMarkus Armbruster2024-02-031-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Documentation generated for dump-skeys contains This command is only supported on s390 architecture. and If ~~ "TARGET_S390X" The former became redundant in commit 901a34a400a (qapi: add 'If:' section to generated documentation) added the latter. Drop the former. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-ID: <20240129115008.674248-3-armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com>
| * qapi: Drop redundant documentation of inherited membersMarkus Armbruster2024-02-032-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Documentation generated for SchemaInfo looks like The members of "SchemaInfoBuiltin" when "meta-type" is ""builtin"" The members of "SchemaInfoEnum" when "meta-type" is ""enum"" The members of "SchemaInfoArray" when "meta-type" is ""array"" The members of "SchemaInfoObject" when "meta-type" is ""object"" The members of "SchemaInfoAlternate" when "meta-type" is ""alternate"" The members of "SchemaInfoCommand" when "meta-type" is ""command"" The members of "SchemaInfoEvent" when "meta-type" is ""event"" Additional members depend on the value of "meta-type". The last line became redundant when commit 88f63467c57 (qapi2texi: Generate reference to base type members) added the lines preceding it. Drop it. BlockdevOptions has the same issue. Drop Remaining options are determined by the block driver. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-ID: <20240129115008.674248-2-armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com>
* | Merge tag 'pull-tcg-20240202-2' of https://gitlab.com/rth7680/qemu into stagingPeter Maydell2024-02-0397-1175/+1048
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | tests/tcg: Fix multiarch/gdbstub/prot-none.py hw/core: Convert cpu_mmu_index to a CPUClass hook tcg/loongarch64: Set vector registers call clobbered target/sparc: floating-point cleanup linux-user/aarch64: Add padding before __kernel_rt_sigreturn # -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmW95WkdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV/p+Qf/eVmh5q0pZqcur7ft # 8FO0wlIz55OfhaA9MIpH7LEIHRKY37Ybebw2K6SPnx4FmPhLkaj4KXPPjT2nzdXw # J2nQM+TOyxOd18GG8P80qFQ1a72dj8VSIRVAl9T46KuPXS5B7luArImfBlUk/GwV # Qr/XkOPwVTp05E/ccMJ8PMlcVZw9osHVLqsaFVbsUv/FylTmstzA9c5Gw7/FTfkG # T2rk+7go+F4IXs/9uQuuFMOpQOZngXE621hnro+qle7j9oarEUVJloAgVn06o59O # fUjuoKO0aMCr2iQqNJTH7Dnqp5OIzzxUoXiNTOj0EimwWfAcUKthoFO2LGcy1/ew # wWNR/Q== # =e3J3 # -----END PGP SIGNATURE----- # gpg: Signature made Sat 03 Feb 2024 07:04:09 GMT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * tag 'pull-tcg-20240202-2' of https://gitlab.com/rth7680/qemu: (58 commits) linux-user/aarch64: Add padding before __kernel_rt_sigreturn target/sparc: Remove FSR_FTT_NMASK, FSR_FTT_CEXC_NMASK target/sparc: Split fcc out of env->fsr target/sparc: Remove cpu_fsr target/sparc: Split cexc and ftt from env->fsr target/sparc: Merge check_ieee_exceptions with FPop helpers target/sparc: Clear cexc and ftt in do_check_ieee_exceptions target/sparc: Split ver from env->fsr target/sparc: Introduce cpu_get_fsr, cpu_put_fsr target/sparc: Remove qt0, qt1 temporaries target/sparc: Use i128 for Fdmulq target/sparc: Use i128 for FdTOq, FxTOq target/sparc: Use i128 for FsTOq, FiTOq target/sparc: Use i128 for FCMPq, FCMPEq target/sparc: Use i128 for FqTOd, FqTOx target/sparc: Use i128 for FqTOs, FqTOi target/sparc: Use i128 for FADDq, FSUBq, FMULq, FDIVq target/sparc: Use i128 for FSQRTq target/sparc: Inline FNEG, FABS target/sparc: Introduce gen_{load,store}_fpr_Q ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * | linux-user/aarch64: Add padding before __kernel_rt_sigreturnRichard Henderson2024-02-033-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Without this padding, an unwind through the signal handler will pick up the unwind info for the preceding syscall. This fixes gcc's 30_threads/thread/native_handle/cancel.cc. Cc: qemu-stable@nongnu.org Fixes: ee95fae075c6 ("linux-user/aarch64: Add vdso") Resolves: https://linaro.atlassian.net/browse/GNU-974 Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240202034427.504686-1-richard.henderson@linaro.org>
| * | target/sparc: Remove FSR_FTT_NMASK, FSR_FTT_CEXC_NMASKRichard Henderson2024-02-031-7/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | These macros are no longer used. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20231103173841.33651-23-richard.henderson@linaro.org>
| * | target/sparc: Split fcc out of env->fsrRichard Henderson2024-02-034-522/+198
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Represent each fcc field separately from the rest of fsr. This vastly simplifies floating-point comparisons. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20231103173841.33651-22-richard.henderson@linaro.org>
| * | target/sparc: Remove cpu_fsrRichard Henderson2024-02-033-113/+114
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Drop this field as a tcg global, loading it explicitly in the few places required. This means that all FPop helpers may once again be TCG_CALL_NO_WG. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20231103173841.33651-21-richard.henderson@linaro.org>
| * | target/sparc: Split cexc and ftt from env->fsrRichard Henderson2024-02-034-38/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These two fields are adjusted by all FPop insns. Having them separate makes it easier to set without masking. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20231103173841.33651-20-richard.henderson@linaro.org>
| * | target/sparc: Merge check_ieee_exceptions with FPop helpersRichard Henderson2024-02-033-129/+219
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If an exception is to be raised, the destination fp register should be unmodified. The current implementation is incorrect, in that double results will be written back before calling gen_helper_check_ieee_exceptions, despite the placement of gen_store_fpr_D, since gen_dest_fpr_D returns cpu_fpr[]. We can simplify the entire implementation by having each FPOp helper call check_ieee_exceptions. For the moment this requires that all FPop helpers write to the TCG global cpu_fsr, so remove TCG_CALL_NO_WG from the DEF_HELPER_FLAGS_*. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20231103173841.33651-19-richard.henderson@linaro.org>
| * | target/sparc: Clear cexc and ftt in do_check_ieee_exceptionsRichard Henderson2024-02-032-16/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Don't do the clearing explicitly before each FPop, rather do it as part of the rest of exception handling. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20231103173841.33651-18-richard.henderson@linaro.org>
| * | target/sparc: Split ver from env->fsrRichard Henderson2024-02-033-16/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This field is read-only. It is easier to store it separately and merge it only upon read. While we're at it, use FSR_VER_SHIFT to initialize fpu_version. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20231103173841.33651-17-richard.henderson@linaro.org>
| * | target/sparc: Introduce cpu_get_fsr, cpu_put_fsrRichard Henderson2024-02-039-18/+80
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20231103173841.33651-16-richard.henderson@linaro.org>
| * | target/sparc: Remove qt0, qt1 temporariesRichard Henderson2024-02-033-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | These are no longer used for passing data to/from helpers. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20231103173841.33651-15-richard.henderson@linaro.org>
| * | target/sparc: Use i128 for FdmulqRichard Henderson2024-02-033-16/+9
| | | | | | | | | | | | | | | | | | | | | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20231103173841.33651-14-richard.henderson@linaro.org>
| * | target/sparc: Use i128 for FdTOq, FxTOqRichard Henderson2024-02-033-10/+11
| | | | | | | | | | | | | | | | | | | | | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20231103173841.33651-13-richard.henderson@linaro.org>
| * | target/sparc: Use i128 for FsTOq, FiTOqRichard Henderson2024-02-033-10/+11
| | | | | | | | | | | | | | | | | | | | | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20231103173841.33651-12-richard.henderson@linaro.org>
| * | target/sparc: Use i128 for FCMPq, FCMPEqRichard Henderson2024-02-033-52/+41
| | | | | | | | | | | | | | | | | | | | | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20231103173841.33651-11-richard.henderson@linaro.org>
| * | target/sparc: Use i128 for FqTOd, FqTOxRichard Henderson2024-02-033-9/+10
| | | | | | | | | | | | | | | | | | | | | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20231103173841.33651-10-richard.henderson@linaro.org>
| * | target/sparc: Use i128 for FqTOs, FqTOiRichard Henderson2024-02-033-9/+10
| | | | | | | | | | | | | | | | | | | | | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20231103173841.33651-9-richard.henderson@linaro.org>
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