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2024-07-26pnv/xive2: Configure Virtualization Structure Tables through the PCFrederic Barrat1-9/+38
2024-07-26pnv/xive2: Add NVG and NVC to cache watch facilityFrederic Barrat1-11/+38
2024-07-26pnv/xive: Support cache flush and queue sync inject with notificationsNicholas Piggin3-2/+169
2024-07-26gitlab-ci: Use -fno-sanitize=function in the clang-user jobRichard Henderson1-0/+1
2024-07-26Merge tag 'block-pull-request' of https://gitlab.com/stefanha/qemu into stagingRichard Henderson1-1/+1
2024-07-26pnv/xive2: Structure/define alignment changesMichael Kowal1-15/+15
2024-07-26pnv/xive2: XIVE2 Cache Watch, Cache Flush and Sync Injection supportFrederic Barrat2-36/+305
2024-07-26tests/qtest: Add pnv-spi-seeprom qtestChalapathi V2-0/+111
2024-07-26hw/ppc: SPI controller wiring to P10 chipChalapathi V3-1/+31
2024-07-26hw/block: Add Microchip's 25CSM04 to m25p80Chalapathi V1-0/+3
2024-07-26hw/ssi: Extend SPI modelChalapathi V4-1/+1154
2024-07-26hw/ssi: Add SPI modelChalapathi V8-0/+339
2024-07-26ppc/pnv: Remove ppc target dependency from pnv_xscom.hChalapathi V1-1/+1
2024-07-26ppc/pnv: Add an LPAR per core machine optionNicholas Piggin6-1/+52
2024-07-26ppc/pnv: Implement POWER10 PC xscom registers for direct controlsNicholas Piggin2-5/+87
2024-07-26ppc/pnv: Add a CPU nmi and resume functionNicholas Piggin2-1/+15
2024-07-26ppc/pnv: Add big-core machine propertyNicholas Piggin1-16/+45
2024-07-26ppc/pnv: Add POWER10 ChipTOD quirk for big-coreNicholas Piggin5-1/+25
2024-07-26ppc/pnv: Implement Power9 CPU core thread state indirect registerNicholas Piggin1-0/+17
2024-07-26ppc/pnv: Implement big-core PVR for Power9/10Nicholas Piggin1-0/+4
2024-07-26ppc/pnv: Add allow for big-core differences in DT generationNicholas Piggin1-8/+35
2024-07-26ppc/pnv: Add a big-core mode that joins two regular coresNicholas Piggin5-14/+78
2024-07-26ppc: Add has_smt_siblings property to CPUPPCStateNicholas Piggin3-4/+14
2024-07-26target/ppc: Add helpers to check for SMT sibling threadsNicholas Piggin5-47/+30
2024-07-26ppc: Add a core_index to CPUPPCState for SMT vCPUsNicholas Piggin3-4/+11
2024-07-26ppc/pnv: Extend chip_pir class method to TIR as wellNicholas Piggin3-33/+62
2024-07-26ppc/pnv: use class attribute to limit SMT threads for different machinesNicholas Piggin2-3/+10
2024-07-26target/ppc: Move SPR indirect registers into PnvCoreNicholas Piggin4-45/+45
2024-07-26ppc/pnv: Move timebase state into PnvCoreNicholas Piggin4-50/+55
2024-07-26ppc/pnv: Add pointer from PnvCPUState to PnvCoreNicholas Piggin2-0/+4
2024-07-26target/ppc: Fix msgsnd for POWER8Nicholas Piggin1-30/+44
2024-07-26ppc/pnv: Implement ADU access to LPC spaceNicholas Piggin5-6/+117
2024-07-26ppc/pnv: Begin a more complete ADU LPC model for POWER9/10Nicholas Piggin8-9/+166
2024-07-26ppc/pnv: Implement POWER9 LPC PSI serirq outputs and auto-clear functionNicholas Piggin3-30/+148
2024-07-26ppc/pnv: Fix loss of LPC SERIRQ interruptsGlenn Miles2-3/+22
2024-07-26ppc/pnv: Update Power10's cfam id to use Power10 DD2Aditya Gupta2-2/+2
2024-07-26target/ppc/cpu_init: Synchronize HASHPKEYR with KVM for migrationShivaprasad G Bhat1-2/+2
2024-07-26target/ppc/cpu_init: Synchronize HASHKEYR with KVM for migrationShivaprasad G Bhat1-2/+2
2024-07-26target/ppc/cpu_init: Synchronize DEXCR with KVM for migrationShivaprasad G Bhat1-2/+2
2024-07-26linux-header: PPC: KVM: Update one-reg ids for DEXCR, HASHKEYR and HASHPKEYRShivaprasad G Bhat1-0/+3
2024-07-26target/ppc/arch_dump: set prstatus pid to cpuidOmar Sandoval1-9/+15
2024-07-26target/ppc: handle vcpu hotplug failure gracefullyHarsh Prateek Bora1-0/+46
2024-07-26cpu-common.c: export cpu_get_free_index to be reused laterHarsh Prateek Bora2-3/+6
2024-07-26accel/kvm: Introduce kvm_create_and_park_vcpu() helperHarsh Prateek Bora2-0/+20
2024-07-26ppc/vof: Fix unaligned FDT property accessAkihiko Odaki1-1/+1
2024-07-26spapr: Free stdout pathAkihiko Odaki1-1/+1
2024-07-26spapr: Migrate ail-mode-3 spapr capNicholas Piggin3-0/+3
2024-07-26tests/tcg: Skip failing ppc64 multi-threaded testsNicholas Piggin1-0/+12
2024-07-25util/async.c: Forbid negative min/max in aio_context_set_thread_pool_params()Peter Maydell1-1/+1
2024-07-25Merge tag 'bsd-user-for-9.1-pull-request' of gitlab.com:bsdimp/qemu into stagingRichard Henderson23-153/+1021
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