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2019-11-11tcg/ppc/tcg-target.opc.h: Add copyright/licensePeter Maydell1-0/+20
Add the copyright/license boilerplate for tcg/i386/tcg-target.opc.h. This file has had only two commits, 4b06c216826b7e4 and d9897efa1fd3174ec, both by a Linaro engineer. The license is MIT, since that's what the rest of tcg/ppc/ is. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20191025155848.17362-4-peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-11-11tcg/i386/tcg-target.opc.h: Add copyright/licensePeter Maydell1-3/+25
Add the copyright/license boilerplate for tcg/i386/tcg-target.opc.h. This file has had only one commit, 770c2fc7bb70804a, by a Linaro engineer. The license is MIT, since that's what the rest of tcg/i386/ is. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20191025155848.17362-3-peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-11-11tcg/aarch64/tcg-target.opc.h: Add copyright/licensePeter Maydell1-3/+12
Add the copyright/license boilerplate for target/aarch64/tcg-target.opc.h. This file has only had two commits: 14e4c1e2355473ccb29 and 79525dfd08262d8, both by the same Linaro engineer. The license is GPL-2-or-later, since that's what the rest of tcg/aarch64 uses. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20191025155848.17362-2-peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-11-08dp8393x: fix dp8393x_receive()Laurent Vivier1-3/+9
RXpkt.in_use is always 16 bit wide, but when the bus access mode is 32bit and the endianness is big, we must access the second word and not the first. This patch adjusts the offset according to the size and endianness. This fixes DHCP for Q800 guest. Fixes: be9208419865 ("dp8393x: manage big endian bus") Signed-off-by: Laurent Vivier <laurent@vivier.eu> Tested-by: Hervé Poussineau <hpoussin@reactos.org> Message-Id: <20191106112341.23735-3-laurent@vivier.eu>
2019-11-08dp8393x: put the DMA buffer in the state structureLaurent Vivier1-55/+50
Move it from the stack. It's only 24 bytes, and this simplifies the dp8393x_get()/ dp8393x_put() interface. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Hervé Poussineau <hpoussin@reactos.org> Message-Id: <20191106112341.23735-2-laurent@vivier.eu>
2019-11-07Update version for v4.2.0-rc0 releasePeter Maydell1-1/+1
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-11-07iotests: Add test for 4G+ compressed qcow2 writeMax Reitz3-0/+90
Test what qemu-img check says about an image after one has written compressed data to an offset above 4 GB. Signed-off-by: Max Reitz <mreitz@redhat.com> Message-id: 20191028161841.1198-3-mreitz@redhat.com Reviewed-by: Alberto Garcia <berto@igalia.com> Signed-off-by: Max Reitz <mreitz@redhat.com>
2019-11-07qcow2: Fix QCOW2_COMPRESSED_SECTOR_MASKMax Reitz1-1/+1
Masks for L2 table entries should have 64 bit. Fixes: b6c246942b14d3e0dec46a6c5868ed84e7dbea19 Buglink: https://bugs.launchpad.net/qemu/+bug/1850000 Cc: qemu-stable@nongnu.org Signed-off-by: Max Reitz <mreitz@redhat.com> Message-id: 20191028161841.1198-2-mreitz@redhat.com Reviewed-by: Alberto Garcia <berto@igalia.com> Signed-off-by: Max Reitz <mreitz@redhat.com>
2019-11-07qcow2-bitmap: Fix uint64_t left-shift overflowTuguoyi1-3/+11
There are two issues in In check_constraints_on_bitmap(), 1) The sanity check on the granularity will cause uint64_t integer left-shift overflow when cluster_size is 2M and the granularity is BIGGER than 32K. 2) The way to calculate image size that the maximum bitmap supported can map to is a bit incorrect. This patch fix it by add a helper function to calculate the number of bytes needed by a normal bitmap in image and compare it to the maximum bitmap bytes supported by qemu. Fixes: 5f72826e7fc62167cf3a Signed-off-by: Guoyi Tu <tu.guoyi@h3c.com> Message-id: 4ba40cd1e7ee4a708b40899952e49f22@h3c.com Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Cc: qemu-stable@nongnu.org Signed-off-by: Max Reitz <mreitz@redhat.com>
2019-11-06global: Squash 'the the'Dr. David Alan Gilbert6-6/+6
'the' has a tendency to double up; squash them back down. Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20191104185202.102504-1-dgilbert@redhat.com> [lv: removed disas/libvixl/vixl/invalset.h change] Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-11-06linux-user/alpha: Set r20 secondary return valueRichard Henderson1-0/+9
This value is not, as far as I know, used by any linux software, but it is set by the kernel and is part of the ABI. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20191106113318.10226-13-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-11-06linux-user/sparc: Fix cpu_clone_regs_*Richard Henderson1-7/+36
We failed to set the secondary return value in %o1 we failed to advance the PC past the syscall, we failed to adjust regwptr into the new structure, we stored the stack pointer into the wrong register. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20191106113318.10226-12-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-11-06linux-user: Introduce cpu_clone_regs_parentRichard Henderson19-0/+74
We will need a target-specific hook for adjusting registers in the parent during clone. Add an empty inline function for each target, and invoke it from the proper places. Reviewed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20191106113318.10226-11-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-11-06linux-user: Rename cpu_clone_regs to cpu_clone_regs_childRichard Henderson19-20/+40
We will need a target-specific hook for adjusting registers in the parent during clone. To avoid confusion, rename the one we have to make it clear it affects the child. At the same time, pass in the flags from the clone syscall. We will need them for correct behaviour for Sparc. Reviewed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20191106113318.10226-10-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-11-06linux-user/sparc64: Fix target_signal_frameRichard Henderson1-2/+2
Instructions are always 4 bytes; use uint32_t not abi_ulong. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20191106113318.10226-9-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-11-06linux-user/sparc: Fix WREG usage in setup_frameRichard Henderson1-1/+1
Use WREG_I0 not WREG_O0 in order to properly save the "ins". The "outs" were saved separately in setup___siginfo. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20191106113318.10226-8-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-11-06linux-user/sparc: Use WREG_SP constant in sparc/signal.cRichard Henderson1-5/+2
s/UREG_FP/WREG_SP/g This is non-obvious because the UREG_FP constant is fact wrong. However, the previous search-and-replace patch made it clear that UREG_FP expands to WREG_O6, and we can see from the enumeration in target/sparc/cpu.h that WREG_O6 is in fact WREG_SP, the stack pointer. The UREG_SP define is unused; remove it. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20191106113318.10226-7-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-11-06linux-user/sparc: Begin using WREG constants in sparc/signal.cRichard Henderson1-62/+33
This is non-obvious because the UREG constants are in fact wrong. s/UREG_I/WREG_O/g s/UREG_O/WREG_I/g s/UREG_L/WREG_L/g These substitutions have identical integer values. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20191106113318.10226-6-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-11-06linux-user/sparc: Use WREG constants in sparc/target_cpu.hRichard Henderson1-8/+2
This fixes a naming bug wherein we used "UREG_FP" to access the stack pointer. OTOH, the "UREG_FP" constant was also defined incorrectly such that it *did* reference the stack pointer. Note that the kernel legitimately uses the name "FP", because it utilizes the rolled stack window in processing the system call. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20191106113318.10226-5-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-11-06target/sparc: Define an enumeration for accessing env->regwptrRichard Henderson1-0/+33
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20191106113318.10226-4-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-11-06tests/tcg/multiarch/linux-test: Fix error check for shmatRichard Henderson1-1/+2
The error indicator for this syscall is -1, not 0. Fixes: e374bfa35bfb ("shm tests - disabled clone test") Reviewed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20191106113318.10226-3-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-11-06scripts/qemu-binfmt-conf: Update for sparc64Richard Henderson1-2/+6
Also note that we were missing the qemu_target_list entry for plain sparc; fix that at the same time. Reviewed-by: Laurent Vivier <laurent@vivier.eu> Tested-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20191106113318.10226-2-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-11-06usb-host: add option to allow all resets.Gerd Hoffmann1-4/+9
Commit 65f14ab98da1 ("usb-host: skip reset for untouched devices") filters out multiple usb device resets in a row. While this improves the situation for usb some devices it doesn't work for others :-( So go add a config option to make the behavior configurable. Buglink: https://bugs.launchpad.net/bugs/1846451 Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20191015064426.19454-1-kraxel@redhat.com
2019-11-06virtio: notify virtqueue via host notifier when availableStefan Hajnoczi3-1/+13
Host notifiers are used in several cases: 1. Traditional ioeventfd where virtqueue notifications are handled in the main loop thread. 2. IOThreads (aio_handle_output) where virtqueue notifications are handled in an IOThread AioContext. 3. vhost where virtqueue notifications are handled by kernel vhost or a vhost-user device backend. Most virtqueue notifications from the guest use the ioeventfd mechanism, but there are corner cases where QEMU code calls virtio_queue_notify(). This currently honors the host notifier for the IOThreads aio_handle_output case, but not for the vhost case. The result is that vhost does not receive virtqueue notifications from QEMU when virtio_queue_notify() is called. This patch extends virtio_queue_notify() to set the host notifier whenever it is enabled instead of calling the vq->(aio_)handle_output() function directly. We track the host notifier state for each virtqueue separately since some devices may use it only for certain virtqueues. This fixes the vhost case although it does add a trip through the eventfd for the traditional ioeventfd case. I don't think it's worth adding a fast path for the traditional ioeventfd case because calling virtio_queue_notify() is rare when ioeventfd is enabled. Reported-by: Felipe Franciosi <felipe@nutanix.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Message-Id: <20191105140946.165584-1-stefanha@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2019-11-06hw/rdma: Utilize ibv_reg_mr_iova for memory registrationYuval Shaia4-0/+29
The virtual address that is provided by the guest in post_send and post_recv operations is related to the guest address space. This address space is unknown to the HCA resides on host so extra step in these operations is needed to adjust the address to host virtual address. This step, which is done in data-path affects performances. An enhanced verion of MR registration introduced here https://patchwork.kernel.org/patch/11044467/ can be used so that the guest virtual address space for this MR is known to the HCA in host. This will save the data-path adjustment. Signed-off-by: Yuval Shaia <yuval.shaia@oracle.com> Reviewed-by: Marcel Apfelbaum <marcel.apfelbaum@gmail.com> Message-Id: <20190818132107.18181-3-yuval.shaia@oracle.com> Signed-off-by: Marcel Apfelbaum <marcel.apfelbaum@gmail.com>
2019-11-06configure: Check if we can use ibv_reg_mr_iovaYuval Shaia1-0/+28
The function reg_mr_iova is an enhanced version of ibv_reg_mr function that can help to easly register and use guest's MRs. Add check in 'configure' phase to detect if we have libibverbs with this support. Signed-off-by: Yuval Shaia <yuval.shaia@oracle.com> Reviewed-by: Marcel Apfelbaum <marcel.apfelbaum@gmail.com> Message-Id: <20190818132107.18181-2-yuval.shaia@oracle.com> Signed-off-by: Marcel Apfelbaum <marcel.apfelbaum@gmail.com>
2019-11-06audio: add -audiodev pa,in|out.latency= to documentationStefan Hajnoczi1-0/+5
The "latency" parameter wasn't covered by the documentation. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-id: 20191004125641.24383-1-stefanha@redhat.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2019-11-05hw/pci-host/i440fx: Remove the last PIIX3 tracesPhilippe Mathieu-Daudé3-11/+8
The PIIX3 is not tied to the i440FX and can even be used without it. Move its creation to the machine code (pc_piix.c). We have now removed the last trace of southbridge code in the i440FX northbridge. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-11-05hw/pci-host: Rename incorrectly named 'piix' as 'i440fx'Philippe Mathieu-Daudé5-4/+4
We moved all the PIIX3 southbridge code out of hw/pci-host/piix.c, it now only contains i440FX northbridge code. Rename it to match the chipset modelled. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-11-05hw/pci-host/piix: Extract PIIX3 functions to hw/isa/piix3.cPhilippe Mathieu-Daudé8-403/+442
Move all the PIIX3 functions to a new file: hw/isa/piix3.c. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-11-05hw/pci-host/piix: Fix code style issuesPhilippe Mathieu-Daudé1-3/+4
We will move this code, fix its style first. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Esteban Bosse <estebanbosse@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-11-05hw/pci-host/piix: Move i440FX declarations to hw/pci-host/i440fx.hPhilippe Mathieu-Daudé7-24/+43
The hw/pci-host/piix.c contains a mix of PIIX3 and i440FX chipsets functions. To be able to split it, we need to export some declarations first. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-11-05hw/pci-host/piix: Define and use the PIIX IRQ Route Control RegistersPhilippe Mathieu-Daudé4-9/+15
The IRQ Route Control registers definitions belong to the PIIX chipset. We were only defining the 'A' register. Define the other B, C and D registers, and use them. Acked-by: Paul Durrant <paul@xen.org> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-11-05hw/pci-host/piix: Move RCR_IOPORT register definitionPhilippe Mathieu-Daudé5-11/+12
The RCR_IOPORT register belongs to the PIIX chipset. Move the definition to "piix.h", and prepend the PIIX prefix. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-11-05hw/pci-host/piix: Extract piix3_create()Philippe Mathieu-Daudé1-20/+31
Extract the PIIX3 creation code from the i440fx_init() function. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Esteban Bosse <estebanbosse@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-11-05hw/i386: Remove obsolete LoadStateHandler::load_state_old handlersPhilippe Mathieu-Daudé4-154/+0
These devices implemented their load_state_old() handler 10 years ago, previous to QEMU v0.12. Since commit cc425b5ddf removed the pc-0.10 and pc-0.11 machines, we can drop this code. Note: the mips_r4k machine started to use the i8254 device just after QEMU v0.5.0, but the MIPS machine types are not versioned, so there is no migration compatibility issue removing this handler. Suggested-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-11-05hw/isa/piix4: Move piix4_create() to hw/isa/piix4.cPhilippe Mathieu-Daudé5-30/+37
Now that we properly refactored the piix4_create() function, let's move it to hw/isa/piix4.c where it belongs, so it can be reused on other places. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-11-05hw/mips/mips_malta: Extract the PIIX4 creation code as piix4_create()Philippe Mathieu-Daudé1-18/+29
The Malta board instantiate a PIIX4 chipset doing various calls. Refactor all those related calls into a single function: piix4_create(). Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-11-05hw/mips/mips_malta: Create IDE hard drive array dynamicallyPhilippe Mathieu-Daudé1-2/+5
In the next commit we'll refactor the PIIX4 code out of mips_malta_init(). As a preliminary step, add the 'ide_drives' variable and create the drive array dynamically. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Li Qiang <liq3ea@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-11-05piix4: Add a MC146818 RTC Controller as specified in datasheetPhilippe Mathieu-Daudé9-19/+48
Remove mc146818rtc instanciated in malta board, to not have it twice. Acked-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> Message-Id: <20171216090228.28505-13-hpoussin@reactos.org> [PMD: rebased, set RTC base_year to 2000] Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-11-05piix4: Add an i8254 PIT Controller as specified in datasheetHervé Poussineau2-4/+4
Remove i8254 instanciated in malta board, to not have it twice. Acked-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> Message-Id: <20171216090228.28505-10-hpoussin@reactos.org> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-11-05piix4: Add an i8257 DMA Controller as specified in datasheetHervé Poussineau2-2/+4
The i8257 is not a chipset on the Malta board, but is part of the PIIX4 chipset. Create the i8257 in the PIIX4 code, remove the one instantiated in malta board, to not have it twice. Acked-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> Message-Id: <20171216090228.28505-9-hpoussin@reactos.org> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Esteban Bosse <estebanbosse@gmail.com> [PMD: rebased, reworded description] Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-11-05piix4: Rename PIIX4 object to piix4-isaHervé Poussineau3-2/+3
Other piix4 parts are already named piix4-ide and piix4-usb-uhci. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> Message-Id: <20171216090228.28505-15-hpoussin@reactos.org> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Li Qiang <liq3ea@gmail.com> Reviewed-by: Esteban Bosse <estebanbosse@gmail.com> [PMD: rebased] Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-11-05Revert "irq: introduce qemu_irq_proxy()"Philippe Mathieu-Daudé2-19/+0
This function isn't used anymore. This reverts commit 22ec3283efba9ba0792790da786d6776d83f2a92. Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Li Qiang <liq3ea@gmail.com> Reviewed-by: Esteban Bosse <estebanbosse@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2019-11-05piix4: Add an i8259 Interrupt Controller as specified in datasheetHervé Poussineau3-30/+44
Add ISA irqs as piix4 gpio in, and CPU interrupt request as piix4 gpio out. Remove i8259 instanciated in malta board, to not have it twice. We can also remove the now unused piix4_init() function. Acked-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> Message-Id: <20171216090228.28505-8-hpoussin@reactos.org> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> [PMD: rebased, updated includes, use ISA_NUM_IRQS in for loop] Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-11-05piix4: Add the Reset Control RegisterHervé Poussineau1-3/+46
The RCR I/O port (0xcf9) is used to generate a hard reset or a soft reset. Acked-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> Message-Id: <20171216090228.28505-7-hpoussin@reactos.org> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Li Qiang <liq3ea@gmail.com> [PMD: rebased, updated includes] Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-11-05MAINTAINERS: Keep PIIX4 South Bridge separate from PC ChipsetsPhilippe Mathieu-Daudé1-1/+6
The PIIX4 Southbridge is not used by the PC machine, but by the Malta board (MIPS). Add a new section to keep it covered. Suggested-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Li Qiang <liq3ea@163.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2019-11-05Makefile: Fix config-devices.mak not regenerated when Kconfig updatedPhilippe Mathieu-Daudé1-1/+2
When hw/$DIR/Kconfig is changed, the corresponding generated hw/$DIR/config-devices.mak is not being updated. Fix this by including all the hw/*/Kconfig files to the prerequisite names of the rule generating the config-devices.mak files. Fixes: e0e312f3525a (build: switch to Kconfig) Reported-by: Peter Maydell <peter.maydell@linaro.org> Suggested-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Laurent Vivier <lvivier@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-11-05q800: fix I/O memory mapLaurent Vivier1-8/+32
Linux kernel 5.4 will introduce a new memory map for SWIM device. (aee6bff1c325 ("m68k: mac: Revisit floppy disc controller base addresses")) Until this release all MMIO are mapped between 0x50f00000 and 0x50f40000, but it appears that for real hardware 0x50f00000 is not the base address: the MMIO region spans 0x50000000 through 0x60000000, and 0x50040000 through 0x54000000 is repeated images of 0x50000000 to 0x50040000. Fixed: 04e7ca8d0f ("hw/m68k: define Macintosh Quadra 800") Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20191104101513.29518-1-laurent@vivier.eu> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-11-05image-fuzzer: Use OSerror.strerror instead of tuple subscriptEduardo Habkost1-2/+2
OSError can't be used like a tuple on Python 3, so change the code to use `e.sterror` instead of `e[1]`. Reported-by: John Snow <jsnow@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: John Snow <jsnow@redhat.com> Message-id: 20191021214117.18091-1-ehabkost@redhat.com Message-Id: <20191021214117.18091-1-ehabkost@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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