From 08637bc69ed6e38ca08acef6218662bde58ec8bc Mon Sep 17 00:00:00 2001 From: Grant Meyerhoff Date: Tue, 2 Apr 2024 16:29:06 -0500 Subject: ci: Allow for using PR Pipeline for FPGA source --- .ci/templates/job-uhd-devtest.yml | 10 ++--- .ci/templates/job-uhd-rf-tests.yml | 10 ++--- .ci/templates/job-uhd-streaming-tests.yml | 8 ++-- .../templates/job-uhd-x4xx-hardware-tests.yml | 4 +- .ci/uhd-hardware-test-dev.yml | 49 ++++++++++++++++++---- 5 files changed, 56 insertions(+), 25 deletions(-) diff --git a/.ci/templates/job-uhd-devtest.yml b/.ci/templates/job-uhd-devtest.yml index c818a73a1..bdb685e0a 100644 --- a/.ci/templates/job-uhd-devtest.yml +++ b/.ci/templates/job-uhd-devtest.yml @@ -69,14 +69,14 @@ jobs: echo '##vso[task.setvariable variable=uhd_fpga_artifact_directory]'$(Agent.BuildDirectory)/${{ parameters.uhdFpgaArtifactSource }} fi displayName: Set uhddev FPGA pipeline artifact location - condition: and(succeeded(), and(eq('${{ parameters.fpga_imgs_source }}', 'FPGA Pipeline'), ne(variables.devType, 'b200'))) + condition: and(succeeded(), and(in('${{ parameters.fpga_imgs_source }}', 'FPGA Pipeline', 'FPGA Pipeline PR'), ne(variables.devType, 'b200'))) - script: | if [ ! -z "${{ parameters.uhdFpgaArtifactSource }}" ]; then rm -rf $(Agent.BuildDirectory)/${{ parameters.uhdFpgaArtifactSource }} fi displayName: Cleanup from prior run - condition: and(succeeded(), eq('${{ parameters.fpga_imgs_source }}', 'FPGA Pipeline'), ne(variables.devType, 'b200')) + condition: and(succeeded(), in('${{ parameters.fpga_imgs_source }}', 'FPGA Pipeline', 'FPGA Pipeline PR'), ne(variables.devType, 'b200')) - download: ${{ parameters.uhdArtifactSource }} artifact: uhddev-${{ parameters.testOS }}-${{ parameters.toolset }} @@ -114,13 +114,13 @@ jobs: usrp_$(devModel)*.dts usrp_$(devModel)*.rpt displayName: Download FPGA artifacts - condition: and(succeeded(), and(eq('${{ parameters.fpga_imgs_source }}', 'FPGA Pipeline'), ne(variables.devType, 'b200'))) + condition: and(succeeded(), and(in('${{ parameters.fpga_imgs_source }}', 'FPGA Pipeline', 'FPGA Pipeline PR'), ne(variables.devType, 'b200'))) - script: | mkdir -p $(Build.BinariesDirectory)/uhddev/build/fpga_images/ cp $(uhd_fpga_artifact_directory)/*/* $(Build.BinariesDirectory)/uhddev/build/fpga_images/ displayName: Copy FPGA images to expected directory - condition: and(succeeded(), and(eq('${{ parameters.fpga_imgs_source }}', 'FPGA Pipeline'), ne(variables.devType, 'b200'))) + condition: and(succeeded(), and(in('${{ parameters.fpga_imgs_source }}', 'FPGA Pipeline', 'FPGA Pipeline PR'), ne(variables.devType, 'b200'))) - script: | cd $(Build.BinariesDirectory)/uhddev/build @@ -133,7 +133,7 @@ jobs: -b $(sdr-fileserver) fi displayName: Download FPGA Images - condition: and(succeeded(), or(ne('${{ parameters.fpga_imgs_source }}', 'FPGA Pipeline'), eq(variables.devType, 'b200'))) + condition: and(succeeded(), or(not(in('${{ parameters.fpga_imgs_source }}', 'FPGA Pipeline', 'FPGA Pipeline PR')), eq(variables.devType, 'b200'))) - script: | mkdir -p $(Common.TestResultsDirectory)/devtest diff --git a/.ci/templates/job-uhd-rf-tests.yml b/.ci/templates/job-uhd-rf-tests.yml index 13ae0af4f..7d6ce199d 100644 --- a/.ci/templates/job-uhd-rf-tests.yml +++ b/.ci/templates/job-uhd-rf-tests.yml @@ -63,14 +63,14 @@ jobs: echo '##vso[task.setvariable variable=uhd_fpga_artifact_directory]'$(Agent.BuildDirectory)/${{ parameters.uhdFpgaArtifactSource }} fi displayName: Set uhddev FPGA pipeline artifact location - condition: and(succeeded(), eq('${{ parameters.fpga_imgs_source }}', 'FPGA Pipeline')) + condition: and(succeeded(), in('${{ parameters.fpga_imgs_source }}', 'FPGA Pipeline', 'FPGA Pipeline PR')) - script: | if [ ! -z "${{ parameters.uhdFpgaArtifactSource }}" ]; then rm -rf $(Agent.BuildDirectory)/${{ parameters.uhdFpgaArtifactSource }} fi displayName: Cleanup from prior run - condition: and(succeeded(), eq('${{ parameters.fpga_imgs_source }}', 'FPGA Pipeline')) + condition: and(succeeded(), in('${{ parameters.fpga_imgs_source }}', 'FPGA Pipeline', 'FPGA Pipeline PR')) - download: ${{ parameters.uhdArtifactSource }} artifact: uhddev-${{ parameters.testOS }}-${{ parameters.toolset }} @@ -112,13 +112,13 @@ jobs: usrp_$(devModel)*.dts usrp_$(devModel)*.rpt displayName: Download FPGA artifacts - condition: and(succeeded(), eq('${{ parameters.fpga_imgs_source }}', 'FPGA Pipeline')) + condition: and(succeeded(), in('${{ parameters.fpga_imgs_source }}', 'FPGA Pipeline', 'FPGA Pipeline PR')) - script: | mkdir -p $(Build.BinariesDirectory)/uhddev/build/fpga_images/ cp $(uhd_fpga_artifact_directory)/*/* $(Build.BinariesDirectory)/uhddev/build/fpga_images/ displayName: Copy FPGA images to expected directory - condition: and(succeeded(), eq('${{ parameters.fpga_imgs_source }}', 'FPGA Pipeline')) + condition: and(succeeded(), in('${{ parameters.fpga_imgs_source }}', 'FPGA Pipeline', 'FPGA Pipeline PR')) - script: | @@ -132,7 +132,7 @@ jobs: -b $(sdr-fileserver) fi displayName: Download FPGA Images - condition: and(succeeded(), ne('${{ parameters.fpga_imgs_source }}', 'FPGA Pipeline')) + condition: and(succeeded(), not(in('${{ parameters.fpga_imgs_source }}', 'FPGA Pipeline', 'FPGA Pipeline PR'))) - script: | diff --git a/.ci/templates/job-uhd-streaming-tests.yml b/.ci/templates/job-uhd-streaming-tests.yml index f30d55b2e..0e7a6ccdb 100644 --- a/.ci/templates/job-uhd-streaming-tests.yml +++ b/.ci/templates/job-uhd-streaming-tests.yml @@ -79,7 +79,7 @@ jobs: rm -rf $(Agent.BuildDirectory)/${{ parameters.uhdFpgaArtifactSource }} fi displayName: Cleanup from prior run - condition: eq('${{ parameters.fpga_imgs_source }}', 'FPGA Pipeline') + condition: in('${{ parameters.fpga_imgs_source }}', 'FPGA Pipeline', 'FPGA Pipeline PR') - download: ${{ parameters.uhdArtifactSource }} artifact: $(dutEmbeddedImagesArtifact) @@ -92,7 +92,7 @@ jobs: usrp_$(dutType)*.dts usrp_$(dutType)*.rpt displayName: Download FPGA artifacts - condition: eq('${{ parameters.fpga_imgs_source }}', 'FPGA Pipeline') + condition: in('${{ parameters.fpga_imgs_source }}', 'FPGA Pipeline', 'FPGA Pipeline PR') - task: ExtractFiles@1 inputs: @@ -162,7 +162,7 @@ jobs: ssh -o StrictHostKeyChecking=no -tt root@$USRP_EMB_TARGET_IP "md5sum /usr/share/uhd/images/usrp_$(dutType)_fpga_$(dutFPGA).bit > /usr/share/uhd/images/usrp_$(dutType)_fpga_$(dutFPGA).bit.md5" ssh -o StrictHostKeyChecking=no -tt root@$USRP_EMB_TARGET_IP "md5sum /usr/share/uhd/images/usrp_$(dutType)_fpga_$(dutFPGA).dts > /usr/share/uhd/images/usrp_$(dutType)_fpga_$(dutFPGA).dts.md5" displayName: Copy FPGA pipeline images to device - condition: and(succeeded(), eq(variables.dutFamily, 'x4xx'), eq('${{ parameters.fpga_imgs_source }}', 'FPGA Pipeline')) + condition: and(succeeded(), eq(variables.dutFamily, 'x4xx'), in('${{ parameters.fpga_imgs_source }}', 'FPGA Pipeline', 'FPGA Pipeline PR')) - script: | ssh-keygen -f ~/.ssh/known_hosts -R $USRP_EMB_TARGET_IP @@ -182,7 +182,7 @@ jobs: - script: | export UHD_IMAGES_DIR=$(Build.BinariesDirectory)/uhddev/build-installed/share/uhd/images - if [ "${{ parameters.fpga_imgs_source }}" = "FPGA Pipeline" ]; then + if [ "${{ parameters.fpga_imgs_source }}" = "FPGA Pipeline" or "${{ parameters.fpga_imgs_source }}" = "FPGA Pipeline PR"]; then cp $(uhd_fpga_artifact_directory)/*/* $(Build.BinariesDirectory)/uhddev/build-installed/share/uhd/images/ else $(Build.BinariesDirectory)/uhddev/build-installed/bin/uhd_images_downloader -t x310 diff --git a/.ci/templates/tests/templates/job-uhd-x4xx-hardware-tests.yml b/.ci/templates/tests/templates/job-uhd-x4xx-hardware-tests.yml index 4ac4fbf65..b2bec65bb 100644 --- a/.ci/templates/tests/templates/job-uhd-x4xx-hardware-tests.yml +++ b/.ci/templates/tests/templates/job-uhd-x4xx-hardware-tests.yml @@ -95,7 +95,7 @@ jobs: usrp_$(pytestDUT)_fpga_$(dutFPGA).dts usrp_$(pytestDUT)_fpga_$(dutFPGA).rpt displayName: Download FPGA pipeline artifacts - condition: and(succeeded(), eq('${{ parameters.fpga_imgs_source }}', 'FPGA Pipeline')) + condition: and(succeeded(), in('${{ parameters.fpga_imgs_source }}', 'FPGA Pipeline', 'FPGA Pipeline PR')) - task: ExtractFiles@1 inputs: @@ -180,7 +180,7 @@ jobs: ssh -o StrictHostKeyChecking=no -tt root@$USRP_EMB_TARGET_IP "md5sum /usr/share/uhd/images/usrp_$(pytestDUT)_fpga_$(dutFPGA).bit > /usr/share/uhd/images/usrp_$(pytestDUT)_fpga_$(dutFPGA).bit.md5" ssh -o StrictHostKeyChecking=no -tt root@$USRP_EMB_TARGET_IP "md5sum /usr/share/uhd/images/usrp_$(pytestDUT)_fpga_$(dutFPGA).dts > /usr/share/uhd/images/usrp_$(pytestDUT)_fpga_$(dutFPGA).dts.md5" displayName: Copy FPGA pipeline images to device - condition: and(succeeded(), eq('${{ parameters.fpga_imgs_source }}', 'FPGA Pipeline')) + condition: and(succeeded(), in('${{ parameters.fpga_imgs_source }}', 'FPGA Pipeline', 'FPGA Pipeline PR')) - script: | ssh-keygen -f ~/.ssh/known_hosts -R $USRP_EMB_TARGET_IP diff --git a/.ci/uhd-hardware-test-dev.yml b/.ci/uhd-hardware-test-dev.yml index 1883745b1..1ba2f1b69 100644 --- a/.ci/uhd-hardware-test-dev.yml +++ b/.ci/uhd-hardware-test-dev.yml @@ -44,6 +44,7 @@ parameters: values: - 'Filesytem/Images Downloader' - 'FPGA Pipeline' + - 'FPGA Pipeline PR' displayName: FPGA Images Source default: 'Filesytem/Images Downloader' - name: extra_rf_test_args @@ -68,6 +69,9 @@ resources: - pipeline: uhd_fpga_pipeline source: 'uhddev fpga pipeline' branch: master + - pipeline: uhd_fpga_pr_pipeline + source: 'uhddev fpga pipeline PR' + branch: master repositories: - repository: meta-ettus type: github @@ -95,7 +99,10 @@ stages: parameters: testOS: ubuntu1804 uhdArtifactSource: uhd_mono_pipeline - uhdFpgaArtifactSource: uhd_fpga_pipeline + ${{ if eq(parameters.fpga_imgs_source, 'FPGA Pipeline PR') }}: + uhdFpgaArtifactSource: uhd_fpga_pr_pipeline + ${{ else }}: + uhdFpgaArtifactSource: uhd_fpga_pipeline fpga_imgs_source: ${{ parameters.fpga_imgs_source }} - stage: test_uhd_x440_embedded_stage @@ -107,7 +114,10 @@ stages: parameters: testOS: ubuntu1804 uhdArtifactSource: uhd_mono_pipeline - uhdFpgaArtifactSource: uhd_fpga_pipeline + ${{ if eq(parameters.fpga_imgs_source, 'FPGA Pipeline PR') }}: + uhdFpgaArtifactSource: uhd_fpga_pr_pipeline + ${{ else }}: + uhdFpgaArtifactSource: uhd_fpga_pipeline fpga_imgs_source: ${{ parameters.fpga_imgs_source }} - stage: test_streaming_stage @@ -120,7 +130,10 @@ stages: testOS: ubuntu2004 uhdSrcDir: $(Build.SourcesDirectory)/uhddev uhdArtifactSource: uhd_mono_pipeline - uhdFpgaArtifactSource: uhd_fpga_pipeline + ${{ if eq(parameters.fpga_imgs_source, 'FPGA Pipeline PR') }}: + uhdFpgaArtifactSource: uhd_fpga_pr_pipeline + ${{ else }}: + uhdFpgaArtifactSource: uhd_fpga_pipeline fpga_imgs_source: ${{ parameters.fpga_imgs_source }} testLength: ${{ parameters.testLength }} @@ -134,7 +147,10 @@ stages: testOS: ubuntu2204 uhdSrcDir: $(Build.SourcesDirectory)/uhddev uhdArtifactSource: uhd_mono_pipeline - uhdFpgaArtifactSource: uhd_fpga_pipeline + ${{ if eq(parameters.fpga_imgs_source, 'FPGA Pipeline PR') }}: + uhdFpgaArtifactSource: uhd_fpga_pr_pipeline + ${{ else }}: + uhdFpgaArtifactSource: uhd_fpga_pipeline fpga_imgs_source: ${{ parameters.fpga_imgs_source }} testLength: ${{ parameters.testLength }} @@ -148,7 +164,10 @@ stages: testOS: ubuntu2004 uhdSrcDir: $(Build.SourcesDirectory) uhdArtifactSource: uhd_mono_pipeline - uhdFpgaArtifactSource: uhd_fpga_pipeline + ${{ if eq(parameters.fpga_imgs_source, 'FPGA Pipeline PR') }}: + uhdFpgaArtifactSource: uhd_fpga_pr_pipeline + ${{ else }}: + uhdFpgaArtifactSource: uhd_fpga_pipeline fpga_imgs_source: ${{ parameters.fpga_imgs_source }} - stage: test_n310_rf_tests @@ -161,7 +180,10 @@ stages: testOS: ubuntu1804 uhdSrcDir: $(Build.SourcesDirectory)/uhddev uhdArtifactSource: uhd_mono_pipeline - uhdFpgaArtifactSource: uhd_fpga_pipeline + ${{ if eq(parameters.fpga_imgs_source, 'FPGA Pipeline PR') }}: + uhdFpgaArtifactSource: uhd_fpga_pr_pipeline + ${{ else }}: + uhdFpgaArtifactSource: uhd_fpga_pipeline fpga_imgs_source: ${{ parameters.fpga_imgs_source }} extra_rf_test_args: ${{ parameters.extra_rf_test_args }} @@ -174,7 +196,10 @@ stages: parameters: testOS: ubuntu1804 uhdArtifactSource: uhd_mono_pipeline - uhdFpgaArtifactSource: uhd_fpga_pipeline + ${{ if eq(parameters.fpga_imgs_source, 'FPGA Pipeline PR') }}: + uhdFpgaArtifactSource: uhd_fpga_pr_pipeline + ${{ else }}: + uhdFpgaArtifactSource: uhd_fpga_pipeline fpga_imgs_source: ${{ parameters.fpga_imgs_source }} extra_rf_test_args: ${{ parameters.extra_rf_test_args }} testLength: ${{ parameters.testLength }} @@ -189,7 +214,10 @@ stages: parameters: testOS: ubuntu1804 uhdArtifactSource: uhd_mono_pipeline - uhdFpgaArtifactSource: uhd_fpga_pipeline + ${{ if eq(parameters.fpga_imgs_source, 'FPGA Pipeline PR') }}: + uhdFpgaArtifactSource: uhd_fpga_pr_pipeline + ${{ else }}: + uhdFpgaArtifactSource: uhd_fpga_pipeline fpga_imgs_source: ${{ parameters.fpga_imgs_source }} extra_rf_test_args: ${{ parameters.extra_rf_test_args }} testLength: ${{ parameters.testLength }} @@ -203,7 +231,10 @@ stages: parameters: testOS: ubuntu2204 uhdArtifactSource: uhd_mono_pipeline - uhdFpgaArtifactSource: uhd_fpga_pipeline + ${{ if eq(parameters.fpga_imgs_source, 'FPGA Pipeline PR') }}: + uhdFpgaArtifactSource: uhd_fpga_pr_pipeline + ${{ else }}: + uhdFpgaArtifactSource: uhd_fpga_pipeline fpga_imgs_source: ${{ parameters.fpga_imgs_source }} ${{ if contains(parameters['extra_rf_test_args'], 'test_selector') }}: extra_rf_test_args: ${{ parameters.extra_rf_test_args }} -- cgit v1.2.3-59-g8ed1b