wireguard-linux, branch devel

Merge branch 'first-series-for-xpcs-based-rsfec-configuration'

2026-05-05T12:40:40Z

Mike Marciniszyn says: ==================== first series for xpcs based rsfec configuration The series: - Fixes an addr validation error - Adds MDIO defines associated with RS-FEC - consolidates the handling of the boilerplat ID registers into a routine to report id'ish registers and reduces the lines of code across the entire set of c45 routines. - adds PMA read/write routines https://lore.kernel.org/all/20260428172810.175077-2-mike.marciniszyn@gmail.com/ has been removed from the series and submitted to net as https://lore.kernel.org/all/20260429150049.1643-1-mike.marciniszyn@gmail.com/ pcs reads for DEVS1 and DEVS2 cleaned up 2/3 ==================== Link: https://patch.msgid.link/20260430150802.3521-1-mike.marciniszyn@gmail.com Signed-off-by: Paolo Abeni

net: eth: fbnic: Add pma read and write access

2026-05-05T12:40:39Z

Document the MDIO interface topology with an ASCII diagram showing the MAC, PCS (MMD 3), FEC, Separated PMA (MMD 8), and PMD (MMD 1) blocks and their interconnects. The diagram illustrates how 4 lanes connect the MAC through PCS, FEC, and PMA, then narrow to 2 lanes at the PMD. The c45 read and write routines are enhanced to support read and write of the separated PMA for the fbnic. Co-developed-by: Alexander Duyck Signed-off-by: Alexander Duyck Signed-off-by: Mike Marciniszyn (Meta) Link: https://patch.msgid.link/20260430150802.3521-4-mike.marciniszyn@gmail.com Signed-off-by: Paolo Abeni

net: eth: fbnic: Consolidate register reads for ids and devs

2026-05-05T12:40:39Z

Consolidate the register reads for boiler plate registers to reduce LOC and cleanup pcs reads for DEVS1 to fetch overrides for reserved bits that the hardware does not return. Signed-off-by: Mike Marciniszyn (Meta) Link: https://patch.msgid.link/20260430150802.3521-3-mike.marciniszyn@gmail.com Signed-off-by: Paolo Abeni

net: mdio: Add support for RSFEC Control register for PMA

2026-05-05T12:40:39Z

Add the constants associated with RS-FEC configuration and status as well as the indicated separated bits for DEVS1 to convey a separated PMA. Reviewed-by: Andrew Lunn Signed-off-by: Mike Marciniszyn (Meta) Link: https://patch.msgid.link/20260430150802.3521-2-mike.marciniszyn@gmail.com Signed-off-by: Paolo Abeni

net/sched: speedup tc_dump_qdisc() when tcm_handle is provided

2026-05-05T02:32:19Z

"tc qdisc show ... handle xxx" filtering can be done by the kernel. A followup patch can do the same for tcm_parent. iproute2/tc needs a small companion patch. Signed-off-by: Eric Dumazet Reviewed-by: Jamal Hadi Salim Link: https://patch.msgid.link/20260503114515.2460477-1-edumazet@google.com Signed-off-by: Jakub Kicinski

net: airoha: Introduce airoha_fe_get()/airoha_qdma_get() register read helpers

2026-05-05T02:31:02Z

Add airoha_fe_get() and airoha_qdma_get() as utility routines for reading a masked field from a specified register. This is a non-functional refactor, no logical changes are introduced to the existing codebase. Signed-off-by: Lorenzo Bianconi Link: https://patch.msgid.link/20260501-airoha_fe_get-airoha_qdma_get-v3-1-126c6f647ccb@kernel.org Signed-off-by: Jakub Kicinski

net: phy: realtek: replace magic number with register bit macros

2026-05-05T02:22:21Z

Replace magic number with register bit macros. The description of the RTL8211B interrupt register is obtained from publicly available datasheet (RTL8211B(L) Rev. 1.5 Datasheet) Signed-off-by: Aleksander Jan Bajkowski Reviewed-by: Daniel Golle Link: https://patch.msgid.link/20260502092857.156831-1-olek2@wp.pl Signed-off-by: Jakub Kicinski

net: mana: hardening: Reject zero max_num_queues from GDMA_QUERY_MAX_RESOURCES

2026-05-05T02:13:36Z

In a CVM environment, hardware responses cannot be trusted. The GDMA_QUERY_MAX_RESOURCES command returns resource limits used to determine the maximum number of queues. In mana_gd_query_max_resources(), gc->max_num_queues is initialized from num_online_cpus() and successively clamped by the hardware-reported max_eq, max_cq, max_sq, max_rq, and num_msix_usable values. If any of these hardware values is zero, gc->max_num_queues becomes zero and the function returns success. This leads to a confusing failure later when alloc_etherdev_mq() is called with zero queues, returning NULL and producing a misleading -ENOMEM error. Add an explicit zero check for gc->max_num_queues after all clamping steps and return -ENOSPC for a clear early failure, consistent with the existing gc->num_msix_usable <= 1 guard. Signed-off-by: Erni Sri Satya Vennela Reviewed-by: Shradha Gupta Link: https://patch.msgid.link/20260430083627.1873757-1-ernis@linux.microsoft.com Signed-off-by: Jakub Kicinski

net: mana: hardening: Reject zero max_num_queues from MANA_QUERY_VPORT_CONFIG

2026-05-05T02:13:31Z

As a part of MANA hardening for CVM, validate that max_num_sq and max_num_rq returned by MANA_QUERY_VPORT_CONFIG are not zero. These values flow into apc->num_queues, which is used as an allocation count and loop bound. A zero value would result in zero-size allocations and incorrect driver behavior. Return -EPROTO if either value is zero. Signed-off-by: Erni Sri Satya Vennela Link: https://patch.msgid.link/20260430085638.1875400-1-ernis@linux.microsoft.com Signed-off-by: Jakub Kicinski

Merge branch 'net-bridge-mcast-support-exponential-field-encoding'

2026-05-05T02:09:43Z

Ujjal Roy says: ==================== net: bridge: mcast: support exponential field encoding Description: This series addresses a mismatch in how multicast query intervals and response codes are handled across IPv4 (IGMPv3) and IPv6 (MLDv2). While decoding logic currently exists, the corresponding encoding logic is missing during query packet generation. This leads to incorrect intervals being transmitted when values exceed their linear thresholds. The patches introduce a unified floating-point encoding approach based on RFC3376 and RFC3810, ensuring that large intervals are correctly represented in QQIC and MRC fields using the exponent-mantissa format. Key Changes: * ipv4: igmp: get rid of IGMPV3_{QQIC,MRC} and simplify calculation Removes legacy macros in favor of a cleaner, unified calculation for retrieving intervals from encoded fields, improving code maintainability. * ipv6: mld: rename mldv2_mrc() and add mldv2_qqi() Standardizes MLDv2 terminology by renaming mldv2_mrc() to mldv2_mrd() (Maximum Response Delay) and introducing a new API mldv2_qqi for QQI calculation, improving code readability. * ipv4: igmp: encode multicast exponential fields Introduces the logic to dynamically calculate the exponent and mantissa using bit-scan (fls). This ensures QQIC and MRC fields (8-bit) are properly encoded when transmitting query packets with intervals that exceed their respective linear threshold value of 128 (for QQI/MRT). * ipv6: mld: encode multicast exponential fields Applies similar encoding logic for MLDv2. This ensures QQIC (8-bit) and MRC (16-bit) fields are properly encoded when transmitting query packets with intervals that exceed their respective linear thresholds (128 for QQI; 32768 for MRD). * selftests: net: bridge: add MRC and QQIC field encoding tests Updates bridge selftests to validate both linear and non-linear (exponential) encoding for MRC and QQIC fields, ensuring protocol compliance across IGMPv3 and MLDv2. Impact: These changes ensure that multicast queriers and listeners stay synchronized on timing intervals, preventing protocol timeouts or premature group membership expiration caused by incorrectly formatted packet headers. ==================== Link: https://patch.msgid.link/20260502131907.987-1-royujjal@gmail.com Signed-off-by: Jakub Kicinski