wireguard-linux/Documentation/devicetree/bindings/arm/tegra, branch jd/unified-crypt-queue

dt-bindings: soc: tegra-pmc: Add ID for Tegra PMC 32 kHz blink clock

2020-02-17T09:09:19Z

Tegra PMC has blink functionality that allows 32 kHz clock out to blink pin of the Tegra. This patch adds id for this blink clock to use for enabling or disabling blink output through device tree. Tested-by: Dmitry Osipenko Reviewed-by: Dmitry Osipenko Acked-by: Rob Herring Signed-off-by: Sowjanya Komatineni Signed-off-by: Thierry Reding

dt-bindings: soc: tegra-pmc: Add Tegra PMC clock bindings

2020-02-17T09:07:39Z

Tegra PMC has 3 clocks clk_out_1, clk_out_2, and clk_out_3. This patch documents PMC clock bindings and adds a header defining Tegra PMC clock ids. Tested-by: Dmitry Osipenko Reviewed-by: Dmitry Osipenko Reviewed-by: Rob Herring Signed-off-by: Sowjanya Komatineni Signed-off-by: Thierry Reding

dt-bindings: tegra: Convert Tegra PMC bindings to YAML

2020-02-17T09:07:21Z

This patch converts text based Tegra PMC bindings document to YAML schema for performing dt validation. Tested-by: Dmitry Osipenko Reviewed-by: Dmitry Osipenko Reviewed-by: Rob Herring Signed-off-by: Sowjanya Komatineni Signed-off-by: Thierry Reding

dt-bindings: tegra186-pmc: Add interrupt controller properties

2018-11-28T15:42:58Z

The PMC can be a top-level interrupt controller that provides the top- level controls for wake events. Add optional properties to mark the PMC as interrupt controller. Reviewed-by: Rob Herring Signed-off-by: Thierry Reding

dt: bindings: Move tegra20-emc binding to memory-controllers directory

2018-11-08T11:48:23Z

Move tegra20-emc binding to the memory-controllers directory for consistency with the other Tegra memory bindings. Signed-off-by: Dmitry Osipenko Acked-by: Rob Herring Signed-off-by: Thierry Reding

dt: bindings: tegra20-emc: Document clock property

2018-11-08T11:48:23Z

Embedded memory controller has a corresponding clock, document the clock property. Signed-off-by: Dmitry Osipenko Acked-by: Rob Herring Signed-off-by: Thierry Reding

dt: bindings: tegra20-emc: Document interrupt property

2018-11-08T11:48:22Z

EMC has a dedicated interrupt that is used to notify about completion of HW operations. Document the interrupt property. Signed-off-by: Dmitry Osipenko Acked-by: Rob Herring Acked-by: Peter De Schrijver Signed-off-by: Thierry Reding

dt-bindings: Add Tegra PMC pad configuration bindings

2018-08-27T10:21:43Z

Document the PMC pinctrl bindings for pad power state and signaling voltage configuration. Both nvidia,tegra186-pmc.txt and nvidia,tegra20-pmc.txt are modified as they both cover SoC generations for which these bindings apply. Add a header defining Tegra PMC pad voltage configurations. Signed-off-by: Aapo Vienamo Acked-by: Jon Hunter Reviewed-by: Rob Herring Signed-off-by: Thierry Reding

dt-bindings: Relocate Tegra20 memory controller bindings

2018-04-27T09:15:51Z

Move the device tree bindings for the Tegra20 memory controller to the same location as the Tegra30 (and later) memory controller bindings. Signed-off-by: Thierry Reding

dt-bindings: arm: tegra: Document #reset-cells property of the Tegra20 MC

2018-04-27T09:14:35Z

Memory Controller has a memory client "hot reset" functionality, which resets the DMA interface of a memory client, so MC is a reset controller. Signed-off-by: Dmitry Osipenko Reviewed-by: Rob Herring Signed-off-by: Thierry Reding