<feed xmlns='http://www.w3.org/2005/Atom'>
<title>wireguard-linux/Documentation/devicetree/bindings/display/rockchip, branch jd/unified-crypt-queue</title>
<subtitle>WireGuard for the Linux kernel</subtitle>
<id>https://git.zx2c4.com/wireguard-linux/atom/Documentation/devicetree/bindings/display/rockchip?h=jd%2Funified-crypt-queue</id>
<link rel='self' href='https://git.zx2c4.com/wireguard-linux/atom/Documentation/devicetree/bindings/display/rockchip?h=jd%2Funified-crypt-queue'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/'/>
<updated>2020-03-06T17:09:22Z</updated>
<entry>
<title>dt-bindings: convert rockchip-drm.txt to rockchip-drm.yaml</title>
<updated>2020-03-06T17:09:22Z</updated>
<author>
<name>Dafna Hirschfeld</name>
<email>dafna.hirschfeld@collabora.com</email>
</author>
<published>2020-01-21T15:43:14Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=7064de726ec800f230733d9d8cccf1266160aabf'/>
<id>urn:sha1:7064de726ec800f230733d9d8cccf1266160aabf</id>
<content type='text'>
convert the binding file rockchip-drm.txt to yaml format.
This was tested and verified on ARM and ARM64 with:
make dt_binding_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/display/rockchip/rockchip-drm.yaml
make dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/display/rockchip/rockchip-drm.yaml

Changes since v2:
- add a missing "&gt;" sign in maintainers list
- change the licens to GPL-2.0-only
- add "additionalProperties: false"
- change the commit message to conform that it was tested on both ARM and ARM64
Changes since v1:
- fixed worng sign-off
- fixed the path of the $id property to be the path of the yaml file

Signed-off-by: Dafna Hirschfeld &lt;dafna.hirschfeld@collabora.com&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20200121154314.3444-1-dafna.hirschfeld@collabora.com
</content>
</entry>
<entry>
<title>dt-bindings: display: rockchip-lvds: Document PX30 PHY</title>
<updated>2020-01-05T11:09:52Z</updated>
<author>
<name>Miquel Raynal</name>
<email>miquel.raynal@bootlin.com</email>
</author>
<published>2019-12-24T14:38:51Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=1e0b0a0cf31a1c2d7770bed904c66c4e71e01311'/>
<id>urn:sha1:1e0b0a0cf31a1c2d7770bed904c66c4e71e01311</id>
<content type='text'>
PX30 SoCs use a single PHY shared by two display pipelines: MIPI DSI
and LVDS. In the case of the LVDS IP, document the possibility to fill
a PHY handle.

Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20191224143900.23567-3-miquel.raynal@bootlin.com
</content>
</entry>
<entry>
<title>dt-bindings: display: rockchip-lvds: Declare PX30 compatible</title>
<updated>2020-01-05T11:09:36Z</updated>
<author>
<name>Miquel Raynal</name>
<email>miquel.raynal@bootlin.com</email>
</author>
<published>2019-12-24T14:38:50Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=d1dc01860a2a2e9a542485b732ece729402c2bd5'/>
<id>urn:sha1:d1dc01860a2a2e9a542485b732ece729402c2bd5</id>
<content type='text'>
Document the PX30 LVDS compatible.

Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20191224143900.23567-2-miquel.raynal@bootlin.com
</content>
</entry>
<entry>
<title>dt-bindings: display: rockchip-dsi: add px30 compatible</title>
<updated>2019-12-16T11:03:38Z</updated>
<author>
<name>Heiko Stuebner</name>
<email>heiko.stuebner@theobroma-systems.com</email>
</author>
<published>2019-12-09T14:31:29Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=95da672f386c937cc22f892fadb019de3b2c2f0d'/>
<id>urn:sha1:95da672f386c937cc22f892fadb019de3b2c2f0d</id>
<content type='text'>
The px30 SoC also uses a dw-mipi-dsi controller, so add the
compatible value for it.

changes in v5:
- rebased on top of 5.5-rc1
- merged with dsi timing change to prevent ordering conflicts

Signed-off-by: Heiko Stuebner &lt;heiko.stuebner@theobroma-systems.com&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20191209143130.4553-6-heiko@sntech.de
</content>
</entry>
<entry>
<title>dt-bindings: display: rockchip-dsi: document external phys</title>
<updated>2019-12-16T11:02:26Z</updated>
<author>
<name>Heiko Stuebner</name>
<email>heiko.stuebner@theobroma-systems.com</email>
</author>
<published>2019-12-09T14:31:27Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=0606f9b67e8c8727c1369096b3b142dd74dc0a39'/>
<id>urn:sha1:0606f9b67e8c8727c1369096b3b142dd74dc0a39</id>
<content type='text'>
Some dw-mipi-dsi instances in Rockchip SoCs use external dphys.
In these cases the needs clock will also be generated externally
so these don't need the ref-clock as well.

changes in v5:
- rebased on top of 5.5-rc1
- merged with dsi timing change to prevent ordering conflicts

Signed-off-by: Heiko Stuebner &lt;heiko.stuebner@theobroma-systems.com&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20191209143130.4553-4-heiko@sntech.de
</content>
</entry>
<entry>
<title>dt-bindings: display: rockchip: document VOP gamma LUT address</title>
<updated>2019-10-11T13:21:55Z</updated>
<author>
<name>Ezequiel Garcia</name>
<email>ezequiel@collabora.com</email>
</author>
<published>2019-10-10T19:43:49Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=2804b799c35272031088abc6b0f74238e61f8afd'/>
<id>urn:sha1:2804b799c35272031088abc6b0f74238e61f8afd</id>
<content type='text'>
Add the register specifier description for an
optional gamma LUT address.

Reviewed-by: Douglas Anderson &lt;dianders@chromium.org&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Tested-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Signed-off-by: Ezequiel Garcia &lt;ezequiel@collabora.com&gt;
Signed-off-by: Sean Paul &lt;seanpaul@chromium.org&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20191010194351.17940-2-ezequiel@collabora.com
</content>
</entry>
<entry>
<title>dt-bindings: display: rockchip: update DSI controller</title>
<updated>2019-08-20T15:40:34Z</updated>
<author>
<name>Nickey Yang</name>
<email>nickey.yang@rock-chips.com</email>
</author>
<published>2018-10-01T12:38:42Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=343bbb1a7f88df49a7166cd949d6cd3b4d3f0919'/>
<id>urn:sha1:343bbb1a7f88df49a7166cd949d6cd3b4d3f0919</id>
<content type='text'>
This patch update describe panel/port links, including
unit addresses in documentation of device tree bindings
for the rockchip DSI controller based on the Synopsys
DesignWare MIPI DSI host controller.

Signed-off-by: Nickey Yang &lt;nickey.yang@rock-chips.com&gt;
Reviewed-by: Brian Norris &lt;briannorris@chromium.org&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
[this seems to have gotten lost when the original dsi-series was applied]
Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20181001123845.11818-5-heiko@sntech.de
</content>
</entry>
<entry>
<title>dt-bindings: display: rockchip-lvds: Remove panel references</title>
<updated>2019-06-27T08:23:34Z</updated>
<author>
<name>Rob Herring</name>
<email>robh@kernel.org</email>
</author>
<published>2019-06-24T21:56:35Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=28a902e6d7fbe469b0322da39128a5e9833dbb17'/>
<id>urn:sha1:28a902e6d7fbe469b0322da39128a5e9833dbb17</id>
<content type='text'>
The panel bindings are outside the scope of the Rockchip LVDS interface
binding. The references are about to change too, so rather than update
them just drop the section on the panel bindings.

Cc: Sandy Huang &lt;hjc@rock-chips.com&gt;
Cc: "Heiko Stübner" &lt;heiko@sntech.de&gt;
Cc: Maxime Ripard &lt;maxime.ripard@bootlin.com&gt;
Cc: dri-devel@lists.freedesktop.org
Cc: linux-rockchip@lists.infradead.org
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20190624215649.8939-2-robh@kernel.org
</content>
</entry>
<entry>
<title>drm/rockchip: dw_hdmi: add basic rk3228 support</title>
<updated>2019-06-14T11:39:15Z</updated>
<author>
<name>Justin Swartz</name>
<email>justin.swartz@risingedge.co.za</email>
</author>
<published>2019-05-22T22:46:29Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=53ffa1ee8de2cdfb0fcbef798486ba9c7f9316fd'/>
<id>urn:sha1:53ffa1ee8de2cdfb0fcbef798486ba9c7f9316fd</id>
<content type='text'>
Like the RK3328, RK322x SoCs offer a Synopsis DesignWare HDMI transmitter
and an Innosilicon HDMI PHY.

Add a new dw_hdmi_plat_data struct, rk3228_hdmi_drv_data.
Assign a set of mostly generic rk3228_hdmi_phy_ops functions.
Add dw_hdmi_rk3228_setup_hpd() to enable the HDMI HPD and DDC lines.

Signed-off-by: Justin Swartz &lt;justin.swartz@risingedge.co.za&gt;
Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20190522224631.25164-1-justin.swartz@risingedge.co.za
</content>
</entry>
<entry>
<title>dt-bindings: drm/bridge/synopsys: dw-hdmi: Add "unwedge" for ddc bus</title>
<updated>2019-06-05T19:39:00Z</updated>
<author>
<name>Douglas Anderson</name>
<email>dianders@chromium.org</email>
</author>
<published>2019-05-02T22:53:32Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=c60362500149608bc535c9cb80d42ddd03f8152a'/>
<id>urn:sha1:c60362500149608bc535c9cb80d42ddd03f8152a</id>
<content type='text'>
In certain situations it was seen that we could wedge up the DDC bus
on the HDMI adapter on rk3288.  The only way to unwedge was to mux one
of the pins over to GPIO output-driven-low temporarily and then
quickly mux back.  Full details can be found in the patch
("drm/bridge/synopsys: dw-hdmi: Add "unwedge" for ddc bus").

Since unwedge requires remuxing the pins, we first need to add to the
bindings so that we can specify what state the pins should be in for
unwedging.

Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Douglas Anderson &lt;dianders@chromium.org&gt;
Signed-off-by: Sean Paul &lt;seanpaul@chromium.org&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20190502225336.206885-1-dianders@chromium.org
</content>
</entry>
</feed>
